Inter-Fpga Paths Report
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Tool: HAPS (R) ProtoCompiler 100
Build: R-2020.12-SP1-1
Install: /usr/cadtool/csr5306/synopsys/protocomp/R-2020.12-SP1-1
OS: CentOS Linux 7 (Core)
Hostname: ws35
max virtual memory: unlimited (bytes)
max user processes: 4096
max stack size: 10485760 (bytes)
Database state : /home/u108/u108061217/RISC-V-pipeline-CPU/RISC_V_CPU/|sg0
Synopsys Xilinx Technology Mapper, Version map202012pcp4, Build 193R, Built Apr 8 2022 21:27:09, @4216327
Id Slack (ns) Source Clock Sink Clock Exception Hops TDMs used per hop** Total TDM delay (ns)* User logic delay (ns) Path delay (ns) Requirement (ns) Start Point End Point Net Name
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1 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 15.634 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
2 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 13.551 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
3 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
4 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
5 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
6 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
7 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
8 429.170 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.358 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
9 429.312 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.216 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
10 429.312 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 8.216 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
11 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 10.351 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
12 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 10.351 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
13 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
14 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
15 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
16 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
17 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
18 430.097 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 5.141 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
19 430.239 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 4.998 71.568 500.737 FB1.uB.dut_inst.idex1.regrs1_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
20 430.239 clk:r clk:r - FB1_uC: FB1_uB x4: x4: x1 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) + (trace:5.039) = 45.039 4.998 71.568 500.737 FB1.uB.dut_inst.idex1.regrs2_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
21 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 6.214 65.467 500.000 FB1.uB.dut_inst.idex1.regrs2_out[4].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
22 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 6.214 65.467 500.000 FB1.uB.dut_inst.idex1.regrs1_out[3].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
23 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs2_out[2].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
24 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs2_out[3].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
25 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs1_out[4].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
26 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs2_out[1].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
27 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs1_out[1].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
28 434.533 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs1_out[2].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
29 434.675 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs2_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
30 434.675 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 65.467 500.000 FB1.uB.dut_inst.idex1.regrs1_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
31 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 6.232 64.540 500.000 FB1.uB.dut_inst.idex1.regrs2_out[3].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
32 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs2_out[4].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
33 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 6.232 64.540 500.000 FB1.uB.dut_inst.idex1.regrs1_out[4].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
34 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs1_out[3].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
35 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs2_out[1].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
36 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs2_out[2].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
37 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs1_out[2].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
38 435.460 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs1_out[1].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
39 435.602 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs1_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
40 435.602 clk:r System:r - FB1_uC x4: x4 (tx:10.000 + rx:10.000) + (tx:10.000 + rx:10.000) = 40.000 0.000 64.540 500.000 FB1.uB.dut_inst.idex1.regrs2_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
41 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 5.885 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
42 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 4.541 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
43 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 5.885 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
44 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 5.885 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
45 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 5.885 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
46 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 4.541 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
47 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 4.541 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
48 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 5.885 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
49 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 4.541 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
50 451.643 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.039) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.078 4.541 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB_aptn_s[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
51 451.938 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.146) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.185 5.483 71.568 500.737 FB1.uD.dut_inst.memwb1.regwrite_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE REGWRITEWB_aptn_s: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
52 451.938 clk:r clk:r - FB1_uC: FB1_uB x1: x4: x1 (trace:5.146) + (tx:10.000 + rx:10.000) + (trace:5.039) = 30.185 4.108 71.568 500.737 FB1.uD.dut_inst.memwb1.regwrite_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE REGWRITEWB_aptn_s: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
53 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q equal.equal WRWB_aptn_s[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
54 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q equal.equal WRWB_aptn_s[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
55 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q equal.equal WRWB_aptn_s[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
56 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q equal.equal WRWB_aptn_s[0]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
57 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q equal.equal WRWB_aptn_s[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
58 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q equal.equal WRWB_aptn_s[4]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
59 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q equal.equal WRWB_aptn_s[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
60 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q equal.equal WRWB_aptn_s[3]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
61 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q equal.equal WRWB_aptn_s[2]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
62 457.006 clk:r System:r - FB1_uC x1: x4 (trace:5.039) + (tx:10.000 + rx:10.000) = 25.039 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q equal.equal WRWB_aptn_s[1]: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
63 457.301 clk:r System:r - FB1_uC x1: x4 (trace:5.146) + (tx:10.000 + rx:10.000) = 25.146 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.regwrite_out.Q equal.equal REGWRITEWB_aptn_s: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
64 457.301 clk:r System:r - FB1_uC x1: x4 (trace:5.146) + (tx:10.000 + rx:10.000) = 25.146 0.000 65.467 500.000 FB1.uD.dut_inst.memwb1.regwrite_out.Q equal.equal REGWRITEWB_aptn_s: (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
65 458.144 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.424 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]: PCSRCID
66 458.144 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.424 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]: PCSRCID
67 459.070 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.479 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]: PCSRCID
68 459.070 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.479 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]: PCSRCID
69 460.619 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 7.140 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[62].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_2) ALUOUTMEM[62]: PCSRCID
70 460.619 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 7.140 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[60].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_0) ALUOUTMEM[60]: PCSRCID
71 460.619 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 7.140 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[61].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_1) ALUOUTMEM[61]: PCSRCID
72 460.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 7.062 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[63].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_3) ALUOUTMEM[63]: PCSRCID
73 462.235 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 7.855 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[60]
74 462.236 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.582 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[59]
75 462.274 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.706 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[60]
76 462.275 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.432 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[59]
77 462.283 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.697 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[60]
78 462.284 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.423 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[59]
79 462.285 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.532 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[46]
80 462.306 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.511 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[45]
81 462.313 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.667 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[60]
82 462.314 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.393 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[59]
83 462.319 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.605 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[62]
84 462.323 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.601 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[63]
85 462.325 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.383 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[46]
86 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.648 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[60]
87 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.648 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[60]
88 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.648 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[60]
89 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.374 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[59]
90 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.374 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[59]
91 462.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.374 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[59]
92 462.334 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.374 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[46]
93 462.334 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.647 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[60]
94 462.334 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.373 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[59]
95 462.340 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.585 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[61]
96 462.341 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.639 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[60]
97 462.342 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.365 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[59]
98 462.344 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.580 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[58]
99 462.345 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.362 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[45]
100 462.354 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.353 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[45]
101 462.355 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.569 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[56]
102 462.356 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.568 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[54]
103 462.358 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.459 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[32]
104 462.358 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.456 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[62]
105 462.359 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.565 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[57]
106 462.359 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.565 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[55]
107 462.362 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.452 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[63]
108 462.362 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.455 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[31]
109 462.364 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.343 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[46]
110 462.367 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.447 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[62]
111 462.371 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.443 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[63]
112 462.376 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.548 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[53]
113 462.379 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.546 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[52]
114 462.379 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.435 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[61]
115 462.379 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.545 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[51]
116 462.381 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.543 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[50]
117 462.383 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.324 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[46]
118 462.383 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.324 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[46]
119 462.383 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.324 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[46]
120 462.384 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.431 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[58]
121 462.384 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.323 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[46]
122 462.384 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.323 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[45]
123 462.388 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.426 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[61]
124 462.392 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.316 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[46]
125 462.392 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.532 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[48]
126 462.393 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.422 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[58]
127 462.394 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.420 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[56]
128 462.395 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.419 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[54]
129 462.395 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.529 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[49]
130 462.396 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.528 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[47]
131 462.397 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.310 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[32]
132 462.398 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.417 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[62]
133 462.398 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.416 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[57]
134 462.399 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.416 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[55]
135 462.401 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.413 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[63]
136 462.401 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.306 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[31]
137 462.403 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.304 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[45]
138 462.403 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.411 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[56]
139 462.403 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.304 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[45]
140 462.403 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.304 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[45]
141 462.404 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.410 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[54]
142 462.405 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.303 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[45]
143 462.406 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.301 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[32]
144 462.407 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.407 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[57]
145 462.408 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.407 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[55]
146 462.410 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.297 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[31]
147 462.412 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.295 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[45]
148 462.415 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.509 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[44]
149 462.415 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.399 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[53]
150 462.416 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.508 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[43]
151 462.417 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.397 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[62]
152 462.417 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.397 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[62]
153 462.417 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.397 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[62]
154 462.418 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.506 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[42]
155 462.418 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.396 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[52]
156 462.418 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.396 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[61]
157 462.418 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.396 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[62]
158 462.418 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.396 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[51]
159 462.420 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.394 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[50]
160 462.420 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.394 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[63]
161 462.420 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.394 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[63]
162 462.420 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.394 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[63]
163 462.422 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.393 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[63]
164 462.423 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.391 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[58]
165 462.424 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.390 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[53]
166 462.425 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.389 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[62]
167 462.427 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.387 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[52]
168 462.427 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.387 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[51]
169 462.428 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.496 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[40]
170 462.429 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.385 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[63]
171 462.429 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.495 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[38]
172 462.429 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.385 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[50]
173 462.431 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.383 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[48]
174 462.432 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.492 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[41]
175 462.433 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.492 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[39]
176 462.434 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.381 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[56]
177 462.434 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.380 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[54]
178 462.435 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.380 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[49]
179 462.435 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.379 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[47]
180 462.436 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.271 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[32]
181 462.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.377 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[61]
182 462.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.377 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[61]
183 462.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.377 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[57]
184 462.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.377 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[61]
185 462.438 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.376 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[55]
186 462.438 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.376 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[61]
187 462.440 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.374 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[48]
188 462.441 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.267 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[31]
189 462.442 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.372 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[58]
190 462.442 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.372 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[58]
191 462.442 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.372 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[58]
192 462.443 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.248 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[60]
193 462.443 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.371 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[58]
194 462.443 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.975 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[59]
195 462.444 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.371 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[49]
196 462.444 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.370 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[47]
197 462.445 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.246 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[60]
198 462.446 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.368 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[61]
199 462.446 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.972 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[59]
200 462.449 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.475 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[37]
201 462.451 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.364 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[58]
202 462.452 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.472 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[36]
203 462.452 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.472 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[35]
204 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[56]
205 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[56]
206 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[56]
207 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[54]
208 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[54]
209 462.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[54]
210 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.360 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[56]
211 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.237 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[60]
212 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.470 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[34]
213 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.360 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[44]
214 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.360 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[53]
215 462.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.360 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[54]
216 462.455 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.963 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[59]
217 462.455 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.359 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[43]
218 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.252 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[32]
219 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.252 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[32]
220 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.252 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[32]
221 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[57]
222 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[57]
223 462.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[57]
224 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[42]
225 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.250 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[32]
226 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[55]
227 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[55]
228 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[55]
229 462.457 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[52]
230 462.458 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[57]
231 462.458 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[51]
232 462.458 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.356 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[55]
233 462.459 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.355 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[50]
234 462.460 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.247 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[31]
235 462.460 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.247 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[31]
236 462.460 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.247 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[31]
237 462.461 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.246 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[31]
238 462.461 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.353 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[56]
239 462.462 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.352 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[54]
240 462.463 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.351 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[44]
241 462.464 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.350 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[43]
242 462.464 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.243 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[32]
243 462.464 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.227 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[60]
244 462.464 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.227 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[60]
245 462.464 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.227 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[60]
246 462.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.349 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[57]
247 462.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.953 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[59]
248 462.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.953 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[59]
249 462.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.953 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[59]
250 462.466 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.349 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[55]
251 462.466 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.458 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[30]
252 462.466 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.226 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[60]
253 462.466 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.348 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[42]
254 462.466 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.952 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[59]
255 462.468 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.347 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[40]
256 462.468 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.346 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[38]
257 462.468 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.239 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[31]
258 462.469 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.456 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[33]
259 462.470 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.344 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[48]
260 462.471 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.343 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[41]
261 462.471 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.346 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[9]
262 462.472 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.342 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[39]
263 462.474 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.340 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[53]
264 462.474 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.340 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[53]
265 462.474 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.340 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[53]
266 462.474 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.340 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[49]
267 462.474 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.340 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[47]
268 462.475 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.339 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[53]
269 462.476 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[52]
270 462.476 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[52]
271 462.476 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[52]
272 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[40]
273 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.337 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[51]
274 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.337 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[51]
275 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.337 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[51]
276 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.337 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[38]
277 462.477 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.337 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[52]
278 462.478 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.336 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[51]
279 462.478 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.336 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[50]
280 462.478 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.336 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[50]
281 462.478 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.336 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[50]
282 462.479 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.212 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[60]
283 462.480 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.334 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[50]
284 462.480 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.938 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[59]
285 462.480 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.334 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[41]
286 462.481 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.333 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[39]
287 462.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.209 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[60]
288 462.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.332 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[53]
289 462.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.936 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[59]
290 462.485 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.329 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[52]
291 462.485 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.329 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[51]
292 462.486 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.438 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[29]
293 462.487 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.327 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[50]
294 462.488 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.436 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[28]
295 462.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.326 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[37]
296 462.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.435 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[27]
297 462.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.325 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[48]
298 462.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.325 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[48]
299 462.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.325 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[48]
300 462.490 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.324 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[48]
301 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.433 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[26]
302 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.200 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[60]
303 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.200 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[60]
304 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.323 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[36]
305 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.927 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[59]
306 462.491 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.927 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[59]
307 462.492 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.323 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[35]
308 462.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[49]
309 462.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[49]
310 462.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[49]
311 462.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.925 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[46]
312 462.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[34]
313 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[47]
314 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[47]
315 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[47]
316 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[44]
317 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.320 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[43]
318 462.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.320 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[49]
319 462.495 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.319 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[47]
320 462.496 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.923 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[46]
321 462.496 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.318 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[42]
322 462.498 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.317 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[37]
323 462.498 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.316 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[48]
324 462.500 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.314 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[36]
325 462.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.314 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[35]
326 462.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.190 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[60]
327 462.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.190 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[60]
328 462.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.190 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[60]
329 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.313 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[49]
330 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.917 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[59]
331 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.917 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[59]
332 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.423 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[24]
333 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.917 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[59]
334 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.312 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[47]
335 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.189 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[60]
336 462.502 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.312 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[34]
337 462.503 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.915 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[59]
338 462.505 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.913 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[46]
339 462.505 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.309 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[30]
340 462.505 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.419 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[25]
341 462.507 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.307 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[40]
342 462.507 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.307 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[38]
343 462.508 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.306 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[33]
344 462.510 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.304 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[41]
345 462.511 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.303 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[39]
346 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[44]
347 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[44]
348 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[44]
349 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[43]
350 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[43]
351 462.513 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[43]
352 462.514 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.905 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[45]
353 462.514 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.300 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[30]
354 462.514 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.300 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[44]
355 462.514 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.300 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[43]
356 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.903 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[46]
357 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.903 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[46]
358 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.903 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[46]
359 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.299 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[42]
360 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.299 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[42]
361 462.515 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.299 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[42]
362 462.516 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.175 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[60]
363 462.516 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.902 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[45]
364 462.516 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.902 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[46]
365 462.516 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.298 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[42]
366 462.517 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.901 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[59]
367 462.517 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.297 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[33]
368 462.518 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.173 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[60]
369 462.519 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.899 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[59]
370 462.520 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.188 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[9]
371 462.521 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.293 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[44]
372 462.522 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.292 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[43]
373 462.524 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.290 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[42]
374 462.525 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.893 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[45]
375 462.525 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.289 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[29]
376 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[40]
377 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[40]
378 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[40]
379 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[38]
380 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[38]
381 462.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[38]
382 462.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.998 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[62]
383 462.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.287 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[40]
384 462.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.164 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[60]
385 462.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.164 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[60]
386 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.287 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[28]
387 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.286 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[37]
388 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.286 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[38]
389 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.890 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[59]
390 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.890 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[59]
391 462.528 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.286 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[27]
392 462.529 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.996 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[62]
393 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.285 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[41]
394 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.285 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[41]
395 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.285 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[41]
396 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.888 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[46]
397 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[26]
398 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[36]
399 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[39]
400 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[39]
401 462.530 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[39]
402 462.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.995 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[63]
403 462.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.283 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[35]
404 462.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.283 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[41]
405 462.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.283 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[39]
406 462.532 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.886 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[46]
407 462.533 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.282 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[34]
408 462.533 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.992 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[63]
409 462.534 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.280 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[29]
410 462.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.280 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[40]
411 462.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.279 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[38]
412 462.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.883 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[45]
413 462.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.883 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[45]
414 462.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.883 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[45]
415 462.536 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.882 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[45]
416 462.537 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.278 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[28]
417 462.537 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.277 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[27]
418 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.154 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[60]
419 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.154 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[60]
420 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.154 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[60]
421 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.276 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[41]
422 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.880 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[59]
423 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.880 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[59]
424 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.880 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[59]
425 462.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.987 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[62]
426 462.539 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.275 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[39]
427 462.539 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.152 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[60]
428 462.539 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.275 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[26]
429 462.539 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.879 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[59]
430 462.541 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.273 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[24]
431 462.541 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.877 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[46]
432 462.541 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.877 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[46]
433 462.542 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.983 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[63]
434 462.544 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.270 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[30]
435 462.544 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.270 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[25]
436 462.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.267 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[37]
437 462.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.267 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[37]
438 462.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.267 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[33]
439 462.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.267 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[37]
440 462.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.978 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[61]
441 462.548 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.266 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[37]
442 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.977 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[62]
443 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.977 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[62]
444 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.977 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[62]
445 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[36]
446 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[36]
447 462.549 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[36]
448 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.264 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[24]
449 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.157 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[9]
450 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.975 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[62]
451 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.975 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[61]
452 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.264 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[35]
453 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.264 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[35]
454 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.264 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[35]
455 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.868 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[45]
456 462.550 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.264 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[36]
457 462.551 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.263 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[35]
458 462.551 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.867 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[46]
459 462.551 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.867 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[46]
460 462.551 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.867 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[46]
461 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.262 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[34]
462 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.262 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[34]
463 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.262 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[34]
464 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.973 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[63]
465 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.973 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[63]
466 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.973 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[63]
467 462.552 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.973 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[58]
468 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.866 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[46]
469 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.139 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[60]
470 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.866 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[45]
471 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.261 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[34]
472 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.865 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[59]
473 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.261 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[25]
474 462.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.972 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[63]
475 462.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.971 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[58]
476 462.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.136 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[60]
477 462.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.259 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[37]
478 462.556 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.863 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[59]
479 462.558 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.256 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[36]
480 462.559 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.256 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[35]
481 462.559 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.966 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[61]
482 462.560 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.254 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[34]
483 462.562 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.857 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[45]
484 462.562 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.857 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[45]
485 462.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.962 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[56]
486 462.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.251 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[30]
487 462.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.251 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[30]
488 462.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.251 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[30]
489 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.962 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[58]
490 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.962 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[62]
491 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.962 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[54]
492 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.127 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[60]
493 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.127 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[60]
494 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.250 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[29]
495 462.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.250 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[30]
496 462.565 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.854 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[59]
497 462.565 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.854 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[59]
498 462.565 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.960 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[56]
499 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.852 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[32]
500 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.959 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[54]
501 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.959 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[62]
502 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.248 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[33]
503 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.248 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[33]
504 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.248 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[33]
505 462.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.852 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[46]
506 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.959 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[57]
507 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.247 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[28]
508 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.958 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[55]
509 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.958 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[63]
510 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.247 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[33]
511 462.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.247 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[27]
512 462.568 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.850 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[32]
513 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.849 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[46]
514 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.138 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[9]
515 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.138 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[9]
516 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.138 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[9]
517 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[57]
518 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[61]
519 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[61]
520 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[61]
521 462.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.245 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[26]
522 462.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[55]
523 462.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[63]
524 462.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.848 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[31]
525 462.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.137 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[9]
526 462.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.955 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[61]
527 462.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.242 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[30]
528 462.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.846 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[45]
529 462.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.846 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[45]
530 462.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.846 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[45]
531 462.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.846 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[31]
532 462.573 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.845 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[45]
533 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[58]
534 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[58]
535 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[58]
536 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.117 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[60]
537 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.117 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[60]
538 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.117 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[60]
539 462.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[56]
540 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.239 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[33]
541 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.843 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[59]
542 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.843 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[59]
543 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.843 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[59]
544 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.950 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[58]
545 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.950 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[62]
546 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.950 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[54]
547 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.950 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[62]
548 462.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.116 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[60]
549 462.576 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.842 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[59]
550 462.577 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.841 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[32]
551 462.578 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.130 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[9]
552 462.578 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.840 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[46]
553 462.578 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.840 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[46]
554 462.578 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[57]
555 462.579 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[63]
556 462.579 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[63]
557 462.579 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[55]
558 462.580 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.234 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[24]
559 462.581 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.837 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[31]
560 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.231 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[29]
561 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.231 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[25]
562 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.231 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[29]
563 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.231 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[29]
564 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[61]
565 462.584 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[53]
566 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[56]
567 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[56]
568 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[56]
569 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.229 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[29]
570 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[54]
571 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[62]
572 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[62]
573 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[54]
574 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[62]
575 462.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.940 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[54]
576 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[56]
577 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[28]
578 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[28]
579 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[28]
580 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[53]
581 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[54]
582 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[62]
583 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[61]
584 462.586 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.939 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[52]
585 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[27]
586 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[27]
587 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[27]
588 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.831 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[45]
589 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.938 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[51]
590 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.227 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[28]
591 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.831 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[32]
592 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.831 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[32]
593 462.587 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.831 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[32]
594 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.226 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[27]
595 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.830 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[46]
596 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.830 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[46]
597 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.830 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[46]
598 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.937 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[57]
599 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.937 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[57]
600 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.937 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[57]
601 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.226 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[26]
602 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.226 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[26]
603 462.588 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.226 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[26]
604 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.830 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[32]
605 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[50]
606 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[63]
607 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[55]
608 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[55]
609 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[63]
610 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[63]
611 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[55]
612 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[52]
613 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[58]
614 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.829 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[46]
615 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.829 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[45]
616 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.102 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[60]
617 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[57]
618 462.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[51]
619 462.590 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.225 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[26]
620 462.590 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.828 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[59]
621 462.590 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.935 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[55]
622 462.590 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.935 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[63]
623 462.591 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.934 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[58]
624 462.591 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.934 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[50]
625 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.100 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[60]
626 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.827 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[31]
627 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.827 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[31]
628 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.827 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[31]
629 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.222 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[29]
630 462.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.826 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[59]
631 462.593 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.825 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[31]
632 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.220 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[28]
633 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.222 38.208 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[2].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[2]
634 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.219 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[27]
635 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.930 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[61]
636 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.930 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[53]
637 462.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.930 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[61]
638 462.597 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.217 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[26]
639 462.598 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.927 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[52]
640 462.598 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.820 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[45]
641 462.598 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.820 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[45]
642 462.598 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.927 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[51]
643 462.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.215 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[24]
644 462.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.215 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[24]
645 462.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.215 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[24]
646 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[48]
647 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[56]
648 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[50]
649 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[54]
650 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[58]
651 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[58]
652 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[62]
653 462.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.214 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[24]
654 462.601 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.091 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[60]
655 462.601 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.091 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[60]
656 462.601 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.817 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[59]
657 462.601 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.817 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[59]
658 462.602 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.923 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[56]
659 462.602 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.923 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[48]
660 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.923 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[62]
661 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.923 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[54]
662 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.211 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[25]
663 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.211 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[25]
664 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.211 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[25]
665 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.922 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[57]
666 462.603 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.922 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[49]
667 462.604 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.921 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[55]
668 462.604 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.921 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[47]
669 462.604 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.921 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[63]
670 462.604 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.210 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[25]
671 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[61]
672 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[57]
673 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[61]
674 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[61]
675 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[53]
676 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[49]
677 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[53]
678 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.920 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[53]
679 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.919 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[63]
680 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.919 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[47]
681 462.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.919 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[55]
682 462.607 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.918 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[61]
683 462.607 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.918 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[53]
684 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.206 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[24]
685 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[52]
686 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[52]
687 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[52]
688 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.810 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[45]
689 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.810 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[45]
690 462.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.810 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[45]
691 462.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[51]
692 462.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[51]
693 462.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[51]
694 462.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.916 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[52]
695 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.808 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[45]
696 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[51]
697 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[58]
698 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[50]
699 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[58]
700 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[50]
701 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[58]
702 462.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[50]
703 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.080 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[60]
704 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.080 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[60]
705 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.080 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[60]
706 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.914 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[56]
707 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.914 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[48]
708 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.914 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[56]
709 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.203 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[25]
710 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.807 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[59]
711 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.807 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[59]
712 462.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.807 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[59]
713 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[54]
714 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[50]
715 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[62]
716 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[62]
717 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[54]
718 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.913 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[58]
719 462.612 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.079 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[60]
720 462.613 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.806 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[59]
721 462.614 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.804 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[32]
722 462.614 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.804 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[32]
723 462.614 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.804 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[46]
724 462.614 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.804 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[46]
725 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.911 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[49]
726 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.911 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[57]
727 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.911 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[57]
728 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[55]
729 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[55]
730 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[63]
731 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[47]
732 462.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[63]
733 462.618 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.800 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[31]
734 462.618 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.800 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[31]
735 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.905 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[61]
736 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.905 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[53]
737 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[56]
738 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[56]
739 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[48]
740 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[48]
741 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[56]
742 462.621 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[48]
743 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[62]
744 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[62]
745 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[54]
746 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[54]
747 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[62]
748 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[54]
749 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[56]
750 462.622 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[48]
751 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[62]
752 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[61]
753 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[44]
754 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[52]
755 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[53]
756 462.623 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.902 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[54]
757 462.624 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.901 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[51]
758 462.624 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.901 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[43]
759 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[57]
760 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[49]
761 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[57]
762 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[57]
763 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[49]
764 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[49]
765 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[52]
766 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[47]
767 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[47]
768 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[55]
769 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[50]
770 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[63]
771 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[44]
772 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[58]
773 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[55]
774 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[63]
775 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[63]
776 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[55]
777 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[47]
778 462.625 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[42]
779 462.626 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[43]
780 462.626 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[57]
781 462.626 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[51]
782 462.626 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[49]
783 462.627 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[63]
784 462.627 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[55]
785 462.627 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.899 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[47]
786 462.628 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.897 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[50]
787 462.628 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.897 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[58]
788 462.628 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.897 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[42]
789 462.632 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.893 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[53]
790 462.632 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.893 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[61]
791 462.632 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.893 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[53]
792 462.632 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.893 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[61]
793 462.634 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.891 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[52]
794 462.634 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.891 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[44]
795 462.634 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.891 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[52]
796 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.783 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[45]
797 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.783 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[45]
798 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.783 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[32]
799 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.890 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[43]
800 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.890 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[51]
801 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.890 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[51]
802 462.635 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.783 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[46]
803 462.636 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.889 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[56]
804 462.636 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.889 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[40]
805 462.636 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.889 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[48]
806 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[58]
807 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[50]
808 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[54]
809 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[38]
810 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[50]
811 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[42]
812 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[62]
813 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[58]
814 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.781 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[32]
815 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.054 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[60]
816 462.637 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.054 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[60]
817 462.638 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.780 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[46]
818 462.638 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.780 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[59]
819 462.638 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.780 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[59]
820 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.887 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[56]
821 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.887 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[48]
822 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.887 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[40]
823 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.886 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[54]
824 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.886 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[38]
825 462.639 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.886 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[62]
826 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.779 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[31]
827 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[57]
828 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[49]
829 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[41]
830 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[47]
831 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[39]
832 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[55]
833 462.640 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.885 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[63]
834 462.641 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.777 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[31]
835 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[61]
836 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[61]
837 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[41]
838 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[53]
839 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[61]
840 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[53]
841 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[49]
842 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[57]
843 462.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[53]
844 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[39]
845 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[47]
846 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[55]
847 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[63]
848 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[61]
849 462.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.882 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[53]
850 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[44]
851 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[52]
852 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[44]
853 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[44]
854 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[52]
855 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[52]
856 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[43]
857 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[51]
858 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[43]
859 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[43]
860 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[51]
861 462.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[51]
862 462.646 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[52]
863 462.646 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.879 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[44]
864 462.646 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[51]
865 462.646 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.879 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[43]
866 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[50]
867 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[42]
868 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[58]
869 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[42]
870 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[42]
871 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[58]
872 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[50]
873 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[58]
874 462.647 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[50]
875 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[40]
876 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[48]
877 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[48]
878 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[56]
879 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[56]
880 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[62]
881 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[58]
882 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[62]
883 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[54]
884 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[42]
885 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[38]
886 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[54]
887 462.648 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[50]
888 462.651 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[57]
889 462.651 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[57]
890 462.651 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[49]
891 462.651 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[49]
892 462.651 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[41]
893 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[47]
894 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[47]
895 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[39]
896 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[63]
897 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[63]
898 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[55]
899 462.652 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[55]
900 462.657 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.761 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[45]
901 462.657 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.868 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[53]
902 462.657 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.868 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[61]
903 462.657 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.868 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[37]
904 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[40]
905 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[56]
906 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[56]
907 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[40]
908 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[48]
909 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[48]
910 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[40]
911 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[56]
912 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[48]
913 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[54]
914 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[38]
915 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[38]
916 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[62]
917 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[62]
918 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[54]
919 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[54]
920 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[62]
921 462.658 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[38]
922 462.659 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[56]
923 462.659 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[48]
924 462.659 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[40]
925 462.659 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.759 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[45]
926 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[62]
927 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[38]
928 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[54]
929 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[37]
930 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[36]
931 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[44]
932 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[52]
933 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[53]
934 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.866 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[61]
935 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.758 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[32]
936 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.865 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[43]
937 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.865 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[51]
938 462.660 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.865 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[35]
939 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[41]
940 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[49]
941 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[57]
942 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[49]
943 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[41]
944 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[41]
945 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[57]
946 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[57]
947 462.661 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[49]
948 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.756 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[46]
949 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[39]
950 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[50]
951 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[42]
952 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[58]
953 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[63]
954 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[63]
955 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[39]
956 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[55]
957 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[55]
958 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[63]
959 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[36]
960 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[55]
961 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[47]
962 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[44]
963 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[47]
964 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[47]
965 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[34]
966 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[52]
967 462.662 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[39]
968 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[49]
969 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[43]
970 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[41]
971 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[57]
972 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[51]
973 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.863 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[35]
974 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.862 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[63]
975 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.862 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[47]
976 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.862 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[55]
977 462.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.862 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[39]
978 462.664 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.861 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[34]
979 462.664 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.861 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[42]
980 462.664 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.861 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[50]
981 462.664 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.861 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[58]
982 462.665 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.753 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[31]
983 462.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[37]
984 462.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[53]
985 462.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[61]
986 462.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[61]
987 462.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[53]
988 462.670 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.748 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[32]
989 462.671 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[36]
990 462.671 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[44]
991 462.671 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[52]
992 462.671 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[52]
993 462.671 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[44]
994 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[43]
995 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[35]
996 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[51]
997 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[51]
998 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[43]
999 462.672 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.746 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[46]
1000 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[56]
1001 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[48]
1002 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[40]
1003 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[54]
1004 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[38]
1005 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[34]
1006 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[50]
1007 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[42]
1008 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[50]
1009 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[58]
1010 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[58]
1011 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[62]
1012 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[42]
1013 462.673 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[30]
1014 462.675 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.743 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[31]
1015 462.675 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.850 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[48]
1016 462.675 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.850 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[40]
1017 462.675 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.850 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[56]
1018 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[54]
1019 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[30]
1020 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[38]
1021 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[62]
1022 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[41]
1023 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[33]
1024 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[49]
1025 462.676 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.849 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[57]
1026 462.677 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.848 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[63]
1027 462.677 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.848 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[55]
1028 462.677 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.848 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[39]
1029 462.677 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.848 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[47]
1030 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[53]
1031 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[41]
1032 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[61]
1033 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[53]
1034 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[49]
1035 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[37]
1036 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[33]
1037 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[53]
1038 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[61]
1039 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[37]
1040 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[61]
1041 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[37]
1042 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[57]
1043 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[55]
1044 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[39]
1045 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[47]
1046 462.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[63]
1047 462.680 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.845 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[61]
1048 462.680 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.845 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[37]
1049 462.680 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.845 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[53]
1050 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[44]
1051 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[52]
1052 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[36]
1053 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[44]
1054 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[52]
1055 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[36]
1056 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[36]
1057 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[44]
1058 462.681 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[52]
1059 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[51]
1060 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[43]
1061 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[51]
1062 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[35]
1063 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[43]
1064 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[43]
1065 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[51]
1066 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[35]
1067 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[35]
1068 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[52]
1069 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[44]
1070 462.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[36]
1071 462.683 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[51]
1072 462.683 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[35]
1073 462.683 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[43]
1074 462.683 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.735 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[45]
1075 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[50]
1076 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[58]
1077 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[42]
1078 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[58]
1079 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[50]
1080 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[58]
1081 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[42]
1082 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[50]
1083 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[34]
1084 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[34]
1085 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[42]
1086 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[34]
1087 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[56]
1088 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[40]
1089 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[40]
1090 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[48]
1091 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[48]
1092 462.684 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.841 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[56]
1093 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[58]
1094 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[50]
1095 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[62]
1096 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[34]
1097 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[38]
1098 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[54]
1099 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[54]
1100 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[62]
1101 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[38]
1102 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[30]
1103 462.685 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[42]
1104 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[49]
1105 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[57]
1106 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[49]
1107 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[41]
1108 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[57]
1109 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[33]
1110 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[41]
1111 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[63]
1112 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[63]
1113 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[47]
1114 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[47]
1115 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[55]
1116 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[55]
1117 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[39]
1118 462.688 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[39]
1119 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[29]
1120 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[61]
1121 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[37]
1122 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[53]
1123 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[40]
1124 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[56]
1125 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[48]
1126 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[56]
1127 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[48]
1128 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[40]
1129 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[56]
1130 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[48]
1131 462.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[40]
1132 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[62]
1133 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[54]
1134 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[30]
1135 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[38]
1136 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[62]
1137 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[62]
1138 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[54]
1139 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[38]
1140 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[30]
1141 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[30]
1142 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[38]
1143 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[54]
1144 462.695 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.723 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[45]
1145 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[48]
1146 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[40]
1147 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.830 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[56]
1148 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[30]
1149 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[29]
1150 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[36]
1151 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[53]
1152 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[54]
1153 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[28]
1154 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[62]
1155 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[37]
1156 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[61]
1157 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[44]
1158 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[38]
1159 462.696 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.829 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[52]
1160 462.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.828 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[27]
1161 462.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.828 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[35]
1162 462.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.828 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[43]
1163 462.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.828 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[51]
1164 462.697 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.010 38.208 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[2].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[2]
1165 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[41]
1166 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[49]
1167 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[49]
1168 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[41]
1169 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[57]
1170 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[33]
1171 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[41]
1172 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[57]
1173 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[33]
1174 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[49]
1175 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[33]
1176 462.698 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[57]
1177 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[42]
1178 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[47]
1179 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[63]
1180 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[55]
1181 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[34]
1182 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[36]
1183 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[39]
1184 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[63]
1185 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[52]
1186 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[63]
1187 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[47]
1188 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[55]
1189 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[58]
1190 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[47]
1191 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[26]
1192 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[44]
1193 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[28]
1194 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[39]
1195 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[39]
1196 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[55]
1197 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[50]
1198 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[43]
1199 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[27]
1200 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[35]
1201 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[51]
1202 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[33]
1203 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[41]
1204 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[57]
1205 462.699 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.826 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[49]
1206 462.700 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.825 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[63]
1207 462.700 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.825 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[55]
1208 462.700 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.825 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[39]
1209 462.700 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.825 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[47]
1210 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.990 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[60]
1211 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.824 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[42]
1212 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.824 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[58]
1213 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.824 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[34]
1214 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.824 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[26]
1215 462.701 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.824 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[50]
1216 462.703 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.716 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[32]
1217 462.703 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.715 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[32]
1218 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.713 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[59]
1219 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[53]
1220 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[29]
1221 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[61]
1222 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[61]
1223 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[37]
1224 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[37]
1225 462.705 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[53]
1226 462.707 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.711 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[31]
1227 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[28]
1228 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[44]
1229 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[36]
1230 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[36]
1231 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[44]
1232 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[52]
1233 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[52]
1234 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[51]
1235 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[51]
1236 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[43]
1237 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[27]
1238 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[35]
1239 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[43]
1240 462.708 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[35]
1241 462.709 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.710 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[31]
1242 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[42]
1243 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[50]
1244 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[58]
1245 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[34]
1246 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[42]
1247 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[50]
1248 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[26]
1249 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[58]
1250 462.710 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[34]
1251 462.712 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.980 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[60]
1252 462.713 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.812 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[41]
1253 462.713 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.812 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[57]
1254 462.713 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.812 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[49]
1255 462.713 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.812 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[33]
1256 462.713 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.812 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[25]
1257 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[53]
1258 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[41]
1259 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[37]
1260 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[61]
1261 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[37]
1262 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[29]
1263 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[49]
1264 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[61]
1265 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[61]
1266 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[57]
1267 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[29]
1268 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[29]
1269 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[25]
1270 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[53]
1271 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[37]
1272 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[33]
1273 462.715 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.810 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[53]
1274 462.716 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.702 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[59]
1275 462.716 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.975 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[59].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]: ADDOUTID[59]
1276 462.717 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.808 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[61]
1277 462.717 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.808 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[37]
1278 462.717 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.808 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[53]
1279 462.717 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.808 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[29]
1280 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[52]
1281 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[28]
1282 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[52]
1283 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[44]
1284 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[36]
1285 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[44]
1286 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[36]
1287 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[44]
1288 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[28]
1289 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[28]
1290 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[52]
1291 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[36]
1292 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[51]
1293 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[35]
1294 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[27]
1295 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[27]
1296 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[51]
1297 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[51]
1298 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[43]
1299 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[43]
1300 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[27]
1301 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[35]
1302 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[43]
1303 462.718 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.807 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[35]
1304 462.719 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[36]
1305 462.719 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[52]
1306 462.719 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[28]
1307 462.719 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[44]
1308 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[43]
1309 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[51]
1310 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[27]
1311 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.806 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[35]
1312 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[50]
1313 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[26]
1314 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[50]
1315 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[50]
1316 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[42]
1317 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[42]
1318 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[26]
1319 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[34]
1320 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[58]
1321 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[58]
1322 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[42]
1323 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[58]
1324 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[26]
1325 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[34]
1326 462.720 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.805 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[34]
1327 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[48]
1328 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[56]
1329 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[24]
1330 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[40]
1331 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[56]
1332 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[40]
1333 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[48]
1334 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[42]
1335 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[38]
1336 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[38]
1337 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[50]
1338 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[62]
1339 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[34]
1340 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[62]
1341 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[58]
1342 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[30]
1343 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[30]
1344 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[26]
1345 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[54]
1346 462.721 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[54]
1347 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[49]
1348 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[25]
1349 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[57]
1350 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[41]
1351 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[41]
1352 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[57]
1353 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[33]
1354 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[49]
1355 462.724 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[33]
1356 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[63]
1357 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[47]
1358 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[55]
1359 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[47]
1360 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[55]
1361 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[39]
1362 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[63]
1363 462.725 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.800 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[39]
1364 462.731 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.687 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[46]
1365 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[25]
1366 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[49]
1367 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[57]
1368 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[25]
1369 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[25]
1370 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[41]
1371 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[33]
1372 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[57]
1373 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[49]
1374 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[41]
1375 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[33]
1376 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[33]
1377 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[41]
1378 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[49]
1379 462.735 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.791 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[57]
1380 462.736 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.789 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[57]
1381 462.736 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.789 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[49]
1382 462.736 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.789 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[25]
1383 462.736 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.789 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[41]
1384 462.736 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.789 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[33]
1385 462.737 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.681 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[59].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]: ADDOUTID[60]
1386 462.737 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.681 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[32]
1387 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[29]
1388 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[48]
1389 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[53]
1390 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[53]
1391 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[61]
1392 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[40]
1393 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[29]
1394 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[61]
1395 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[56]
1396 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[37]
1397 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[24]
1398 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[37]
1399 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[38]
1400 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[54]
1401 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[30]
1402 462.742 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.783 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[62]
1403 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[52]
1404 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[52]
1405 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[36]
1406 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[44]
1407 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[36]
1408 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[44]
1409 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[40]
1410 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[56]
1411 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[48]
1412 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[28]
1413 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[24]
1414 462.744 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.781 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[28]
1415 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[62]
1416 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[30]
1417 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[43]
1418 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[51]
1419 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[35]
1420 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[51]
1421 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[38]
1422 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[43]
1423 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[27]
1424 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[35]
1425 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[27]
1426 462.745 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.780 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[54]
1427 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[47]
1428 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[26]
1429 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[34]
1430 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[58]
1431 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[50]
1432 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[42]
1433 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[50]
1434 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[26]
1435 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[34]
1436 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[39]
1437 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[55]
1438 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[63]
1439 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[42]
1440 462.747 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.779 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[58]
1441 462.748 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.777 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[47]
1442 462.748 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.777 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[55]
1443 462.748 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.777 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[39]
1444 462.748 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.777 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[63]
1445 462.754 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 5.937 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[60].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0) PCID[60]: ADDOUTID[60]
1446 462.755 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.663 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[32]
1447 462.755 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.663 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[31]
1448 462.755 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.663 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[46]
1449 462.756 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.662 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[45]
1450 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[31].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]: ADDOUTID[33]
1451 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[41]
1452 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[32].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]: ADDOUTID[33]
1453 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[25]
1454 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[49]
1455 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[57]
1456 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[25]
1457 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[49]
1458 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[41]
1459 462.761 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.764 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[57]
1460 462.764 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.761 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[29]
1461 462.764 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.761 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[61]
1462 462.764 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.761 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[53]
1463 462.764 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.761 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[37]
1464 462.766 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.759 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[29]
1465 462.766 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.759 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[37]
1466 462.766 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.759 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[53]
1467 462.766 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.759 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[61]
1468 462.767 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.758 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[40]
1469 462.767 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.758 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[48]
1470 462.767 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.758 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[24]
1471 462.767 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.758 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[56]
1472 462.769 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.756 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[59].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]: ADDOUTID[62]
1473 462.769 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.756 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[38]
1474 462.769 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.756 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[54]
1475 462.769 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.756 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[30]
1476 462.772 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.753 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[39]
1477 462.772 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.753 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[47]
1478 462.772 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.753 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[59].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]: ADDOUTID[63]
1479 462.772 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.753 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[55]
1480 462.777 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.748 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[24]
1481 462.777 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.748 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[40]
1482 462.777 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.748 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[48]
1483 462.777 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.748 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[56]
1484 462.779 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.746 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[30]
1485 462.779 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.746 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[54]
1486 462.779 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.746 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[38]
1487 462.779 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.746 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[60].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0) PCID[60]: ADDOUTID[62]
1488 462.782 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.743 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[47]
1489 462.782 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.743 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[60].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0) PCID[60]: ADDOUTID[63]
1490 462.782 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.743 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[39]
1491 462.782 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.743 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[55]
1492 462.790 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.735 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[59].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]: ADDOUTID[61]
1493 462.790 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.735 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[29]
1494 462.790 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.735 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[37]
1495 462.790 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.735 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[53]
1496 462.802 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.723 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[29]
1497 462.802 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.723 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[37]
1498 462.802 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.723 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[53]
1499 462.802 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.723 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[60].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0) PCID[60]: ADDOUTID[61]
1500 462.808 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.717 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[36]
1501 462.808 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.717 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[44]
1502 462.808 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.717 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[52]
1503 462.808 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.717 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[28]
1504 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.716 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[48]
1505 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.716 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[40]
1506 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.716 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[24]
1507 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.716 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[56]
1508 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.715 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[56]
1509 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.715 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[24]
1510 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.715 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[48]
1511 462.810 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.715 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[40]
1512 462.812 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.713 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[51]
1513 462.812 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.713 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[27]
1514 462.812 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.713 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[43]
1515 462.812 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.713 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[35]
1516 462.814 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.984 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[62].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2) PCID[62]: ADDOUTID[63]
1517 462.814 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.711 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[46].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]: ADDOUTID[47]
1518 462.814 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.711 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[55]
1519 462.814 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.711 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[39]
1520 462.816 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.983 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[61].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1) PCID[61]: ADDOUTID[63]
1521 462.816 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.710 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[45].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]: ADDOUTID[47]
1522 462.816 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.710 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[39]
1523 462.816 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.710 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[55]
1524 462.819 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.707 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[28]
1525 462.819 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.707 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[52]
1526 462.819 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.707 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[44]
1527 462.819 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.707 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[36]
1528 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[43]
1529 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[51]
1530 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[35]
1531 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[43]
1532 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[35]
1533 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[27]
1534 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[51]
1535 462.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.702 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[27]
1536 462.828 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.385 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[14]
1537 462.831 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.382 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[15]
1538 462.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.689 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[58]
1539 462.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.689 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[34]
1540 462.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.689 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[26]
1541 462.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.689 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[50]
1542 462.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.689 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[42]
1543 462.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.687 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[30]
1544 462.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.687 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[61].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1) PCID[61]: ADDOUTID[62]
1545 462.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.687 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[38]
1546 462.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.687 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[54]
1547 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[35].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]: ADDOUTID[36]
1548 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[43].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]: ADDOUTID[44]
1549 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[51].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]: ADDOUTID[52]
1550 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[40]
1551 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[24]
1552 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[27].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]: ADDOUTID[28]
1553 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[56]
1554 462.844 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.681 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[48]
1555 462.848 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.365 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[13]
1556 462.851 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.362 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[12]
1557 462.851 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.362 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[11]
1558 462.853 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.360 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[10]
1559 462.861 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.664 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[52].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]: ADDOUTID[52]
1560 462.861 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.664 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[28].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]: ADDOUTID[28]
1561 462.861 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.664 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[36].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]: ADDOUTID[36]
1562 462.861 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.664 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[44].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]: ADDOUTID[44]
1563 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[24].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]: ADDOUTID[24]
1564 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[56].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]: ADDOUTID[56]
1565 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[40].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]: ADDOUTID[40]
1566 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[48].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]: ADDOUTID[48]
1567 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 5.936 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[63].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_3) PCID[63]: ADDOUTID[63]
1568 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[30].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]: ADDOUTID[30]
1569 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[38].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]: ADDOUTID[38]
1570 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[47].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]: ADDOUTID[47]
1571 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[33].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]: ADDOUTID[33]
1572 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[55].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]: ADDOUTID[55]
1573 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[57].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]: ADDOUTID[57]
1574 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[25].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]: ADDOUTID[25]
1575 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[62].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2) PCID[62]: ADDOUTID[62]
1576 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[41].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]: ADDOUTID[41]
1577 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[54].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]: ADDOUTID[54]
1578 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[39].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]: ADDOUTID[39]
1579 462.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.663 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[49].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]: ADDOUTID[49]
1580 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[58].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]: ADDOUTID[58]
1581 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[37].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]: ADDOUTID[37]
1582 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[53].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]: ADDOUTID[53]
1583 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[34].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]: ADDOUTID[34]
1584 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[61].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1) PCID[61]: ADDOUTID[61]
1585 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[29].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]: ADDOUTID[29]
1586 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[26].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]: ADDOUTID[26]
1587 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[50].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]: ADDOUTID[50]
1588 462.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.662 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[42].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]: ADDOUTID[42]
1589 462.876 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.227 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[14]
1590 462.880 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.224 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[15]
1591 462.896 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.317 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[8]
1592 462.896 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.207 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[13]
1593 462.897 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.316 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[6]
1594 462.899 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.204 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[12]
1595 462.899 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.204 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[14]
1596 462.899 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.204 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[11]
1597 462.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.312 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[7]
1598 462.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.202 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[10]
1599 462.903 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.200 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[15]
1600 462.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.197 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[14]
1601 462.910 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.193 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[15]
1602 462.918 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.295 37.884 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[5].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[5]
1603 462.921 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.182 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[13]
1604 462.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.178 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[14]
1605 462.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.178 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[14]
1606 462.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.178 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[14]
1607 462.927 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.177 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[14]
1608 462.927 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.177 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[13]
1609 462.929 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.174 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[15]
1610 462.929 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.174 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[15]
1611 462.929 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.174 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[12]
1612 462.929 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.174 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[15]
1613 462.930 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.174 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[11]
1614 462.930 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.173 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[15]
1615 462.931 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.172 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[10]
1616 462.934 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.169 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[14]
1617 462.938 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.166 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[15]
1618 462.946 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.157 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[13]
1619 462.946 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.157 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[13]
1620 462.946 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.157 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[13]
1621 462.947 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.156 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[13]
1622 462.948 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.155 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[12]
1623 462.948 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.155 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[12]
1624 462.948 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.155 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[12]
1625 462.949 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.154 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[11]
1626 462.949 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.154 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[11]
1627 462.949 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.154 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[11]
1628 462.949 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.154 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[12]
1629 462.950 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.153 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[11]
1630 462.951 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.153 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[10]
1631 462.951 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.153 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[10]
1632 462.951 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.153 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[10]
1633 462.952 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.151 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[10]
1634 462.954 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.149 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[13]
1635 462.957 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.146 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[12]
1636 462.957 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.146 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[11]
1637 462.959 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.144 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[10]
1638 462.962 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.251 37.841 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[4].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[4]
1639 462.966 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 5.247 37.836 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[3].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[3]
1640 462.973 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.130 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[12]
1641 462.975 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.129 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[8]
1642 462.975 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.128 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[6]
1643 462.977 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.126 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[11]
1644 462.979 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.124 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[7]
1645 462.997 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.106 37.884 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[5].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[5]
1646 462.997 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.106 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[8]
1647 462.999 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.104 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[8]
1648 462.999 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.104 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[6]
1649 463.002 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.101 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[7]
1650 463.008 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.096 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[8]
1651 463.009 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.094 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[6]
1652 463.012 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.091 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[7]
1653 463.017 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.086 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[7]
1654 463.018 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.086 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[10]
1655 463.021 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.082 37.884 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[5].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[5]
1656 463.033 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.070 37.884 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[5].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[5]
1657 463.040 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.063 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[8]
1658 463.041 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.063 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[8]
1659 463.045 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.058 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[7]
1660 463.046 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.057 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[7]
1661 463.049 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.054 37.841 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[4].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[4]
1662 463.052 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.819 36.948 500.000 FB1.uB.dut_inst.idex1.regrs1_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]
1663 463.052 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.819 36.948 500.000 FB1.uB.dut_inst.idex1.regrs1_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]
1664 463.052 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.819 36.948 500.000 FB1.uB.dut_inst.idex1.regrs1_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]
1665 463.052 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.819 36.948 500.000 FB1.uB.dut_inst.idex1.regrs1_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]
1666 463.053 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.050 37.836 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[3].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[3]
1667 463.053 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.050 37.836 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[3].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[3]
1668 463.057 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.046 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[8]
1669 463.060 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.812 36.940 500.000 FB1.uB.dut_inst.idex1.regrs2_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]
1670 463.060 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.812 36.940 500.000 FB1.uB.dut_inst.idex1.regrs2_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]
1671 463.060 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.812 36.940 500.000 FB1.uB.dut_inst.idex1.regrs2_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]
1672 463.060 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.812 36.940 500.000 FB1.uB.dut_inst.idex1.regrs2_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]
1673 463.068 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.035 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[6]
1674 463.075 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.028 37.841 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[4].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[4]
1675 463.075 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.028 37.902 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[7].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[7]
1676 463.091 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.012 37.841 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[4].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[4]
1677 463.093 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.010 37.906 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[6].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[6]
1678 463.093 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.010 37.884 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[5].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[5]
1679 463.194 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.677 36.806 500.000 FB1.uB.dut_inst.idex1.regrs1_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]
1680 463.202 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.670 36.798 500.000 FB1.uB.dut_inst.idex1.regrs2_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]
1681 463.329 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.648 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[60]
1682 463.330 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.374 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[59]
1683 463.338 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.639 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[60]
1684 463.339 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.365 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[59]
1685 463.345 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.633 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[60]
1686 463.345 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.359 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[59]
1687 463.348 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.629 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[60]
1688 463.349 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.355 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[59]
1689 463.380 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.325 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[46]
1690 463.389 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.316 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[46]
1691 463.395 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.309 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[46]
1692 463.399 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.305 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[46]
1693 463.400 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.304 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[45]
1694 463.409 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.295 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[45]
1695 463.412 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.566 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[60]
1696 463.412 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.292 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[59]
1697 463.413 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.564 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[60]
1698 463.413 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.398 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[62]
1699 463.413 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.291 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[59]
1700 463.415 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.289 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[45]
1701 463.417 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.394 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[63]
1702 463.419 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.285 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[45]
1703 463.422 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.389 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[62]
1704 463.426 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.385 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[63]
1705 463.429 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.382 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[62]
1706 463.432 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.379 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[63]
1707 463.433 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.379 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[62]
1708 463.434 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.377 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[61]
1709 463.436 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.375 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[63]
1710 463.439 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.373 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[58]
1711 463.443 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.368 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[61]
1712 463.448 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.364 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[58]
1713 463.449 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.362 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[61]
1714 463.449 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.362 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[56]
1715 463.450 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.361 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[54]
1716 463.452 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.252 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[32]
1717 463.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[61]
1718 463.453 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[57]
1719 463.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.358 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[55]
1720 463.454 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.357 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[58]
1721 463.456 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.248 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[31]
1722 463.458 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.353 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[58]
1723 463.458 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.353 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[56]
1724 463.459 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.352 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[54]
1725 463.461 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.243 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[32]
1726 463.462 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.349 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[57]
1727 463.462 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.242 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[46]
1728 463.463 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.349 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[55]
1729 463.463 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.241 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[46]
1730 463.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.346 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[56]
1731 463.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.346 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[54]
1732 463.465 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.239 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[31]
1733 463.468 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.237 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[32]
1734 463.468 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.343 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[57]
1735 463.469 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.343 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[56]
1736 463.469 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.342 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[55]
1737 463.469 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.342 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[54]
1738 463.470 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.341 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[53]
1739 463.471 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.233 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[32]
1740 463.472 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.232 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[31]
1741 463.472 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.339 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[57]
1742 463.473 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[52]
1743 463.473 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[55]
1744 463.473 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.338 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[51]
1745 463.475 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.336 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[50]
1746 463.476 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.229 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[31]
1747 463.479 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.332 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[53]
1748 463.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.329 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[52]
1749 463.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.329 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[51]
1750 463.482 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.222 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[45]
1751 463.484 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.221 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[45]
1752 463.484 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.327 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[50]
1753 463.486 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.325 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[53]
1754 463.486 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.325 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[48]
1755 463.488 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.323 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[52]
1756 463.489 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.322 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[51]
1757 463.490 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.322 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[53]
1758 463.490 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.322 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[49]
1759 463.490 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[47]
1760 463.490 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.321 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[50]
1761 463.492 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.319 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[52]
1762 463.493 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.319 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[51]
1763 463.494 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.317 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[50]
1764 463.495 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.316 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[48]
1765 463.496 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.315 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[62]
1766 463.497 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.314 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[62]
1767 463.499 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.313 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[49]
1768 463.499 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.312 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[47]
1769 463.499 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.312 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[63]
1770 463.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.311 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[63]
1771 463.501 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.310 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[48]
1772 463.505 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.306 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[49]
1773 463.505 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.306 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[48]
1774 463.506 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.306 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[47]
1775 463.507 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 0.000 65.467 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1) forwardA[1]
1776 463.507 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 0.000 65.467 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3) forwardB[1]
1777 463.509 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.302 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[49]
1778 463.509 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.302 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[44]
1779 463.509 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.302 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[47]
1780 463.510 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.301 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[43]
1781 463.512 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.299 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[42]
1782 463.516 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.295 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[61]
1783 463.517 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.294 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[61]
1784 463.518 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.293 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[44]
1785 463.519 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.292 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[43]
1786 463.521 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.290 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[42]
1787 463.521 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.290 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[58]
1788 463.522 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.289 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[58]
1789 463.523 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.289 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[40]
1790 463.523 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.288 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[38]
1791 463.525 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.286 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[44]
1792 463.525 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.286 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[43]
1793 463.526 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.285 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[41]
1794 463.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[39]
1795 463.527 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.284 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[42]
1796 463.529 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.283 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[44]
1797 463.529 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.282 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[43]
1798 463.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.280 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[42]
1799 463.531 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.280 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[40]
1800 463.532 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.279 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[56]
1801 463.532 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.279 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[38]
1802 463.532 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.279 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[54]
1803 463.533 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.278 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[56]
1804 463.534 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.277 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[54]
1805 463.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.170 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[32]
1806 463.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.276 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[41]
1807 463.535 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.276 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[57]
1808 463.536 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.275 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[39]
1809 463.536 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.168 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[32]
1810 463.536 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.275 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[55]
1811 463.537 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.275 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[57]
1812 463.537 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.274 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[55]
1813 463.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.273 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[40]
1814 463.538 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.273 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[38]
1815 463.539 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.165 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[31]
1816 463.540 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.164 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[31]
1817 463.542 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.270 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[41]
1818 463.542 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.269 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[40]
1819 463.542 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.269 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[39]
1820 463.542 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.269 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[38]
1821 463.543 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.268 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[37]
1822 463.545 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.266 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[41]
1823 463.546 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[39]
1824 463.546 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[36]
1825 463.547 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.265 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[35]
1826 463.548 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.263 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[34]
1827 463.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.259 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[37]
1828 463.553 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.258 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[53]
1829 463.554 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.257 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[53]
1830 463.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.256 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[36]
1831 463.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.256 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[52]
1832 463.555 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.256 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[35]
1833 463.556 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.255 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[51]
1834 463.556 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.255 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[52]
1835 463.557 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.254 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[51]
1836 463.557 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.254 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[34]
1837 463.558 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.253 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[50]
1838 463.559 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.252 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[50]
1839 463.559 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.252 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[37]
1840 463.560 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.251 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[30]
1841 463.561 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.250 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[36]
1842 463.562 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.249 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[35]
1843 463.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.248 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[33]
1844 463.563 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.248 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[37]
1845 463.564 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.247 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[34]
1846 463.565 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.246 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[36]
1847 463.566 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.245 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[35]
1848 463.567 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.244 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[34]
1849 463.568 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.243 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[48]
1850 463.569 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.242 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[30]
1851 463.570 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.242 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[48]
1852 463.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.239 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[33]
1853 463.572 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.239 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[49]
1854 463.573 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.239 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[47]
1855 463.573 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.238 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[49]
1856 463.574 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.237 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[47]
1857 463.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.130 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[9]
1858 463.575 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.236 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[30]
1859 463.578 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.233 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[33]
1860 463.579 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.232 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[30]
1861 463.580 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.231 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[29]
1862 463.582 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.229 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[33]
1863 463.583 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.229 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[28]
1864 463.583 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.228 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[27]
1865 463.585 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.226 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[26]
1866 463.589 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.222 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[29]
1867 463.591 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.220 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[28]
1868 463.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.219 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[44]
1869 463.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.219 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[27]
1870 463.592 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.219 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[43]
1871 463.593 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.218 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[44]
1872 463.594 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.218 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[43]
1873 463.594 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.217 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[26]
1874 463.594 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.217 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[42]
1875 463.595 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.216 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[42]
1876 463.596 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.216 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[29]
1877 463.596 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.215 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[24]
1878 463.598 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.213 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[28]
1879 463.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.213 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[27]
1880 463.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.212 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[29]
1881 463.599 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.212 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[25]
1882 463.600 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.211 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[26]
1883 463.602 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.209 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[28]
1884 463.602 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.209 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[27]
1885 463.604 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.207 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[26]
1886 463.605 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.206 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[24]
1887 463.605 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.206 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[40]
1888 463.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.205 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[38]
1889 463.606 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.205 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[40]
1890 463.607 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.204 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[38]
1891 463.608 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.203 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[25]
1892 463.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.203 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[41]
1893 463.609 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.202 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[39]
1894 463.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.201 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[41]
1895 463.610 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.201 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[39]
1896 463.611 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.200 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[24]
1897 463.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.196 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[25]
1898 463.615 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.196 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[24]
1899 463.619 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.193 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[25]
1900 463.626 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.185 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[37]
1901 463.627 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.184 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[37]
1902 463.628 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.183 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[36]
1903 463.629 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.182 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[35]
1904 463.630 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.181 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[36]
1905 463.630 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.181 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[35]
1906 463.631 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.180 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[34]
1907 463.632 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.179 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[34]
1908 463.642 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.169 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[30]
1909 463.643 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.168 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[30]
1910 463.645 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.166 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[33]
1911 463.646 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.165 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[33]
1912 463.663 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.149 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[29]
1913 463.664 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.147 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[29]
1914 463.665 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.146 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[28]
1915 463.666 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.146 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[27]
1916 463.666 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.145 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[28]
1917 463.667 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.144 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[27]
1918 463.667 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.144 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[26]
1919 463.669 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.143 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[26]
1920 463.678 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.133 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[24]
1921 463.679 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.132 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[24]
1922 463.682 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.129 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[25]
1923 463.683 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.128 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[25]
1924 463.694 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 4.010 38.331 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[9].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[9]
1925 463.714 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.263 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[60]
1926 463.714 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.990 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[59]
1927 463.740 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 6.237 38.568 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[60].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[60]
1928 463.741 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.963 38.567 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[59].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[59]
1929 463.764 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.940 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[46]
1930 463.785 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.920 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[45]
1931 463.788 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.422 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[22]
1932 463.791 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.913 38.517 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[46].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[46]
1933 463.792 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.418 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[23]
1934 463.798 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.013 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[62]
1935 463.802 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 4.010 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[63]
1936 463.809 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.402 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[21]
1937 463.811 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.893 38.497 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[45].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[45]
1938 463.811 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.399 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[20]
1939 463.812 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.399 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[19]
1940 463.813 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.397 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[18]
1941 463.818 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.993 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[61]
1942 463.823 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.988 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[58]
1943 463.824 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.386 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[16]
1944 463.824 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.987 38.484 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[62].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[62]
1945 463.827 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.273 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[22]
1946 463.828 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 5.382 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[17]
1947 463.828 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.983 38.480 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[63].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[63]
1948 463.831 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.269 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[23]
1949 463.834 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.977 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[56]
1950 463.835 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.977 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[54]
1951 463.836 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.264 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[22]
1952 463.837 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.867 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[32]
1953 463.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.974 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[57]
1954 463.838 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.973 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[55]
1955 463.840 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.260 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[23]
1956 463.841 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.863 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[31]
1957 463.845 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.966 38.463 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[61].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[61]
1958 463.848 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.252 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[21]
1959 463.850 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.962 38.458 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[58].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[58]
1960 463.850 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.250 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[20]
1961 463.851 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.249 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[19]
1962 463.853 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.248 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[18]
1963 463.855 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.956 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[53]
1964 463.857 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.243 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[21]
1965 463.857 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.954 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[52]
1966 463.858 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.953 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[51]
1967 463.859 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.241 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[20]
1968 463.860 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.240 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[19]
1969 463.860 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[50]
1970 463.860 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.951 38.448 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[56].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[56]
1971 463.861 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.950 38.447 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[54].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[54]
1972 463.862 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.239 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[18]
1973 463.863 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.841 38.445 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[32].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[32]
1974 463.864 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.444 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[57].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[57]
1975 463.865 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.947 38.443 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[55].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[55]
1976 463.867 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.234 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[22]
1977 463.867 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.233 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[17]
1978 463.867 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.146) = 25.146 3.837 38.441 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[31].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[31]
1979 463.870 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.230 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[23]
1980 463.871 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.941 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[48]
1981 463.872 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.228 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[16]
1982 463.874 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.937 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[49]
1983 463.875 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.936 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[47]
1984 463.876 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.224 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]: ADDOUTID[17]
1985 463.881 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.930 38.427 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[53].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[53]
1986 463.884 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.927 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[52].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[52]
1987 463.884 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.927 38.424 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[51].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[51]
1988 463.886 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.214 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[22]
1989 463.886 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.214 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[22]
1990 463.886 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.214 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[22]
1991 463.886 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.925 38.422 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[50].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[50]
1992 463.887 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.213 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[21]
1993 463.887 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.213 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[22]
1994 463.889 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.211 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[23]
1995 463.889 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.211 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[23]
1996 463.889 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.211 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[23]
1997 463.889 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.211 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[20]
1998 463.890 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.210 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[19]
1999 463.891 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.210 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[23]
2000 463.892 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.208 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[18]
2001 463.894 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[44]
2002 463.894 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.206 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[22]
2003 463.895 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.917 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[43]
2004 463.896 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.204 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]: ADDOUTID[16]
2005 463.896 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.915 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[42]
2006 463.897 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.914 38.411 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[48].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[48]
2007 463.898 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.202 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[23]
2008 463.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.911 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[49].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[49]
2009 463.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.910 38.407 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[47].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[47]
2010 463.903 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.198 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[16]
2011 463.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.194 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[21]
2012 463.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.194 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[2].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]: ADDOUTID[17]
2013 463.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.194 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[21]
2014 463.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.194 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[21]
2015 463.907 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.904 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[40]
2016 463.907 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.193 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[21]
2017 463.908 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.903 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[38]
2018 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.192 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[20]
2019 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.192 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[20]
2020 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.192 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[20]
2021 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.191 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[19]
2022 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.191 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[19]
2023 463.909 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.191 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[19]
2024 463.910 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.190 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[20]
2025 463.910 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.190 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[19]
2026 463.911 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[41]
2027 463.911 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.189 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[18]
2028 463.911 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.189 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[18]
2029 463.911 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.189 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[18]
2030 463.911 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.900 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[39]
2031 463.912 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.188 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[18]
2032 463.915 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.185 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[21]
2033 463.917 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.183 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[20]
2034 463.918 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.182 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[19]
2035 463.920 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.181 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[18]
2036 463.920 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.891 38.388 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[44].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[44]
2037 463.921 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.890 38.387 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[43].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[43]
2038 463.922 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.178 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[16]
2039 463.922 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.178 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[16]
2040 463.922 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.178 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[16]
2041 463.923 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.888 38.385 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[42].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[42]
2042 463.923 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.177 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[16]
2043 463.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.175 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[3].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]: ADDOUTID[17]
2044 463.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.175 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[6].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]: ADDOUTID[17]
2045 463.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.175 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[4].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]: ADDOUTID[17]
2046 463.927 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.174 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[5].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]: ADDOUTID[17]
2047 463.928 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.883 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[37]
2048 463.930 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.170 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[16]
2049 463.931 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.881 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[36]
2050 463.931 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.169 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[14]
2051 463.931 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.880 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[35]
2052 463.933 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[34]
2053 463.934 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.878 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[40].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[40]
2054 463.934 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.166 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[7].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]: ADDOUTID[17]
2055 463.934 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.877 38.374 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[38].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[38]
2056 463.935 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.166 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[15]
2057 463.937 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.874 38.371 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[41].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[41]
2058 463.938 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.873 38.370 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[39].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[39]
2059 463.944 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.867 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[30]
2060 463.947 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.864 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[33]
2061 463.951 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.149 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[13]
2062 463.954 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.146 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[12]
2063 463.954 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.146 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[11]
2064 463.954 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.146 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[14]
2065 463.955 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.857 38.353 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[37].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[37]
2066 463.956 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.144 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[10]
2067 463.957 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.351 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[36].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[36]
2068 463.958 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.854 38.350 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[35].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[35]
2069 463.958 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.142 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[15]
2070 463.959 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.852 38.349 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[34].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[34]
2071 463.965 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.846 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[29]
2072 463.967 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.844 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[28]
2073 463.968 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.843 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[27]
2074 463.970 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.842 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[26]
2075 463.970 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.130 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[14]
2076 463.971 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.840 38.337 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[30].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[30]
2077 463.974 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.837 38.334 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[33].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[33]
2078 463.974 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.126 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[15]
2079 463.976 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.124 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[13]
2080 463.978 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.122 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[14]
2081 463.980 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.831 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[24]
2082 463.981 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.119 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[15]
2083 463.984 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.827 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[25]
2084 463.991 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.820 38.317 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[29].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[29]
2085 463.991 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.109 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[13]
2086 463.994 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.818 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[28].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[28]
2087 463.994 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.817 38.314 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[27].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[27]
2088 463.996 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.815 38.312 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[26].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[26]
2089 464.000 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.100 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[13]
2090 464.007 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.804 38.301 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[24].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[24]
2091 464.007 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.804 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[22]
2092 464.010 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:5.039) = 25.039 3.801 38.298 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[25].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[25]
2093 464.011 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.800 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[23]
2094 464.028 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.783 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[21]
2095 464.028 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.072 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[12]
2096 464.028 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.783 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[22]
2097 464.030 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.781 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[20]
2098 464.031 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.780 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[19]
2099 464.031 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.780 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[22]
2100 464.032 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.068 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[11]
2101 464.032 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.068 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[11]
2102 464.033 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.779 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[23]
2103 464.033 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.779 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[18]
2104 464.034 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.777 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[23]
2105 464.035 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.065 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[12]
2106 464.039 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.061 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[11].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[11]
2107 464.047 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.764 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[17]
2108 464.050 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.761 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[21]
2109 464.052 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.048 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[14]
2110 464.052 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.759 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[21]
2111 464.054 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.046 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[12]
2112 464.055 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.756 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[22]
2113 464.055 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.045 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[15]
2114 464.058 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.753 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[23]
2115 464.064 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.036 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[10]
2116 464.065 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.746 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[22]
2117 464.068 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.743 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[23]
2118 464.071 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.029 37.907 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[8].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[8]
2119 464.073 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.028 37.950 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[10].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[10]
2120 464.075 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.025 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[13]
2121 464.076 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.735 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[21]
2122 464.088 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 4.012 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[15]
2123 464.088 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.723 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[21]
2124 464.094 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.717 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[20]
2125 464.098 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.713 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[19]
2126 464.100 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.711 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[23]
2127 464.102 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.710 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[23]
2128 464.105 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.707 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[20]
2129 464.109 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.702 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[19]
2130 464.109 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.702 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[19]
2131 464.111 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.990 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[14]
2132 464.123 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.689 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[18]
2133 464.124 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.687 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[22]
2134 464.130 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.681 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[19].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]: ADDOUTID[20]
2135 464.134 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.966 37.952 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[12].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[12]
2136 464.136 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.964 37.955 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[13].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[13]
2137 464.147 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.664 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[20].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]: ADDOUTID[20]
2138 464.148 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.663 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[16].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]: ADDOUTID[16]
2139 464.148 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.663 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[17].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]: ADDOUTID[17]
2140 464.148 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.663 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[23].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]: ADDOUTID[23]
2141 464.148 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.663 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[22].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]: ADDOUTID[22]
2142 464.149 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.662 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[18].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]: ADDOUTID[18]
2143 464.149 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.662 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[21].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]: ADDOUTID[21]
2144 464.340 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.804 35.660 500.000 FB1.uB.dut_inst.idex1.aluop2_out.Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_1) ALUOP2EX
2145 464.340 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.804 35.660 500.000 FB1.uB.dut_inst.idex1.aluop3_out.Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_2) ALUOP3EX
2146 464.353 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.791 35.647 500.000 FB1.uB.dut_inst.idex1.func3_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_0) FUNC3EX[0]
2147 464.353 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.791 35.647 500.000 FB1.uB.dut_inst.idex1.func3_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_1) FUNC3EX[1]
2148 464.353 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.791 35.647 500.000 FB1.uB.dut_inst.idex1.func3_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_2) FUNC3EX[2]
2149 464.356 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.789 35.645 500.000 FB1.uB.dut_inst.idex1.func7_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_3) FUNC7EX[4]
2150 464.356 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.789 35.645 500.000 FB1.uB.dut_inst.idex1.func7_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_3) FUNC7EX[0]
2151 464.356 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.789 35.645 500.000 FB1.uB.dut_inst.idex1.func7_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_2) FUNC7EX[3]
2152 464.356 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.789 35.645 500.000 FB1.uB.dut_inst.idex1.func7_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_0) FUNC7EX[1]
2153 464.356 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.789 35.645 500.000 FB1.uB.dut_inst.idex1.func7_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_1) FUNC7EX[2]
2154 464.366 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.778 35.634 500.000 FB1.uB.dut_inst.idex1.aluop1_out.Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_0) ALUOP1EX
2155 464.377 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.833 36.425 500.803 FB1.uA.dut_inst.ifid1.out_pc[1].Q FB1.uA.dut_inst.pc1.PC[1].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]: ADDOUTID[1]
2156 464.386 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.759 35.614 500.000 FB1.uB.dut_inst.idex1.func7_out[5].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_0) FUNC7EX[5]
2157 464.389 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.711 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[15]
2158 464.434 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 0.000 64.540 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2) forwardB[0]
2159 464.434 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 0.000 64.540 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0) forwardA[0]
2160 464.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.663 37.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[14].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[14]
2161 464.437 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:4.750) = 24.750 3.663 37.971 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[15].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[15]
2162 464.516 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.629 35.484 500.000 FB1.uB.dut_inst.idex1.readdata1_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_0) RD1EX[0]
2163 464.518 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.626 35.482 500.000 FB1.uB.dut_inst.idex1.readdata1_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_1) RD1EX[1]
2164 464.523 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.621 35.477 500.000 FB1.uB.dut_inst.idex1.readdata2_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_0) RD2EX[0]
2165 464.526 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.619 35.474 500.000 FB1.uB.dut_inst.idex1.readdata2_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_1) RD2EX[1]
2166 464.537 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.607 35.463 500.000 FB1.uB.dut_inst.idex1.readdata1_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_2) RD1EX[2]
2167 464.537 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.607 35.463 500.000 FB1.uB.dut_inst.idex1.readdata1_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_3) RD1EX[3]
2168 464.537 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.607 35.463 500.000 FB1.uB.dut_inst.idex1.readdata1_out[5].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_1) RD1EX[5]
2169 464.539 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.606 35.461 500.000 FB1.uB.dut_inst.idex1.readdata1_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_0) RD1EX[4]
2170 464.545 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.599 35.455 500.000 FB1.uB.dut_inst.idex1.readdata2_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_3) RD2EX[3]
2171 464.545 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.599 35.455 500.000 FB1.uB.dut_inst.idex1.readdata2_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_2) RD2EX[2]
2172 464.545 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.599 35.455 500.000 FB1.uB.dut_inst.idex1.readdata2_out[5].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_1) RD2EX[5]
2173 464.546 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.598 35.454 500.000 FB1.uB.dut_inst.idex1.readdata2_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_0) RD2EX[4]
2174 464.552 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.592 35.448 500.000 FB1.uB.dut_inst.idex1.readdata1_out[8].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_0) RD1EX[8]
2175 464.555 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.590 35.445 500.000 FB1.uB.dut_inst.idex1.readdata1_out[9].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_1) RD1EX[9]
2176 464.560 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.584 35.440 500.000 FB1.uB.dut_inst.idex1.readdata2_out[8].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_0) RD2EX[8]
2177 464.562 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.582 35.438 500.000 FB1.uB.dut_inst.idex1.readdata2_out[9].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_1) RD2EX[9]
2178 464.564 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.581 35.436 500.000 FB1.uB.dut_inst.idex1.readdata1_out[7].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_3) RD1EX[7]
2179 464.564 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.581 35.436 500.000 FB1.uB.dut_inst.idex1.readdata1_out[6].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_2) RD1EX[6]
2180 464.571 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.573 35.429 500.000 FB1.uB.dut_inst.idex1.readdata2_out[6].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_2) RD2EX[6]
2181 464.571 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.573 35.429 500.000 FB1.uB.dut_inst.idex1.readdata2_out[7].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_3) RD2EX[7]
2182 464.574 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.570 35.426 500.000 FB1.uB.dut_inst.idex1.readdata1_out[11].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_3) RD1EX[11]
2183 464.574 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.570 35.426 500.000 FB1.uB.dut_inst.idex1.readdata2_out[13].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_1) RD2EX[13]
2184 464.574 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.570 35.426 500.000 FB1.uB.dut_inst.idex1.readdata1_out[10].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_2) RD1EX[10]
2185 464.575 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.569 35.425 500.000 FB1.uB.dut_inst.idex1.readdata1_out[12].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_0) RD1EX[12]
2186 464.582 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.563 35.418 500.000 FB1.uB.dut_inst.idex1.readdata2_out[10].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_2) RD2EX[10]
2187 464.582 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.563 35.418 500.000 FB1.uB.dut_inst.idex1.readdata2_out[11].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_3) RD2EX[11]
2188 464.582 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.563 35.418 500.000 FB1.uB.dut_inst.idex1.readdata1_out[13].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_1) RD1EX[13]
2189 464.583 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.562 35.417 500.000 FB1.uB.dut_inst.idex1.readdata2_out[12].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_0) RD2EX[12]
2190 464.587 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.558 35.413 500.000 FB1.uB.dut_inst.idex1.alusrc_out.Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_3) ALUSRCEX
2191 464.589 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.555 35.411 500.000 FB1.uB.dut_inst.idex1.readdata2_out[16].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_0) RD2EX[16]
2192 464.591 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.553 35.409 500.000 FB1.uB.dut_inst.idex1.readdata2_out[17].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_1) RD2EX[17]
2193 464.597 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.548 35.403 500.000 FB1.uB.dut_inst.idex1.readdata1_out[16].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_0) RD1EX[16]
2194 464.599 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.545 35.401 500.000 FB1.uB.dut_inst.idex1.readdata1_out[17].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_1) RD1EX[17]
2195 464.600 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.544 35.400 500.000 FB1.uB.dut_inst.idex1.readdata2_out[15].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_3) RD2EX[15]
2196 464.600 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.544 35.400 500.000 FB1.uB.dut_inst.idex1.readdata2_out[14].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_2) RD2EX[14]
2197 464.608 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.536 35.392 500.000 FB1.uB.dut_inst.idex1.readdata1_out[15].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_3) RD1EX[15]
2198 464.608 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.536 35.392 500.000 FB1.uB.dut_inst.idex1.readdata1_out[14].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_2) RD1EX[14]
2199 464.611 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.534 35.389 500.000 FB1.uB.dut_inst.idex1.readdata2_out[21].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_1) RD2EX[21]
2200 464.611 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.534 35.389 500.000 FB1.uB.dut_inst.idex1.readdata2_out[18].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_2) RD2EX[18]
2201 464.611 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.534 35.389 500.000 FB1.uB.dut_inst.idex1.readdata2_out[19].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_3) RD2EX[19]
2202 464.612 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.533 35.388 500.000 FB1.uB.dut_inst.idex1.readdata2_out[20].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_0) RD2EX[20]
2203 464.618 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.526 35.382 500.000 FB1.uB.dut_inst.idex1.readdata1_out[19].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_3) RD1EX[19]
2204 464.618 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.526 35.382 500.000 FB1.uB.dut_inst.idex1.readdata1_out[21].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_1) RD1EX[21]
2205 464.618 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.526 35.382 500.000 FB1.uB.dut_inst.idex1.readdata1_out[18].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_2) RD1EX[18]
2206 464.619 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.525 35.381 500.000 FB1.uB.dut_inst.idex1.readdata1_out[20].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_0) RD1EX[20]
2207 464.626 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.519 35.374 500.000 FB1.uB.dut_inst.idex1.readdata2_out[24].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_0) RD2EX[24]
2208 464.628 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.516 35.372 500.000 FB1.uB.dut_inst.idex1.readdata2_out[25].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_1) RD2EX[25]
2209 464.633 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.511 35.367 500.000 FB1.uB.dut_inst.idex1.readdata1_out[24].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_0) RD1EX[24]
2210 464.636 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.509 35.364 500.000 FB1.uB.dut_inst.idex1.readdata1_out[25].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_1) RD1EX[25]
2211 464.637 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.507 35.363 500.000 FB1.uB.dut_inst.idex1.readdata2_out[23].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_3) RD2EX[23]
2212 464.637 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.507 35.363 500.000 FB1.uB.dut_inst.idex1.readdata2_out[22].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_2) RD2EX[22]
2213 464.645 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.500 35.355 500.000 FB1.uB.dut_inst.idex1.readdata1_out[22].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_2) RD1EX[22]
2214 464.645 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.500 35.355 500.000 FB1.uB.dut_inst.idex1.readdata1_out[23].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_3) RD1EX[23]
2215 464.647 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.497 35.353 500.000 FB1.uB.dut_inst.idex1.readdata2_out[27].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_3) RD2EX[27]
2216 464.647 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.497 35.353 500.000 FB1.uB.dut_inst.idex1.readdata2_out[29].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_1) RD2EX[29]
2217 464.647 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.497 35.353 500.000 FB1.uB.dut_inst.idex1.readdata2_out[26].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_2) RD2EX[26]
2218 464.648 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.496 35.352 500.000 FB1.uB.dut_inst.idex1.readdata2_out[28].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_0) RD2EX[28]
2219 464.655 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.490 35.345 500.000 FB1.uB.dut_inst.idex1.readdata1_out[27].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_3) RD1EX[27]
2220 464.655 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.490 35.345 500.000 FB1.uB.dut_inst.idex1.readdata1_out[29].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_1) RD1EX[29]
2221 464.655 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.490 35.345 500.000 FB1.uB.dut_inst.idex1.readdata1_out[26].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_2) RD1EX[26]
2222 464.656 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.488 35.344 500.000 FB1.uB.dut_inst.idex1.readdata1_out[28].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_0) RD1EX[28]
2223 464.662 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.482 35.338 500.000 FB1.uB.dut_inst.idex1.readdata2_out[32].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_0) RD2EX[32]
2224 464.665 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.480 35.335 500.000 FB1.uB.dut_inst.idex1.readdata2_out[33].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_1) RD2EX[33]
2225 464.670 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.475 35.330 500.000 FB1.uB.dut_inst.idex1.readdata1_out[32].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_0) RD1EX[32]
2226 464.672 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.472 35.328 500.000 FB1.uB.dut_inst.idex1.readdata1_out[33].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_1) RD1EX[33]
2227 464.674 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.471 35.326 500.000 FB1.uB.dut_inst.idex1.readdata2_out[31].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_3) RD2EX[31]
2228 464.674 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.471 35.326 500.000 FB1.uB.dut_inst.idex1.readdata2_out[30].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_2) RD2EX[30]
2229 464.681 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.463 35.319 500.000 FB1.uB.dut_inst.idex1.readdata1_out[31].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_3) RD1EX[31]
2230 464.681 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.463 35.319 500.000 FB1.uB.dut_inst.idex1.readdata1_out[30].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_2) RD1EX[30]
2231 464.684 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.461 35.316 500.000 FB1.uB.dut_inst.idex1.readdata2_out[34].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_2) RD2EX[34]
2232 464.684 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.461 35.316 500.000 FB1.uB.dut_inst.idex1.readdata2_out[35].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_3) RD2EX[35]
2233 464.684 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.461 35.316 500.000 FB1.uB.dut_inst.idex1.readdata2_out[37].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_1) RD2EX[37]
2234 464.685 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.459 35.315 500.000 FB1.uB.dut_inst.idex1.readdata2_out[36].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_0) RD2EX[36]
2235 464.691 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.453 35.309 500.000 FB1.uB.dut_inst.idex1.readdata1_out[34].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_2) RD1EX[34]
2236 464.691 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.453 35.309 500.000 FB1.uB.dut_inst.idex1.readdata1_out[35].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_3) RD1EX[35]
2237 464.691 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.453 35.309 500.000 FB1.uB.dut_inst.idex1.readdata1_out[37].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_1) RD1EX[37]
2238 464.693 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.452 35.307 500.000 FB1.uB.dut_inst.idex1.readdata1_out[36].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_0) RD1EX[36]
2239 464.699 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.446 35.301 500.000 FB1.uB.dut_inst.idex1.readdata2_out[40].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_0) RD2EX[40]
2240 464.701 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.443 35.299 500.000 FB1.uB.dut_inst.idex1.readdata2_out[41].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_1) RD2EX[41]
2241 464.706 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.438 35.294 500.000 FB1.uB.dut_inst.idex1.readdata1_out[40].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_0) RD1EX[40]
2242 464.709 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.436 35.291 500.000 FB1.uB.dut_inst.idex1.readdata1_out[41].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_1) RD1EX[41]
2243 464.710 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.434 35.290 500.000 FB1.uB.dut_inst.idex1.readdata2_out[38].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_2) RD2EX[38]
2244 464.710 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.434 35.290 500.000 FB1.uB.dut_inst.idex1.readdata2_out[39].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_3) RD2EX[39]
2245 464.718 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.427 35.282 500.000 FB1.uB.dut_inst.idex1.readdata1_out[38].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_2) RD1EX[38]
2246 464.718 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.427 35.282 500.000 FB1.uB.dut_inst.idex1.readdata1_out[39].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_3) RD1EX[39]
2247 464.720 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.424 35.280 500.000 FB1.uB.dut_inst.idex1.readdata2_out[42].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_2) RD2EX[42]
2248 464.720 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.424 35.280 500.000 FB1.uB.dut_inst.idex1.readdata2_out[43].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_3) RD2EX[43]
2249 464.720 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.424 35.280 500.000 FB1.uB.dut_inst.idex1.readdata2_out[45].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_1) RD2EX[45]
2250 464.722 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.423 35.278 500.000 FB1.uB.dut_inst.idex1.readdata2_out[44].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_0) RD2EX[44]
2251 464.728 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.416 35.272 500.000 FB1.uB.dut_inst.idex1.readdata1_out[43].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_3) RD1EX[43]
2252 464.728 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.416 35.272 500.000 FB1.uB.dut_inst.idex1.readdata1_out[42].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_2) RD1EX[42]
2253 464.728 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.416 35.272 500.000 FB1.uB.dut_inst.idex1.readdata1_out[45].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_1) RD1EX[45]
2254 464.729 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.415 35.271 500.000 FB1.uB.dut_inst.idex1.readdata1_out[44].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_0) RD1EX[44]
2255 464.747 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.398 35.253 500.000 FB1.uB.dut_inst.idex1.readdata2_out[47].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_3) RD2EX[47]
2256 464.747 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.398 35.253 500.000 FB1.uB.dut_inst.idex1.readdata2_out[46].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_2) RD2EX[46]
2257 464.754 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.390 35.246 500.000 FB1.uB.dut_inst.idex1.readdata1_out[46].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_2) RD1EX[46]
2258 464.754 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.390 35.246 500.000 FB1.uB.dut_inst.idex1.readdata1_out[47].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_3) RD1EX[47]
2259 464.756 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 6.728 36.047 500.803 FB1.uA.dut_inst.ifid1.out_pc[0].Q FB1.uA.dut_inst.pc1.PC[0].D (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_0) PCID[0]: ADDOUTID[0]
2260 464.756 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.389 35.244 500.000 FB1.uB.dut_inst.idex1.func7_out[6].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_1) FUNC7EX[6]
2261 464.768 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.376 35.232 500.000 FB1.uB.dut_inst.idex1.readdata2_out[48].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_0) RD2EX[48]
2262 464.771 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.374 35.229 500.000 FB1.uB.dut_inst.idex1.readdata2_out[49].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_1) RD2EX[49]
2263 464.776 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.368 35.224 500.000 FB1.uB.dut_inst.idex1.readdata1_out[48].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_0) RD1EX[48]
2264 464.778 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.366 35.222 500.000 FB1.uB.dut_inst.idex1.readdata1_out[49].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_1) RD1EX[49]
2265 464.790 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.354 35.210 500.000 FB1.uB.dut_inst.idex1.readdata2_out[51].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_3) RD2EX[51]
2266 464.790 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.354 35.210 500.000 FB1.uB.dut_inst.idex1.readdata2_out[53].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_1) RD2EX[53]
2267 464.790 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.354 35.210 500.000 FB1.uB.dut_inst.idex1.readdata2_out[50].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_2) RD2EX[50]
2268 464.791 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.353 35.209 500.000 FB1.uB.dut_inst.idex1.readdata2_out[52].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_0) RD2EX[52]
2269 464.798 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.347 35.202 500.000 FB1.uB.dut_inst.idex1.readdata1_out[53].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_1) RD1EX[53]
2270 464.798 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.347 35.202 500.000 FB1.uB.dut_inst.idex1.readdata1_out[51].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_3) RD1EX[51]
2271 464.798 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.347 35.202 500.000 FB1.uB.dut_inst.idex1.readdata1_out[50].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_2) RD1EX[50]
2272 464.799 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.346 35.201 500.000 FB1.uB.dut_inst.idex1.readdata1_out[52].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_0) RD1EX[52]
2273 464.816 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.328 35.184 500.000 FB1.uB.dut_inst.idex1.readdata2_out[54].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_2) RD2EX[54]
2274 464.816 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.328 35.184 500.000 FB1.uB.dut_inst.idex1.readdata2_out[55].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_3) RD2EX[55]
2275 464.824 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.320 35.176 500.000 FB1.uB.dut_inst.idex1.readdata1_out[54].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_2) RD1EX[54]
2276 464.824 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.320 35.176 500.000 FB1.uB.dut_inst.idex1.readdata1_out[55].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_3) RD1EX[55]
2277 464.874 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.271 35.126 500.000 FB1.uB.dut_inst.idex1.imm_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_2) IMMEX[0]
2278 464.874 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.270 35.126 500.000 FB1.uB.dut_inst.idex1.readdata2_out[56].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_0) RD2EX[56]
2279 464.876 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.268 35.124 500.000 FB1.uB.dut_inst.idex1.imm_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_3) IMMEX[1]
2280 464.876 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.268 35.124 500.000 FB1.uB.dut_inst.idex1.readdata2_out[57].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_1) RD2EX[57]
2281 464.882 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.263 35.118 500.000 FB1.uB.dut_inst.idex1.readdata1_out[56].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_0) RD1EX[56]
2282 464.882 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.215 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[22]
2283 464.884 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.260 35.116 500.000 FB1.uB.dut_inst.idex1.readdata1_out[57].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_1) RD1EX[57]
2284 464.886 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.211 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[23]
2285 464.886 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.258 35.114 500.000 FB1.uB.dut_inst.idex1.imm_out[11].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_1) IMMEX[11]
2286 464.888 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.257 35.112 500.000 FB1.uB.dut_inst.idex1.imm_out[11].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_2) IMMEX[12]
2287 464.891 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.206 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[22]
2288 464.895 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.202 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[23]
2289 464.895 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.249 35.105 500.000 FB1.uB.dut_inst.idex1.imm_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_1) IMMEX[3]
2290 464.895 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.249 35.105 500.000 FB1.uB.dut_inst.idex1.imm_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_0) IMMEX[2]
2291 464.895 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.249 35.105 500.000 FB1.uB.dut_inst.idex1.imm_out[5].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_3) IMMEX[5]
2292 464.897 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.248 35.104 500.000 FB1.uB.dut_inst.idex1.imm_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_2) IMMEX[4]
2293 464.898 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.199 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[22]
2294 464.900 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.244 35.100 500.000 FB1.uB.dut_inst.idex1.readdata2_out[58].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_2) RD2EX[58]
2295 464.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.196 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[23]
2296 464.901 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.196 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[22]
2297 464.903 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.194 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[21]
2298 464.905 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.192 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[23]
2299 464.905 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.192 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[20]
2300 464.906 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.191 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[19]
2301 464.908 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.190 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[18]
2302 464.908 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.236 35.092 500.000 FB1.uB.dut_inst.idex1.readdata1_out[58].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_2) RD1EX[58]
2303 464.910 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.234 35.090 500.000 FB1.uB.dut_inst.idex1.imm_out[8].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_2) IMMEX[8]
2304 464.912 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.185 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[21]
2305 464.912 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.232 35.088 500.000 FB1.uB.dut_inst.idex1.readdata2_out[59].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_3) RD2EX[59]
2306 464.913 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.232 35.087 500.000 FB1.uB.dut_inst.idex1.imm_out[9].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_3) IMMEX[9]
2307 464.914 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.183 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[20]
2308 464.915 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.182 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[19]
2309 464.917 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.181 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[18]
2310 464.918 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.179 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[21]
2311 464.920 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.224 35.080 500.000 FB1.uB.dut_inst.idex1.readdata1_out[59].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_3) RD1EX[59]
2312 464.921 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.177 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[20]
2313 464.921 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.176 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[19]
2314 464.922 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.223 35.078 500.000 FB1.uB.dut_inst.idex1.imm_out[6].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_0) IMMEX[6]
2315 464.922 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.223 35.078 500.000 FB1.uB.dut_inst.idex1.imm_out[7].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_1) IMMEX[7]
2316 464.922 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.175 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[21]
2317 464.922 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.175 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[17]
2318 464.923 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.174 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[18]
2319 464.924 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.173 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[20]
2320 464.925 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.172 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[19]
2321 464.927 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.170 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[18]
2322 464.927 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.170 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[16]
2323 464.931 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.166 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[8].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]: ADDOUTID[17]
2324 464.932 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.213 35.068 500.000 FB1.uB.dut_inst.idex1.imm_out[10].Q ALUOUTEX[63:0].ALUOUTEX[62] (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_0) IMMEX[10]
2325 464.937 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.160 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[17]
2326 464.941 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.156 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[17]
2327 464.951 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.146 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[10].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]: ADDOUTID[16]
2328 464.951 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.194 35.049 500.000 FB1.uB.dut_inst.idex1.readdata2_out[61].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_1) RD2EX[61]
2329 464.952 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.192 35.048 500.000 FB1.uB.dut_inst.idex1.readdata2_out[60].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_0) RD2EX[60]
2330 464.958 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.186 35.042 500.000 FB1.uB.dut_inst.idex1.readdata1_out[61].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_1) RD1EX[61]
2331 464.960 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.185 35.040 500.000 FB1.uB.dut_inst.idex1.readdata1_out[60].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_0) RD1EX[60]
2332 464.965 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.132 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[22]
2333 464.966 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.131 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[22]
2334 464.966 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.131 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[9].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]: ADDOUTID[16]
2335 464.968 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.129 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[23]
2336 464.970 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.128 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[23]
2337 464.974 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.124 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[11].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]: ADDOUTID[16]
2338 464.985 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.112 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[21]
2339 464.986 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.111 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[21]
2340 464.988 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.110 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[20]
2341 464.988 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.109 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[19]
2342 464.989 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.108 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[20]
2343 464.989 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.108 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[19]
2344 464.990 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.107 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[18]
2345 464.991 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.106 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[18]
2346 464.999 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.146 35.001 500.000 FB1.uB.dut_inst.idex1.readdata2_out[62].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_2) RD2EX[62]
2347 465.004 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.093 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[17]
2348 465.006 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.091 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[17]
2349 465.006 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 9.138 34.994 500.000 FB1.uB.dut_inst.idex1.readdata1_out[62].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_2) RD1EX[62]
2350 465.047 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.050 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[12].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]: ADDOUTID[16]
2351 465.080 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 4.017 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[13].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]: ADDOUTID[16]
2352 465.267 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.830 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[22]
2353 465.271 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.827 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[23]
2354 465.287 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.810 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[21]
2355 465.290 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.807 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[20]
2356 465.290 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.807 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[19]
2357 465.292 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.805 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[18]
2358 465.293 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.804 37.015 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[22].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[22]
2359 465.297 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.800 37.011 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[23].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[23]
2360 465.307 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.791 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[17]
2361 465.314 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.783 36.994 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[21].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[21]
2362 465.316 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.781 36.992 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[20].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[20]
2363 465.317 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.780 36.991 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[19].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[19]
2364 465.319 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.779 36.989 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[18].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[18]
2365 465.333 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.764 36.975 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[17].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[17]
2366 465.382 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.716 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[14].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]: ADDOUTID[16]
2367 465.416 clk:r clk:r - FB1_uB x4: x1 (tx:10.000 + rx:10.000) + (trace:3.753) = 23.753 3.681 36.979 500.803 FB1.uA.dut_inst.ifid1.out_pc[15].Q FB1.uA.dut_inst.pc1.PC[16].D (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]: ADDOUTID[16]
2368 465.517 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.628 34.483 500.000 FB1.uB.dut_inst.idex1.readdata2_out[63].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_3) RD2EX[63]
2369 465.532 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 8.613 34.468 500.000 FB1.uB.dut_inst.idex1.readdata1_out[63].Q ALUOUTEX[63:0].ALUOUTEX[63] (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_3) RD1EX[63]
2370 465.983 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.783 34.017 500.000 FB1.uC.dut_inst.exmem1.aluout_out[62].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_2) ALUOUTMEM[62]
2371 465.983 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.783 34.017 500.000 FB1.uC.dut_inst.exmem1.aluout_out[60].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_0) ALUOUTMEM[60]
2372 465.983 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.783 34.017 500.000 FB1.uC.dut_inst.exmem1.aluout_out[61].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_1) ALUOUTMEM[61]
2373 466.061 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.705 33.939 500.000 FB1.uC.dut_inst.exmem1.aluout_out[63].Q equal.equal (cpm_snd_HSTDM_4_FB1_B2_A_1_keep_3) ALUOUTMEM[63]
2374 466.187 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.469 34.598 500.785 FB1.uB.dut_inst.idex1.regrs1_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2) REGRS1_EX[2]
2375 466.187 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.469 34.598 500.785 FB1.uB.dut_inst.idex1.regrs1_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1) REGRS1_EX[1]
2376 466.187 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.469 34.598 500.785 FB1.uB.dut_inst.idex1.regrs1_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3) REGRS1_EX[3]
2377 466.187 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.469 34.598 500.785 FB1.uB.dut_inst.idex1.regrs1_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0) REGRS1_EX[4]
2378 466.194 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.462 34.590 500.785 FB1.uB.dut_inst.idex1.regrs2_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1) REGRS2_EX[4]
2379 466.194 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.462 34.590 500.785 FB1.uB.dut_inst.idex1.regrs2_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3) REGRS2_EX[2]
2380 466.194 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.462 34.590 500.785 FB1.uB.dut_inst.idex1.regrs2_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0) REGRS2_EX[3]
2381 466.194 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.462 34.590 500.785 FB1.uB.dut_inst.idex1.regrs2_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2) REGRS2_EX[1]
2382 466.329 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.327 34.456 500.785 FB1.uB.dut_inst.idex1.regrs1_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0) REGRS1_EX[0]
2383 466.337 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 6.320 34.448 500.785 FB1.uB.dut_inst.idex1.regrs2_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1) REGRS2_EX[0]
2384 466.341 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.819 33.659 500.000 FB1.uA.dut_inst.ifid1.out_pc[1].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1) PCID[1]
2385 466.381 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.780 33.620 500.000 FB1.uA.dut_inst.ifid1.out_instruc[30].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]
2386 466.389 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.771 33.611 500.000 FB1.uA.dut_inst.ifid1.out_instruc[27].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]
2387 466.420 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.741 33.580 500.000 FB1.uA.dut_inst.ifid1.out_pc[2].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2) PCID[2]
2388 466.439 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.721 33.561 500.000 FB1.uA.dut_inst.ifid1.out_pc[4].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0) PCID[4]
2389 466.439 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.721 33.561 500.000 FB1.uA.dut_inst.ifid1.out_pc[6].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2) PCID[6]
2390 466.439 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.721 33.561 500.000 FB1.uA.dut_inst.ifid1.out_pc[3].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3) PCID[3]
2391 466.440 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.720 33.560 500.000 FB1.uA.dut_inst.ifid1.out_pc[5].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1) PCID[5]
2392 466.448 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.713 33.553 500.000 FB1.uA.dut_inst.ifid1.out_pc[7].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3) PCID[7]
2393 466.549 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.322 33.451 500.000 FB1.uA.dut_inst.ifid1.out_pc[17].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1) PCID[17]
2394 466.552 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.320 33.448 500.000 FB1.uA.dut_inst.ifid1.out_pc[18].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2) PCID[18]
2395 466.561 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.311 33.439 500.000 FB1.uA.dut_inst.ifid1.out_pc[16].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0) PCID[16]
2396 466.571 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.301 33.429 500.000 FB1.uA.dut_inst.ifid1.out_pc[19].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3) PCID[19]
2397 466.571 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.301 33.429 500.000 FB1.uA.dut_inst.ifid1.out_pc[22].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2) PCID[22]
2398 466.571 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.301 33.429 500.000 FB1.uA.dut_inst.ifid1.out_pc[20].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0) PCID[20]
2399 466.572 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.299 33.428 500.000 FB1.uA.dut_inst.ifid1.out_pc[21].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1) PCID[21]
2400 466.586 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.285 33.414 500.000 FB1.uA.dut_inst.ifid1.out_pc[25].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1) PCID[25]
2401 466.588 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.283 33.412 500.000 FB1.uA.dut_inst.ifid1.out_pc[26].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2) PCID[26]
2402 466.597 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.274 33.403 500.000 FB1.uA.dut_inst.ifid1.out_pc[24].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0) PCID[24]
2403 466.597 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.274 33.403 500.000 FB1.uA.dut_inst.ifid1.out_pc[23].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3) PCID[23]
2404 466.607 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.264 33.393 500.000 FB1.uA.dut_inst.ifid1.out_pc[28].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0) PCID[28]
2405 466.607 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.264 33.393 500.000 FB1.uA.dut_inst.ifid1.out_pc[27].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3) PCID[27]
2406 466.607 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.264 33.393 500.000 FB1.uA.dut_inst.ifid1.out_pc[30].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2) PCID[30]
2407 466.609 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.263 33.391 500.000 FB1.uA.dut_inst.ifid1.out_pc[29].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1) PCID[29]
2408 466.622 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.249 33.378 500.000 FB1.uA.dut_inst.ifid1.out_pc[33].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1) PCID[33]
2409 466.625 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.247 33.375 500.000 FB1.uA.dut_inst.ifid1.out_pc[34].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2) PCID[34]
2410 466.634 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.237 33.366 500.000 FB1.uA.dut_inst.ifid1.out_pc[31].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3) PCID[31]
2411 466.634 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.237 33.366 500.000 FB1.uA.dut_inst.ifid1.out_pc[32].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0) PCID[32]
2412 466.644 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.227 33.356 500.000 FB1.uA.dut_inst.ifid1.out_pc[35].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3) PCID[35]
2413 466.644 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.227 33.356 500.000 FB1.uA.dut_inst.ifid1.out_pc[36].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0) PCID[36]
2414 466.644 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.227 33.356 500.000 FB1.uA.dut_inst.ifid1.out_pc[38].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2) PCID[38]
2415 466.645 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.226 33.355 500.000 FB1.uA.dut_inst.ifid1.out_pc[37].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1) PCID[37]
2416 466.659 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.212 33.341 500.000 FB1.uA.dut_inst.ifid1.out_pc[41].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1) PCID[41]
2417 466.661 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.210 33.339 500.000 FB1.uA.dut_inst.ifid1.out_pc[42].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2) PCID[42]
2418 466.670 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.201 33.330 500.000 FB1.uA.dut_inst.ifid1.out_pc[40].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0) PCID[40]
2419 466.670 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.201 33.330 500.000 FB1.uA.dut_inst.ifid1.out_pc[39].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3) PCID[39]
2420 466.681 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.191 33.319 500.000 FB1.uA.dut_inst.ifid1.out_pc[43].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3) PCID[43]
2421 466.681 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.191 33.319 500.000 FB1.uA.dut_inst.ifid1.out_pc[46].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2) PCID[46]
2422 466.681 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.191 33.319 500.000 FB1.uA.dut_inst.ifid1.out_pc[44].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0) PCID[44]
2423 466.682 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.190 33.318 500.000 FB1.uA.dut_inst.ifid1.out_pc[45].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1) PCID[45]
2424 466.696 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.176 33.304 500.000 FB1.uA.dut_inst.ifid1.out_pc[49].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1) PCID[49]
2425 466.698 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.173 33.302 500.000 FB1.uA.dut_inst.ifid1.out_pc[50].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2) PCID[50]
2426 466.707 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.164 33.293 500.000 FB1.uA.dut_inst.ifid1.out_pc[47].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3) PCID[47]
2427 466.707 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.164 33.293 500.000 FB1.uA.dut_inst.ifid1.out_pc[48].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0) PCID[48]
2428 466.717 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.154 33.283 500.000 FB1.uA.dut_inst.ifid1.out_pc[51].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3) PCID[51]
2429 466.717 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.154 33.283 500.000 FB1.uA.dut_inst.ifid1.out_pc[54].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2) PCID[54]
2430 466.717 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.154 33.283 500.000 FB1.uA.dut_inst.ifid1.out_pc[52].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0) PCID[52]
2431 466.718 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.153 33.282 500.000 FB1.uA.dut_inst.ifid1.out_pc[53].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1) PCID[53]
2432 466.744 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.128 33.256 500.000 FB1.uA.dut_inst.ifid1.out_pc[56].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0) PCID[56]
2433 466.744 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.128 33.256 500.000 FB1.uA.dut_inst.ifid1.out_pc[55].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3) PCID[55]
2434 466.765 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.107 33.235 500.000 FB1.uA.dut_inst.ifid1.out_pc[57].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1) PCID[57]
2435 466.767 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.104 33.233 500.000 FB1.uA.dut_inst.ifid1.out_pc[58].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2) PCID[58]
2436 466.791 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.080 33.209 500.000 FB1.uA.dut_inst.ifid1.out_pc[59].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3) PCID[59]
2437 466.801 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.070 33.199 500.000 FB1.uA.dut_inst.ifid1.out_pc[60].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0) PCID[60]
2438 466.837 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.035 33.163 500.000 FB1.uA.dut_inst.ifid1.out_pc[62].Q ADDOUTID[63:0].ADDOUTID[63] (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2) PCID[62]
2439 466.838 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.034 33.162 500.000 FB1.uA.dut_inst.ifid1.out_pc[61].Q ADDOUTID[63:0].ADDOUTID[63] (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1) PCID[61]
2440 466.885 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.987 33.115 500.000 FB1.uA.dut_inst.ifid1.out_pc[63].Q ADDOUTID[63:0].ADDOUTID[63] (cpm_snd_HSTDM_4_FB1_A2_D_2_keep_3) PCID[63]
2441 467.436 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.722 32.565 500.000 FB1.uA.dut_inst.ifid1.out_pc[10].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2) PCID[10]
2442 467.445 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.713 32.556 500.000 FB1.uA.dut_inst.ifid1.out_pc[8].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0) PCID[8]
2443 467.451 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.706 32.549 500.000 FB1.uA.dut_inst.ifid1.out_pc[9].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1) PCID[9]
2444 467.455 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.703 32.545 500.000 FB1.uA.dut_inst.ifid1.out_pc[11].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3) PCID[11]
2445 467.475 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.181 33.310 500.785 FB1.uB.dut_inst.idex1.aluop2_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_1) ALUOP2EX
2446 467.475 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.181 33.310 500.785 FB1.uB.dut_inst.idex1.aluop3_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_2) ALUOP3EX
2447 467.488 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.168 33.297 500.785 FB1.uB.dut_inst.idex1.func3_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_2) FUNC3EX[2]
2448 467.488 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.168 33.297 500.785 FB1.uB.dut_inst.idex1.func3_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_1) FUNC3EX[1]
2449 467.488 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.168 33.297 500.785 FB1.uB.dut_inst.idex1.func3_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_0) FUNC3EX[0]
2450 467.490 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.166 33.294 500.785 FB1.uB.dut_inst.idex1.func7_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_3) FUNC7EX[4]
2451 467.490 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.166 33.294 500.785 FB1.uB.dut_inst.idex1.func7_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_8_keep_3) FUNC7EX[0]
2452 467.490 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.166 33.294 500.785 FB1.uB.dut_inst.idex1.func7_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_1) FUNC7EX[2]
2453 467.490 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.166 33.294 500.785 FB1.uB.dut_inst.idex1.func7_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_0) FUNC7EX[1]
2454 467.490 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.166 33.294 500.785 FB1.uB.dut_inst.idex1.func7_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_7_keep_2) FUNC7EX[3]
2455 467.492 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.669 32.508 500.000 FB1.uA.dut_inst.ifid1.out_pc[0].Q ADDOUTID[63:0].ADDOUTID[0] (cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_0) PCID[0]
2456 467.501 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.155 33.284 500.785 FB1.uB.dut_inst.idex1.aluop1_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_0) ALUOP1EX
2457 467.518 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.639 32.482 500.000 FB1.uA.dut_inst.ifid1.out_pc[12].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0) PCID[12]
2458 467.519 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.638 32.481 500.000 FB1.uA.dut_inst.ifid1.out_pc[13].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1) PCID[13]
2459 467.520 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.136 33.264 500.785 FB1.uB.dut_inst.idex1.func7_out[5].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_0) FUNC7EX[5]
2460 467.651 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.006 33.134 500.785 FB1.uB.dut_inst.idex1.readdata1_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_0) RD1EX[0]
2461 467.653 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.003 33.132 500.785 FB1.uB.dut_inst.idex1.readdata1_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_1) RD1EX[1]
2462 467.658 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.998 33.127 500.785 FB1.uB.dut_inst.idex1.readdata2_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_0) RD2EX[0]
2463 467.661 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.995 33.124 500.785 FB1.uB.dut_inst.idex1.readdata2_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_1) RD2EX[1]
2464 467.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.984 33.113 500.785 FB1.uB.dut_inst.idex1.readdata1_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_2) RD1EX[2]
2465 467.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.984 33.113 500.785 FB1.uB.dut_inst.idex1.readdata1_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_10_keep_3) RD1EX[3]
2466 467.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.984 33.113 500.785 FB1.uB.dut_inst.idex1.readdata1_out[5].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_1) RD1EX[5]
2467 467.673 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.983 33.111 500.785 FB1.uB.dut_inst.idex1.readdata1_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_0) RD1EX[4]
2468 467.680 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.976 33.105 500.785 FB1.uB.dut_inst.idex1.readdata2_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_3) RD2EX[3]
2469 467.680 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.976 33.105 500.785 FB1.uB.dut_inst.idex1.readdata2_out[5].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_1) RD2EX[5]
2470 467.680 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.976 33.105 500.785 FB1.uB.dut_inst.idex1.readdata2_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_2_keep_2) RD2EX[2]
2471 467.681 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.975 33.104 500.785 FB1.uB.dut_inst.idex1.readdata2_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_0) RD2EX[4]
2472 467.687 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.969 33.098 500.785 FB1.uB.dut_inst.idex1.readdata1_out[8].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_0) RD1EX[8]
2473 467.690 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.966 33.095 500.785 FB1.uB.dut_inst.idex1.readdata1_out[9].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_1) RD1EX[9]
2474 467.695 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.961 33.090 500.785 FB1.uB.dut_inst.idex1.readdata2_out[8].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_0) RD2EX[8]
2475 467.697 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.959 33.088 500.785 FB1.uB.dut_inst.idex1.readdata2_out[9].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_1) RD2EX[9]
2476 467.699 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.958 33.086 500.785 FB1.uB.dut_inst.idex1.readdata1_out[7].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_3) RD1EX[7]
2477 467.699 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.958 33.086 500.785 FB1.uB.dut_inst.idex1.readdata1_out[6].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_9_keep_2) RD1EX[6]
2478 467.706 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.950 33.079 500.785 FB1.uB.dut_inst.idex1.readdata2_out[7].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_3) RD2EX[7]
2479 467.706 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.950 33.079 500.785 FB1.uB.dut_inst.idex1.readdata2_out[6].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_3_keep_2) RD2EX[6]
2480 467.709 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.947 33.076 500.785 FB1.uB.dut_inst.idex1.readdata2_out[13].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_1) RD2EX[13]
2481 467.709 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.947 33.076 500.785 FB1.uB.dut_inst.idex1.readdata1_out[10].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_2) RD1EX[10]
2482 467.709 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.947 33.076 500.785 FB1.uB.dut_inst.idex1.readdata1_out[11].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_8_keep_3) RD1EX[11]
2483 467.710 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.946 33.075 500.785 FB1.uB.dut_inst.idex1.readdata1_out[12].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_0) RD1EX[12]
2484 467.716 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.940 33.068 500.785 FB1.uB.dut_inst.idex1.readdata2_out[10].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_2) RD2EX[10]
2485 467.716 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.940 33.068 500.785 FB1.uB.dut_inst.idex1.readdata1_out[13].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_1) RD1EX[13]
2486 467.716 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.940 33.068 500.785 FB1.uB.dut_inst.idex1.readdata2_out[11].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_2_keep_3) RD2EX[11]
2487 467.718 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.939 33.067 500.785 FB1.uB.dut_inst.idex1.readdata2_out[12].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_0) RD2EX[12]
2488 467.722 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.935 33.063 500.785 FB1.uB.dut_inst.idex1.alusrc_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_9_keep_3) ALUSRCEX
2489 467.724 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.932 33.061 500.785 FB1.uB.dut_inst.idex1.readdata2_out[16].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_0) RD2EX[16]
2490 467.726 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.930 33.059 500.785 FB1.uB.dut_inst.idex1.readdata2_out[17].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_1) RD2EX[17]
2491 467.731 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.925 33.053 500.785 FB1.uB.dut_inst.idex1.readdata1_out[16].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_0) RD1EX[16]
2492 467.734 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.922 33.051 500.785 FB1.uB.dut_inst.idex1.readdata1_out[17].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_1) RD1EX[17]
2493 467.735 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.921 33.050 500.785 FB1.uB.dut_inst.idex1.readdata2_out[15].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_3) RD2EX[15]
2494 467.735 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.921 33.050 500.785 FB1.uB.dut_inst.idex1.readdata2_out[14].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_7_keep_2) RD2EX[14]
2495 467.743 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.913 33.042 500.785 FB1.uB.dut_inst.idex1.readdata1_out[15].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_3) RD1EX[15]
2496 467.743 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.913 33.042 500.785 FB1.uB.dut_inst.idex1.readdata1_out[14].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_9_keep_2) RD1EX[14]
2497 467.745 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.911 33.039 500.785 FB1.uB.dut_inst.idex1.readdata2_out[19].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_3) RD2EX[19]
2498 467.745 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.911 33.039 500.785 FB1.uB.dut_inst.idex1.readdata2_out[21].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_1) RD2EX[21]
2499 467.745 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.911 33.039 500.785 FB1.uB.dut_inst.idex1.readdata2_out[18].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_6_keep_2) RD2EX[18]
2500 467.747 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.910 33.038 500.785 FB1.uB.dut_inst.idex1.readdata2_out[20].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_0) RD2EX[20]
2501 467.753 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.903 33.032 500.785 FB1.uB.dut_inst.idex1.readdata1_out[18].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_2) RD1EX[18]
2502 467.753 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.903 33.032 500.785 FB1.uB.dut_inst.idex1.readdata1_out[21].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_1) RD1EX[21]
2503 467.753 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.903 33.032 500.785 FB1.uB.dut_inst.idex1.readdata1_out[19].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_8_keep_3) RD1EX[19]
2504 467.754 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.902 33.031 500.785 FB1.uB.dut_inst.idex1.readdata1_out[20].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_0) RD1EX[20]
2505 467.760 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.896 33.024 500.785 FB1.uB.dut_inst.idex1.readdata2_out[24].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_0) RD2EX[24]
2506 467.763 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.893 33.022 500.785 FB1.uB.dut_inst.idex1.readdata2_out[25].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_1) RD2EX[25]
2507 467.768 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.888 33.017 500.785 FB1.uB.dut_inst.idex1.readdata1_out[24].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_0) RD1EX[24]
2508 467.770 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.886 33.014 500.785 FB1.uB.dut_inst.idex1.readdata1_out[25].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_1) RD1EX[25]
2509 467.772 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.884 33.013 500.785 FB1.uB.dut_inst.idex1.readdata2_out[23].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_3) RD2EX[23]
2510 467.772 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.884 33.013 500.785 FB1.uB.dut_inst.idex1.readdata2_out[22].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_5_keep_2) RD2EX[22]
2511 467.779 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.877 33.005 500.785 FB1.uB.dut_inst.idex1.readdata1_out[23].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_3) RD1EX[23]
2512 467.779 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.877 33.005 500.785 FB1.uB.dut_inst.idex1.readdata1_out[22].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_11_keep_2) RD1EX[22]
2513 467.782 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.874 33.003 500.785 FB1.uB.dut_inst.idex1.readdata2_out[26].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_2) RD2EX[26]
2514 467.782 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.874 33.003 500.785 FB1.uB.dut_inst.idex1.readdata2_out[29].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_1) RD2EX[29]
2515 467.782 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.874 33.003 500.785 FB1.uB.dut_inst.idex1.readdata2_out[27].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_4_keep_3) RD2EX[27]
2516 467.783 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.873 33.002 500.785 FB1.uB.dut_inst.idex1.readdata2_out[28].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_0) RD2EX[28]
2517 467.790 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.867 32.995 500.785 FB1.uB.dut_inst.idex1.readdata1_out[29].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_1) RD1EX[29]
2518 467.790 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.867 32.995 500.785 FB1.uB.dut_inst.idex1.readdata1_out[27].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_3) RD1EX[27]
2519 467.790 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.867 32.995 500.785 FB1.uB.dut_inst.idex1.readdata1_out[26].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_10_keep_2) RD1EX[26]
2520 467.791 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.865 32.994 500.785 FB1.uB.dut_inst.idex1.readdata1_out[28].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_0) RD1EX[28]
2521 467.797 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.859 32.988 500.785 FB1.uB.dut_inst.idex1.readdata2_out[32].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_0) RD2EX[32]
2522 467.799 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.857 32.985 500.785 FB1.uB.dut_inst.idex1.readdata2_out[33].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_1) RD2EX[33]
2523 467.805 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.852 32.980 500.785 FB1.uB.dut_inst.idex1.readdata1_out[32].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_0) RD1EX[32]
2524 467.807 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.849 32.978 500.785 FB1.uB.dut_inst.idex1.readdata1_out[33].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_1) RD1EX[33]
2525 467.808 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.848 32.976 500.785 FB1.uB.dut_inst.idex1.readdata2_out[30].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_2) RD2EX[30]
2526 467.808 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.848 32.976 500.785 FB1.uB.dut_inst.idex1.readdata2_out[31].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_11_keep_3) RD2EX[31]
2527 467.816 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.840 32.969 500.785 FB1.uB.dut_inst.idex1.readdata1_out[30].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_2) RD1EX[30]
2528 467.816 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.840 32.969 500.785 FB1.uB.dut_inst.idex1.readdata1_out[31].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_5_keep_3) RD1EX[31]
2529 467.819 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.838 32.966 500.785 FB1.uB.dut_inst.idex1.readdata2_out[34].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_2) RD2EX[34]
2530 467.819 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.838 32.966 500.785 FB1.uB.dut_inst.idex1.readdata2_out[35].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_B_10_keep_3) RD2EX[35]
2531 467.819 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.838 32.966 500.785 FB1.uB.dut_inst.idex1.readdata2_out[37].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_1) RD2EX[37]
2532 467.820 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.836 32.965 500.785 FB1.uB.dut_inst.idex1.readdata2_out[36].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_0) RD2EX[36]
2533 467.820 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.337 32.180 500.000 FB1.uA.dut_inst.ifid1.out_pc[14].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2) PCID[14]
2534 467.826 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.830 32.959 500.785 FB1.uB.dut_inst.idex1.readdata1_out[37].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_1) RD1EX[37]
2535 467.826 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.830 32.959 500.785 FB1.uB.dut_inst.idex1.readdata1_out[34].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_2) RD1EX[34]
2536 467.826 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.830 32.959 500.785 FB1.uB.dut_inst.idex1.readdata1_out[35].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_4_keep_3) RD1EX[35]
2537 467.827 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.829 32.957 500.785 FB1.uB.dut_inst.idex1.readdata1_out[36].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_0) RD1EX[36]
2538 467.834 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.823 32.951 500.785 FB1.uB.dut_inst.idex1.readdata2_out[40].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_0) RD2EX[40]
2539 467.836 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.820 32.949 500.785 FB1.uB.dut_inst.idex1.readdata2_out[41].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_1) RD2EX[41]
2540 467.841 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.815 32.944 500.785 FB1.uB.dut_inst.idex1.readdata1_out[40].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_0) RD1EX[40]
2541 467.844 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.812 32.941 500.785 FB1.uB.dut_inst.idex1.readdata1_out[41].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_1) RD1EX[41]
2542 467.845 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.811 32.940 500.785 FB1.uB.dut_inst.idex1.readdata2_out[38].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_2) RD2EX[38]
2543 467.845 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.811 32.940 500.785 FB1.uB.dut_inst.idex1.readdata2_out[39].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_11_keep_3) RD2EX[39]
2544 467.847 clk:r System:r - - x4 (tx:10.000 + rx:10.000) = 20.000 5.311 32.153 500.000 FB1.uA.dut_inst.ifid1.out_pc[15].Q ADDOUTID[63:0].ADDOUTID[62] (cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3) PCID[15]
2545 467.853 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.804 32.932 500.785 FB1.uB.dut_inst.idex1.readdata1_out[38].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_2) RD1EX[38]
2546 467.853 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.804 32.932 500.785 FB1.uB.dut_inst.idex1.readdata1_out[39].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_7_keep_3) RD1EX[39]
2547 467.855 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.801 32.930 500.785 FB1.uB.dut_inst.idex1.readdata2_out[45].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_1) RD2EX[45]
2548 467.855 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.801 32.930 500.785 FB1.uB.dut_inst.idex1.readdata2_out[43].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_3) RD2EX[43]
2549 467.855 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.801 32.930 500.785 FB1.uB.dut_inst.idex1.readdata2_out[42].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_10_keep_2) RD2EX[42]
2550 467.856 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.800 32.928 500.785 FB1.uB.dut_inst.idex1.readdata2_out[44].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_0) RD2EX[44]
2551 467.863 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.793 32.922 500.785 FB1.uB.dut_inst.idex1.readdata1_out[43].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_3) RD1EX[43]
2552 467.863 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.793 32.922 500.785 FB1.uB.dut_inst.idex1.readdata1_out[42].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_6_keep_2) RD1EX[42]
2553 467.863 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.793 32.922 500.785 FB1.uB.dut_inst.idex1.readdata1_out[45].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_1) RD1EX[45]
2554 467.864 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.792 32.921 500.785 FB1.uB.dut_inst.idex1.readdata1_out[44].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_0) RD1EX[44]
2555 467.882 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.775 32.903 500.785 FB1.uB.dut_inst.idex1.readdata2_out[46].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_2) RD2EX[46]
2556 467.882 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.775 32.903 500.785 FB1.uB.dut_inst.idex1.readdata2_out[47].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_5_keep_3) RD2EX[47]
2557 467.889 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.767 32.896 500.785 FB1.uB.dut_inst.idex1.readdata1_out[46].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_2) RD1EX[46]
2558 467.889 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.767 32.896 500.785 FB1.uB.dut_inst.idex1.readdata1_out[47].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_1_keep_3) RD1EX[47]
2559 467.891 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.766 32.894 500.785 FB1.uB.dut_inst.idex1.func7_out[6].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_1) FUNC7EX[6]
2560 467.903 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.753 32.882 500.785 FB1.uB.dut_inst.idex1.readdata2_out[48].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_0) RD2EX[48]
2561 467.906 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.751 32.879 500.785 FB1.uB.dut_inst.idex1.readdata2_out[49].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_1) RD2EX[49]
2562 467.911 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.745 32.874 500.785 FB1.uB.dut_inst.idex1.readdata1_out[48].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_0) RD1EX[48]
2563 467.913 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.743 32.872 500.785 FB1.uB.dut_inst.idex1.readdata1_out[49].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_1) RD1EX[49]
2564 467.925 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.731 32.860 500.785 FB1.uB.dut_inst.idex1.readdata2_out[53].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_1) RD2EX[53]
2565 467.925 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.731 32.860 500.785 FB1.uB.dut_inst.idex1.readdata2_out[51].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_3) RD2EX[51]
2566 467.925 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.731 32.860 500.785 FB1.uB.dut_inst.idex1.readdata2_out[50].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_4_keep_2) RD2EX[50]
2567 467.926 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.730 32.859 500.785 FB1.uB.dut_inst.idex1.readdata2_out[52].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_0) RD2EX[52]
2568 467.932 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.724 32.852 500.785 FB1.uB.dut_inst.idex1.readdata1_out[50].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_2) RD1EX[50]
2569 467.932 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.724 32.852 500.785 FB1.uB.dut_inst.idex1.readdata1_out[53].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_1) RD1EX[53]
2570 467.932 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.724 32.852 500.785 FB1.uB.dut_inst.idex1.readdata1_out[51].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_D_0_keep_3) RD1EX[51]
2571 467.934 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.723 32.851 500.785 FB1.uB.dut_inst.idex1.readdata1_out[52].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_0) RD1EX[52]
2572 467.951 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.705 32.834 500.785 FB1.uB.dut_inst.idex1.readdata2_out[54].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_2) RD2EX[54]
2573 467.951 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.705 32.834 500.785 FB1.uB.dut_inst.idex1.readdata2_out[55].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_7_keep_3) RD2EX[55]
2574 467.959 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.697 32.826 500.785 FB1.uB.dut_inst.idex1.readdata1_out[54].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_2) RD1EX[54]
2575 467.959 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.697 32.826 500.785 FB1.uB.dut_inst.idex1.readdata1_out[55].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_C_9_keep_3) RD1EX[55]
2576 468.009 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.648 32.776 500.785 FB1.uB.dut_inst.idex1.imm_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_2) IMMEX[0]
2577 468.009 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.647 32.776 500.785 FB1.uB.dut_inst.idex1.readdata2_out[56].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_0) RD2EX[56]
2578 468.011 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.645 32.774 500.785 FB1.uB.dut_inst.idex1.imm_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_6_keep_3) IMMEX[1]
2579 468.011 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.645 32.774 500.785 FB1.uB.dut_inst.idex1.readdata2_out[57].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_1) RD2EX[57]
2580 468.016 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.640 32.768 500.785 FB1.uB.dut_inst.idex1.readdata1_out[56].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_0) RD1EX[56]
2581 468.019 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.637 32.766 500.785 FB1.uB.dut_inst.idex1.readdata1_out[57].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_1) RD1EX[57]
2582 468.021 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.589 32.764 500.785 FB1.uB.dut_inst.idex1.imm_out[11].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_1) IMMEX[11]
2583 468.022 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.588 32.762 500.785 FB1.uB.dut_inst.idex1.imm_out[11].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_2) IMMEX[12]
2584 468.030 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.626 32.755 500.785 FB1.uB.dut_inst.idex1.imm_out[5].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_3) IMMEX[5]
2585 468.030 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.626 32.755 500.785 FB1.uB.dut_inst.idex1.imm_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_1) IMMEX[3]
2586 468.030 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.626 32.755 500.785 FB1.uB.dut_inst.idex1.imm_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_0) IMMEX[2]
2587 468.031 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.625 32.754 500.785 FB1.uB.dut_inst.idex1.imm_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_5_keep_2) IMMEX[4]
2588 468.035 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.621 32.750 500.785 FB1.uB.dut_inst.idex1.readdata2_out[58].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_2) RD2EX[58]
2589 468.043 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.613 32.742 500.785 FB1.uB.dut_inst.idex1.readdata1_out[58].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_2) RD1EX[58]
2590 468.045 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.611 32.740 500.785 FB1.uB.dut_inst.idex1.imm_out[8].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_2) IMMEX[8]
2591 468.047 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.609 32.738 500.785 FB1.uB.dut_inst.idex1.readdata2_out[59].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_6_keep_3) RD2EX[59]
2592 468.048 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.609 32.737 500.785 FB1.uB.dut_inst.idex1.imm_out[9].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_3) IMMEX[9]
2593 468.055 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.601 32.730 500.785 FB1.uB.dut_inst.idex1.readdata1_out[59].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_8_keep_3) RD1EX[59]
2594 468.057 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.600 32.728 500.785 FB1.uB.dut_inst.idex1.imm_out[6].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_0) IMMEX[6]
2595 468.057 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.600 32.728 500.785 FB1.uB.dut_inst.idex1.imm_out[7].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_4_keep_1) IMMEX[7]
2596 468.067 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.589 32.718 500.785 FB1.uB.dut_inst.idex1.imm_out[10].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_0) IMMEX[10]
2597 468.086 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.571 32.699 500.785 FB1.uB.dut_inst.idex1.readdata2_out[61].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_1) RD2EX[61]
2598 468.087 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.569 32.698 500.785 FB1.uB.dut_inst.idex1.readdata2_out[60].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_0) RD2EX[60]
2599 468.093 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.563 32.692 500.785 FB1.uB.dut_inst.idex1.readdata1_out[61].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_1) RD1EX[61]
2600 468.094 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.562 32.690 500.785 FB1.uB.dut_inst.idex1.readdata1_out[60].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_0) RD1EX[60]
2601 468.134 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.522 32.651 500.785 FB1.uB.dut_inst.idex1.readdata2_out[62].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_2) RD2EX[62]
2602 468.141 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.515 32.644 500.785 FB1.uB.dut_inst.idex1.readdata1_out[62].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_2) RD1EX[62]
2603 468.522 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 19.983 9.332 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[7].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[7]: ALUOUTMEM_aptn_ft[7]: ALUOUTMEM_aptn_ft_0[7]: PCSRCID
2604 468.522 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 19.983 9.332 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[10].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[10]: ALUOUTMEM_aptn_ft[10]: ALUOUTMEM_aptn_ft_0[10]: PCSRCID
2605 468.522 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 19.983 9.332 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[8].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[8]: ALUOUTMEM_aptn_ft[8]: ALUOUTMEM_aptn_ft_0[8]: PCSRCID
2606 468.522 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 19.983 9.332 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[6].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[6]: ALUOUTMEM_aptn_ft[6]: ALUOUTMEM_aptn_ft_0[6]: PCSRCID
2607 468.522 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 19.983 9.332 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[9].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[9]: ALUOUTMEM_aptn_ft[9]: ALUOUTMEM_aptn_ft_0[9]: PCSRCID
2608 468.530 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 9.035 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[2]: WRMEM_aptn_ft[2]: WRMEM_aptn_ft_0[2]: PCSRCID
2609 468.530 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 9.035 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[3]: WRMEM_aptn_ft[3]: WRMEM_aptn_ft_0[3]: PCSRCID
2610 468.651 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.005 32.133 500.785 FB1.uB.dut_inst.idex1.readdata2_out[63].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_C_1_keep_3) RD2EX[63]
2611 468.655 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 8.911 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[1]: WRMEM_aptn_ft[1]: WRMEM_aptn_ft_0[1]: PCSRCID
2612 468.655 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 8.911 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[0]: WRMEM_aptn_ft[0]: WRMEM_aptn_ft_0[0]: PCSRCID
2613 468.667 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 3.989 32.118 500.785 FB1.uB.dut_inst.idex1.readdata1_out[63].Q FB1.uC.dut_inst.exmem1.aluout_out[63].D (cpm_snd_HSTDM_4_FB1_B2_B_3_keep_3) RD1EX[63]
2614 468.693 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 8.873 71.568 500.737 FB1.uC.dut_inst.exmem1.memread_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE MEMREADMEM: MEMREADMEM_aptn_ft: MEMREADMEM_aptn_ft_0: PCSRCID
2615 468.862 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 8.704 71.568 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[4]: WRMEM_aptn_ft[4]: WRMEM_aptn_ft_0[4]: PCSRCID
2616 469.144 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 4.876 31.593 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[2]: WRMEM_aptn_ft[2]: WRMEM_aptn_ft_0[2]: stall
2617 469.144 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 3.086 31.593 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[3]: WRMEM_aptn_ft[3]: WRMEM_aptn_ft_0[3]: stall
2618 469.269 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 2.962 31.593 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[1]: WRMEM_aptn_ft[1]: WRMEM_aptn_ft_0[1]: stall
2619 469.269 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 2.962 31.593 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[0]: WRMEM_aptn_ft[0]: WRMEM_aptn_ft_0[0]: stall
2620 469.307 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 2.735 31.593 500.737 FB1.uC.dut_inst.exmem1.memread_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE MEMREADMEM: MEMREADMEM_aptn_ft: MEMREADMEM_aptn_ft_0: stall
2621 469.476 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) + (trace:5.039) = 20.272 2.755 31.593 500.737 FB1.uC.dut_inst.exmem1.writeregister_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRMEM[4]: WRMEM_aptn_ft[4]: WRMEM_aptn_ft_0[4]: stall
2622 469.863 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 18.590 9.384 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[0]: ALUOUTMEM_aptn_ft[0]: ALUOUTMEM_aptn_ft_0[0]: PCSRCID
2623 469.863 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:4.750) + (trace:5.039) = 18.590 9.384 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[1]: ALUOUTMEM_aptn_ft[1]: ALUOUTMEM_aptn_ft_0[1]: PCSRCID
2624 470.203 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 2.742 30.582 500.785 FB1.uA.dut_inst.ifid1.out_instruc[30].Q FB1.uB.dut_inst.idex1.imm_out[9].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3) INSTRUCID[30]
2625 470.203 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 2.742 30.582 500.785 FB1.uA.dut_inst.ifid1.out_instruc[27].Q FB1.uB.dut_inst.idex1.imm_out[6].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2) INSTRUCID[27]
2626 470.338 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.592 30.447 500.785 FB1.uB.dut_inst.idex1.writeregister_out[4].Q FB1.uC.dut_inst.exmem1.writeregister_out[4].D (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_3) WREX[4]
2627 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[52].Q FB1.uD.dut_inst.dm1.memory[52].D (cpm_snd_HSTDM_4_FB1_C2_C_0_keep_2) RD2MEM[52]
2628 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[50].Q FB1.uD.dut_inst.dm1.memory[50].D (cpm_snd_HSTDM_4_FB1_C2_C_0_keep_0) RD2MEM[50]
2629 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[48].Q FB1.uD.dut_inst.dm1.memory[48].D (cpm_snd_HSTDM_4_FB1_C2_C_1_keep_3) RD2MEM[48]
2630 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[53].Q FB1.uD.dut_inst.dm1.memory[53].D (cpm_snd_HSTDM_4_FB1_C2_C_0_keep_3) RD2MEM[53]
2631 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[51].Q FB1.uD.dut_inst.dm1.memory[51].D (cpm_snd_HSTDM_4_FB1_C2_C_0_keep_1) RD2MEM[51]
2632 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[55].Q FB1.uD.dut_inst.dm1.memory[55].D (cpm_snd_HSTDM_4_FB1_C2_D_3_keep_1) RD2MEM[55]
2633 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[56].Q FB1.uD.dut_inst.dm1.memory[56].D (cpm_snd_HSTDM_4_FB1_C2_D_3_keep_2) RD2MEM[56]
2634 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[45].Q FB1.uD.dut_inst.dm1.memory[45].D (cpm_snd_HSTDM_4_FB1_C2_C_1_keep_1) RD2MEM[45]
2635 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[46].Q FB1.uD.dut_inst.dm1.memory[46].D (cpm_snd_HSTDM_4_FB1_C2_C_1_keep_2) RD2MEM[46]
2636 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[41].Q FB1.uD.dut_inst.dm1.memory[41].D (cpm_snd_HSTDM_4_FB1_C2_C_6_keep_1) RD2MEM[41]
2637 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[44].Q FB1.uD.dut_inst.dm1.memory[44].D (cpm_snd_HSTDM_4_FB1_C2_C_1_keep_0) RD2MEM[44]
2638 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[54].Q FB1.uD.dut_inst.dm1.memory[54].D (cpm_snd_HSTDM_4_FB1_C2_D_3_keep_0) RD2MEM[54]
2639 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[61].Q FB1.uD.dut_inst.dm1.memory[61].D (cpm_snd_HSTDM_4_FB1_C2_D_2_keep_2) RD2MEM[61]
2640 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[59].Q FB1.uD.dut_inst.dm1.memory[59].D (cpm_snd_HSTDM_4_FB1_C2_D_2_keep_1) RD2MEM[59]
2641 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[43].Q FB1.uD.dut_inst.dm1.memory[43].D (cpm_snd_HSTDM_4_FB1_C2_C_6_keep_3) RD2MEM[43]
2642 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[57].Q FB1.uD.dut_inst.dm1.memory[57].D (cpm_snd_HSTDM_4_FB1_C2_D_3_keep_3) RD2MEM[57]
2643 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[62].Q FB1.uD.dut_inst.dm1.memory[62].D (cpm_snd_HSTDM_4_FB1_C2_D_2_keep_3) RD2MEM[62]
2644 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uB.dut_inst.idex1.regwrite_out.Q FB1.uC.dut_inst.exmem1.regwrite_out.D (cpm_snd_HSTDM_4_FB1_B2_D_2_keep_2) REGWRITEEX
2645 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[42].Q FB1.uD.dut_inst.dm1.memory[42].D (cpm_snd_HSTDM_4_FB1_C2_C_6_keep_2) RD2MEM[42]
2646 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[39].Q FB1.uD.dut_inst.dm1.memory[39].D (cpm_snd_HSTDM_4_FB1_C2_C_6_keep_0) RD2MEM[39]
2647 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[58].Q FB1.uD.dut_inst.dm1.memory[58].D (cpm_snd_HSTDM_4_FB1_C2_D_2_keep_0) RD2MEM[58]
2648 470.383 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.402 500.785 FB1.uB.dut_inst.idex1.memwrite_out.Q FB1.uC.dut_inst.exmem1.memwrite_out.D (cpm_snd_HSTDM_4_FB1_B2_A_11_keep_3) MEMWRITEEX
2649 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[0].Q FB1.uD.dut_inst.dm1.memory[0].D (cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_0) RD2MEM[0]
2650 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[14].Q FB1.uD.dut_inst.dm1.memory[14].D (cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_3) RD2MEM[14]
2651 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uA.dut_inst.ifid1.out_instruc[13].Q FB1.uB.dut_inst.idex1.func3_out[1].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_0) INSTRUCID[13]
2652 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[1].Q FB1.uD.dut_inst.dm1.memory[1].D (cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_1) RD2MEM[1]
2653 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[10].Q FB1.uD.dut_inst.dm1.memory[10].D (cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_0) RD2MEM[10]
2654 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[11].Q FB1.uD.dut_inst.dm1.memory[11].D (cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_1) RD2MEM[11]
2655 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[13].Q FB1.uD.dut_inst.dm1.memory[13].D (cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_2) RD2MEM[13]
2656 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uA.dut_inst.ifid1.out_instruc[14].Q FB1.uB.dut_inst.idex1.func3_out[2].D (cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_1) INSTRUCID[14]
2657 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uA.dut_inst.ifid1.out_instruc[12].Q FB1.uB.dut_inst.idex1.func3_out[0].D (cpm_snd_HSTDM_4_FB1_BI3_N_8_keep_0) INSTRUCID[12]
2658 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[16].Q FB1.uD.dut_inst.dm1.memory[16].D (cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_0) RD2MEM[16]
2659 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[19].Q FB1.uD.dut_inst.dm1.memory[19].D (cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_3) RD2MEM[19]
2660 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[9].Q FB1.uD.dut_inst.dm1.memory[9].D (cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_3) RD2MEM[9]
2661 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[4].Q FB1.uD.dut_inst.dm1.memory[4].D (cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_3) RD2MEM[4]
2662 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[8].Q FB1.uD.dut_inst.dm1.memory[8].D (cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_2) RD2MEM[8]
2663 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[17].Q FB1.uD.dut_inst.dm1.memory[17].D (cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_1) RD2MEM[17]
2664 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[6].Q FB1.uD.dut_inst.dm1.memory[6].D (cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_0) RD2MEM[6]
2665 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[2].Q FB1.uD.dut_inst.dm1.memory[2].D (cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_2) RD2MEM[2]
2666 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[7].Q FB1.uD.dut_inst.dm1.memory[7].D (cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_1) RD2MEM[7]
2667 470.672 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 30.113 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[18].Q FB1.uD.dut_inst.dm1.memory[18].D (cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_2) RD2MEM[18]
2668 470.860 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) + (trace:5.039) = 17.593 9.384 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[2]: ALUOUTMEM_aptn_ft[2]: ALUOUTMEM_aptn_ft_0[2]: PCSRCID
2669 470.863 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) + (trace:5.039) = 17.593 9.382 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[3]: ALUOUTMEM_aptn_ft[3]: ALUOUTMEM_aptn_ft_0[3]: PCSRCID
2670 470.863 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) + (trace:5.039) = 17.593 9.382 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[5].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[5]: ALUOUTMEM_aptn_ft[5]: ALUOUTMEM_aptn_ft_0[5]: PCSRCID
2671 470.863 clk:r clk:r - FB1_uD: FB1_uA: FB1_uB x1: x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) + (trace:5.039) = 17.593 9.382 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[4]: ALUOUTMEM_aptn_ft[4]: ALUOUTMEM_aptn_ft_0[4]: PCSRCID
2672 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[22].Q FB1.uD.dut_inst.dm1.memory[22].D (cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_2) RD2MEM[22]
2673 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[38].Q FB1.uD.dut_inst.dm1.memory[38].D (cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_3) RD2MEM[38]
2674 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[31].Q FB1.uD.dut_inst.dm1.memory[31].D (cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_1) RD2MEM[31]
2675 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[24].Q FB1.uD.dut_inst.dm1.memory[24].D (cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_0) RD2MEM[24]
2676 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[36].Q FB1.uD.dut_inst.dm1.memory[36].D (cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_1) RD2MEM[36]
2677 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[34].Q FB1.uD.dut_inst.dm1.memory[34].D (cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_0) RD2MEM[34]
2678 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[33].Q FB1.uD.dut_inst.dm1.memory[33].D (cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_3) RD2MEM[33]
2679 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[26].Q FB1.uD.dut_inst.dm1.memory[26].D (cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_1) RD2MEM[26]
2680 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[32].Q FB1.uD.dut_inst.dm1.memory[32].D (cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_2) RD2MEM[32]
2681 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[28].Q FB1.uD.dut_inst.dm1.memory[28].D (cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_2) RD2MEM[28]
2682 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[23].Q FB1.uD.dut_inst.dm1.memory[23].D (cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_3) RD2MEM[23]
2683 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[37].Q FB1.uD.dut_inst.dm1.memory[37].D (cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_2) RD2MEM[37]
2684 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[21].Q FB1.uD.dut_inst.dm1.memory[21].D (cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_1) RD2MEM[21]
2685 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[30].Q FB1.uD.dut_inst.dm1.memory[30].D (cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_0) RD2MEM[30]
2686 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[20].Q FB1.uD.dut_inst.dm1.memory[20].D (cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_0) RD2MEM[20]
2687 471.669 clk:r clk:r - - x4 (tx:10.000 + rx:10.000) = 20.000 4.546 29.116 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[29].Q FB1.uD.dut_inst.dm1.memory[29].D (cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_3) RD2MEM[29]
2688 473.885 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) = 14.944 4.725 26.115 500.000 FB1.uC.dut_inst.exmem1.aluout_out[8].Q equal.equal ALUOUTMEM[8]: ALUOUTMEM_aptn_ft[8]: ALUOUTMEM_aptn_ft_0[8]
2689 473.885 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) = 14.944 4.725 26.115 500.000 FB1.uC.dut_inst.exmem1.aluout_out[6].Q equal.equal ALUOUTMEM[6]: ALUOUTMEM_aptn_ft[6]: ALUOUTMEM_aptn_ft_0[6]
2690 473.885 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) = 14.944 4.725 26.115 500.000 FB1.uC.dut_inst.exmem1.aluout_out[7].Q equal.equal ALUOUTMEM[7]: ALUOUTMEM_aptn_ft[7]: ALUOUTMEM_aptn_ft_0[7]
2691 473.885 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) = 14.944 4.725 26.115 500.000 FB1.uC.dut_inst.exmem1.aluout_out[9].Q equal.equal ALUOUTMEM[9]: ALUOUTMEM_aptn_ft[9]: ALUOUTMEM_aptn_ft_0[9]
2692 473.885 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:4.750) = 14.944 4.725 26.115 500.000 FB1.uC.dut_inst.exmem1.aluout_out[10].Q equal.equal ALUOUTMEM[10]: ALUOUTMEM_aptn_ft[10]: ALUOUTMEM_aptn_ft_0[10]
2693 473.911 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.410 26.089 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[3].Q stall.stall WRMEM[3]: WRMEM_aptn_ft[3]: WRMEM_aptn_ft_0[3]
2694 473.911 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.410 26.089 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[2].Q stall.stall WRMEM[2]: WRMEM_aptn_ft[2]: WRMEM_aptn_ft_0[2]
2695 474.036 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.286 25.964 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[1].Q stall.stall WRMEM[1]: WRMEM_aptn_ft[1]: WRMEM_aptn_ft_0[1]
2696 474.036 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.286 25.964 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q stall.stall WRMEM[0]: WRMEM_aptn_ft[0]: WRMEM_aptn_ft_0[0]
2697 474.074 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.059 25.926 500.000 FB1.uC.dut_inst.exmem1.memread_out.Q stall.stall MEMREADMEM: MEMREADMEM_aptn_ft: MEMREADMEM_aptn_ft_0
2698 474.243 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 4.079 25.757 500.000 FB1.uC.dut_inst.exmem1.writeregister_out[4].Q stall.stall WRMEM[4]: WRMEM_aptn_ft[4]: WRMEM_aptn_ft_0[4]
2699 474.312 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.292 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB[1]: WRWB_aptn_ft[1]: PCSRCID
2700 474.312 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.292 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB[2]: WRWB_aptn_ft[2]: PCSRCID
2701 474.312 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.292 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB[3]: WRWB_aptn_ft[3]: PCSRCID
2702 474.312 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.292 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB[0]: WRWB_aptn_ft[0]: PCSRCID
2703 474.321 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.284 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[4]: WRITEDATAWB_aptn_ft[4]: PCSRCID
2704 474.321 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.284 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[3]: WRITEDATAWB_aptn_ft[3]: PCSRCID
2705 474.321 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.284 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[5]: WRITEDATAWB_aptn_ft[5]: PCSRCID
2706 474.340 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.264 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[7]: WRITEDATAWB_aptn_ft[7]: PCSRCID
2707 474.340 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.264 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[9]: WRITEDATAWB_aptn_ft[9]: PCSRCID
2708 474.340 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.264 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[10]: WRITEDATAWB_aptn_ft[10]: PCSRCID
2709 474.340 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.264 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[8]: WRITEDATAWB_aptn_ft[8]: PCSRCID
2710 474.340 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.264 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[6]: WRITEDATAWB_aptn_ft[6]: PCSRCID
2711 474.349 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.255 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[15]: WRITEDATAWB_aptn_ft[15]: PCSRCID
2712 474.349 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.255 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[11]: WRITEDATAWB_aptn_ft[11]: PCSRCID
2713 474.349 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.255 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[17]: WRITEDATAWB_aptn_ft[17]: PCSRCID
2714 474.349 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.255 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[16]: WRITEDATAWB_aptn_ft[16]: PCSRCID
2715 474.350 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.254 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[13]: WRITEDATAWB_aptn_ft[13]: PCSRCID
2716 474.350 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.254 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[14]: WRITEDATAWB_aptn_ft[14]: PCSRCID
2717 474.350 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.254 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[12]: WRITEDATAWB_aptn_ft[12]: PCSRCID
2718 474.364 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.240 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[24]: WRITEDATAWB_aptn_ft[24]: PCSRCID
2719 474.364 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.240 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[25]: WRITEDATAWB_aptn_ft[25]: PCSRCID
2720 474.364 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.240 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[26]: WRITEDATAWB_aptn_ft[26]: PCSRCID
2721 474.366 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.238 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[27]: WRITEDATAWB_aptn_ft[27]: PCSRCID
2722 474.366 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.238 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[28]: WRITEDATAWB_aptn_ft[28]: PCSRCID
2723 474.366 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.238 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[29]: WRITEDATAWB_aptn_ft[29]: PCSRCID
2724 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[19]: WRITEDATAWB_aptn_ft[19]: PCSRCID
2725 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[23]: WRITEDATAWB_aptn_ft[23]: PCSRCID
2726 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[18]: WRITEDATAWB_aptn_ft[18]: PCSRCID
2727 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[22]: WRITEDATAWB_aptn_ft[22]: PCSRCID
2728 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[21]: WRITEDATAWB_aptn_ft[21]: PCSRCID
2729 474.375 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.229 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[20]: WRITEDATAWB_aptn_ft[20]: PCSRCID
2730 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[34]: WRITEDATAWB_aptn_ft[34]: PCSRCID
2731 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[33]: WRITEDATAWB_aptn_ft[33]: PCSRCID
2732 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[32]: WRITEDATAWB_aptn_ft[32]: PCSRCID
2733 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[35]: WRITEDATAWB_aptn_ft[35]: PCSRCID
2734 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[30]: WRITEDATAWB_aptn_ft[30]: PCSRCID
2735 474.386 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[31]: WRITEDATAWB_aptn_ft[31]: PCSRCID
2736 474.387 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 8.218 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[36]: WRITEDATAWB_aptn_ft[36]: PCSRCID
2737 474.493 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[40]: WRITEDATAWB_aptn_ft[40]: PCSRCID
2738 474.493 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[41]: WRITEDATAWB_aptn_ft[41]: PCSRCID
2739 474.493 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.219 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[39]: WRITEDATAWB_aptn_ft[39]: PCSRCID
2740 474.494 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.218 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[38]: WRITEDATAWB_aptn_ft[38]: PCSRCID
2741 474.494 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.218 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[37]: WRITEDATAWB_aptn_ft[37]: PCSRCID
2742 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[43]: WRITEDATAWB_aptn_ft[43]: PCSRCID
2743 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[46]: WRITEDATAWB_aptn_ft[46]: PCSRCID
2744 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[45]: WRITEDATAWB_aptn_ft[45]: PCSRCID
2745 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[47]: WRITEDATAWB_aptn_ft[47]: PCSRCID
2746 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[44]: WRITEDATAWB_aptn_ft[44]: PCSRCID
2747 474.519 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.192 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[42]: WRITEDATAWB_aptn_ft[42]: PCSRCID
2748 474.540 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.171 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[50]: WRITEDATAWB_aptn_ft[50]: PCSRCID
2749 474.540 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.171 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[48]: WRITEDATAWB_aptn_ft[48]: PCSRCID
2750 474.540 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.171 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[49]: WRITEDATAWB_aptn_ft[49]: PCSRCID
2751 474.542 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.170 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[51]: WRITEDATAWB_aptn_ft[51]: PCSRCID
2752 474.542 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.170 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[53]: WRITEDATAWB_aptn_ft[53]: PCSRCID
2753 474.542 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.170 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[52]: WRITEDATAWB_aptn_ft[52]: PCSRCID
2754 474.566 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.146 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[54]: WRITEDATAWB_aptn_ft[54]: PCSRCID
2755 474.566 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.146 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[56]: WRITEDATAWB_aptn_ft[56]: PCSRCID
2756 474.566 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.146 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[55]: WRITEDATAWB_aptn_ft[55]: PCSRCID
2757 474.576 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.135 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[57]: WRITEDATAWB_aptn_ft[57]: PCSRCID
2758 474.576 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.135 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[59]: WRITEDATAWB_aptn_ft[59]: PCSRCID
2759 474.576 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.135 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[58]: WRITEDATAWB_aptn_ft[58]: PCSRCID
2760 474.599 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.112 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[61]: WRITEDATAWB_aptn_ft[61]: PCSRCID
2761 474.599 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.112 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[62]: WRITEDATAWB_aptn_ft[62]: PCSRCID
2762 474.599 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.112 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[60]: WRITEDATAWB_aptn_ft[60]: PCSRCID
2763 474.678 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 8.034 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[63]: WRITEDATAWB_aptn_ft[63]: PCSRCID
2764 474.709 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.146) + (trace:5.039) = 15.233 7.896 71.568 500.737 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRWB[4]: WRWB_aptn_ft[4]: PCSRCID
2765 475.226 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:4.750) = 13.551 4.747 24.774 500.000 FB1.uC.dut_inst.exmem1.aluout_out[0].Q equal.equal ALUOUTMEM[0]: ALUOUTMEM_aptn_ft[0]: ALUOUTMEM_aptn_ft_0[0]
2766 475.226 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:4.750) = 13.551 4.747 24.774 500.000 FB1.uC.dut_inst.exmem1.aluout_out[1].Q equal.equal ALUOUTMEM[1]: ALUOUTMEM_aptn_ft[1]: ALUOUTMEM_aptn_ft_0[1]
2767 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[39].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[39]: DMOUTWB_aptn_ft[39]: PCSRCID
2768 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[34].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[34]: DMOUTWB_aptn_ft[34]: PCSRCID
2769 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[35].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[35]: DMOUTWB_aptn_ft[35]: PCSRCID
2770 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[40].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[40]: DMOUTWB_aptn_ft[40]: PCSRCID
2771 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[33].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[33]: DMOUTWB_aptn_ft[33]: PCSRCID
2772 475.602 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[41].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[41]: DMOUTWB_aptn_ft[41]: PCSRCID
2773 475.603 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.108 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[37].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[37]: DMOUTWB_aptn_ft[37]: PCSRCID
2774 475.603 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.108 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[38].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[38]: DMOUTWB_aptn_ft[38]: PCSRCID
2775 475.603 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.108 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[36].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[36]: DMOUTWB_aptn_ft[36]: PCSRCID
2776 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[47].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[47]: DMOUTWB_aptn_ft[47]: PCSRCID
2777 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[45].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[45]: DMOUTWB_aptn_ft[45]: PCSRCID
2778 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[46].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[46]: DMOUTWB_aptn_ft[46]: PCSRCID
2779 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[44].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[44]: DMOUTWB_aptn_ft[44]: PCSRCID
2780 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[43].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[43]: DMOUTWB_aptn_ft[43]: PCSRCID
2781 475.629 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.083 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[42].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[42]: DMOUTWB_aptn_ft[42]: PCSRCID
2782 475.650 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.062 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[50].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[50]: DMOUTWB_aptn_ft[50]: PCSRCID
2783 475.650 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.062 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[49].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[49]: DMOUTWB_aptn_ft[49]: PCSRCID
2784 475.650 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.062 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[48].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[48]: DMOUTWB_aptn_ft[48]: PCSRCID
2785 475.651 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.060 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[52].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[52]: DMOUTWB_aptn_ft[52]: PCSRCID
2786 475.651 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.060 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[51].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[51]: DMOUTWB_aptn_ft[51]: PCSRCID
2787 475.651 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.060 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[53].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[53]: DMOUTWB_aptn_ft[53]: PCSRCID
2788 475.675 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.036 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[56].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[56]: DMOUTWB_aptn_ft[56]: PCSRCID
2789 475.675 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.036 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[54].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[54]: DMOUTWB_aptn_ft[54]: PCSRCID
2790 475.675 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.036 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[55].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[55]: DMOUTWB_aptn_ft[55]: PCSRCID
2791 475.686 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.026 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[58].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[58]: DMOUTWB_aptn_ft[58]: PCSRCID
2792 475.686 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.026 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[57].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[57]: DMOUTWB_aptn_ft[57]: PCSRCID
2793 475.686 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.026 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[59].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[59]: DMOUTWB_aptn_ft[59]: PCSRCID
2794 475.701 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.011 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[62].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[62]: DMOUTWB_aptn_ft[62]: PCSRCID
2795 475.701 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.011 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[61].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[61]: DMOUTWB_aptn_ft[61]: PCSRCID
2796 475.701 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 7.011 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[60].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[60]: DMOUTWB_aptn_ft[60]: PCSRCID
2797 475.703 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 8.295 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[1]: WRITEDATAWB_aptn_ft[1]: PCSRCID
2798 475.703 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 8.295 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[2]: WRITEDATAWB_aptn_ft[2]: PCSRCID
2799 475.703 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 8.295 71.568 500.737 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE WRITEDATAWB[0]: WRITEDATAWB_aptn_ft[0]: PCSRCID
2800 475.779 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:5.039) + (trace:5.039) = 15.126 6.932 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[63].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[63]: DMOUTWB_aptn_ft[63]: PCSRCID
2801 475.816 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.185 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[0]: DMOUTWB_aptn_ft[0]: PCSRCID
2802 475.816 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.185 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[1]: DMOUTWB_aptn_ft[1]: PCSRCID
2803 475.816 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.185 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[2]: DMOUTWB_aptn_ft[2]: PCSRCID
2804 475.818 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.182 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[3]: DMOUTWB_aptn_ft[3]: PCSRCID
2805 475.818 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.182 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[5].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[5]: DMOUTWB_aptn_ft[5]: PCSRCID
2806 475.837 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.163 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[7].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[7]: DMOUTWB_aptn_ft[7]: PCSRCID
2807 475.837 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.163 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[9].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[9]: DMOUTWB_aptn_ft[9]: PCSRCID
2808 475.837 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.163 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[6].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[6]: DMOUTWB_aptn_ft[6]: PCSRCID
2809 475.837 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.163 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[8].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[8]: DMOUTWB_aptn_ft[8]: PCSRCID
2810 475.837 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.163 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[10].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[10]: DMOUTWB_aptn_ft[10]: PCSRCID
2811 475.855 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.146 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[11].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[11]: DMOUTWB_aptn_ft[11]: PCSRCID
2812 475.856 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.145 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[13].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[13]: DMOUTWB_aptn_ft[13]: PCSRCID
2813 475.856 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:4.750) + (trace:5.039) = 14.837 7.145 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[12].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[12]: DMOUTWB_aptn_ft[12]: PCSRCID
2814 476.223 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) = 12.554 4.747 23.777 500.000 FB1.uC.dut_inst.exmem1.aluout_out[2].Q equal.equal ALUOUTMEM[2]: ALUOUTMEM_aptn_ft[2]: ALUOUTMEM_aptn_ft_0[2]
2815 476.226 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) = 12.554 4.744 23.774 500.000 FB1.uC.dut_inst.exmem1.aluout_out[4].Q equal.equal ALUOUTMEM[4]: ALUOUTMEM_aptn_ft[4]: ALUOUTMEM_aptn_ft_0[4]
2816 476.226 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) = 12.554 4.744 23.774 500.000 FB1.uC.dut_inst.exmem1.aluout_out[5].Q equal.equal ALUOUTMEM[5]: ALUOUTMEM_aptn_ft[5]: ALUOUTMEM_aptn_ft_0[5]
2817 476.226 clk:r System:r - FB1_uD: FB1_uA x1: x1: x1 (trace:3.753) + (trace:5.048) + (trace:3.753) = 12.554 4.744 23.774 500.000 FB1.uC.dut_inst.exmem1.aluout_out[3].Q equal.equal ALUOUTMEM[3]: ALUOUTMEM_aptn_ft[3]: ALUOUTMEM_aptn_ft_0[3]
2818 476.815 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.182 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[4]: DMOUTWB_aptn_ft[4]: PCSRCID
2819 476.852 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.146 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[17].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[17]: DMOUTWB_aptn_ft[17]: PCSRCID
2820 476.852 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.146 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[16].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[16]: DMOUTWB_aptn_ft[16]: PCSRCID
2821 476.852 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.146 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[15].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[15]: DMOUTWB_aptn_ft[15]: PCSRCID
2822 476.853 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.145 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[14].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[14]: DMOUTWB_aptn_ft[14]: PCSRCID
2823 476.867 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.131 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[26].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[26]: DMOUTWB_aptn_ft[26]: PCSRCID
2824 476.867 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.131 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[24].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[24]: DMOUTWB_aptn_ft[24]: PCSRCID
2825 476.867 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.131 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[25].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[25]: DMOUTWB_aptn_ft[25]: PCSRCID
2826 476.869 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.128 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[27].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[27]: DMOUTWB_aptn_ft[27]: PCSRCID
2827 476.869 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.128 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[29].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[29]: DMOUTWB_aptn_ft[29]: PCSRCID
2828 476.869 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.128 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[28].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[28]: DMOUTWB_aptn_ft[28]: PCSRCID
2829 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[23].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[23]: DMOUTWB_aptn_ft[23]: PCSRCID
2830 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[19].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[19]: DMOUTWB_aptn_ft[19]: PCSRCID
2831 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[22].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[22]: DMOUTWB_aptn_ft[22]: PCSRCID
2832 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[21].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[21]: DMOUTWB_aptn_ft[21]: PCSRCID
2833 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[18].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[18]: DMOUTWB_aptn_ft[18]: PCSRCID
2834 476.878 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.119 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[20].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[20]: DMOUTWB_aptn_ft[20]: PCSRCID
2835 476.888 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[31].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[31]: DMOUTWB_aptn_ft[31]: PCSRCID
2836 476.888 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[32].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[32]: DMOUTWB_aptn_ft[32]: PCSRCID
2837 476.888 clk:r clk:r - FB1_uA: FB1_uB x1: x1: x1 (trace:5.048) + (trace:3.753) + (trace:5.039) = 13.840 7.109 71.568 500.737 FB1.uD.dut_inst.memwb1.dmout_out[30].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE DMOUTWB[30]: DMOUTWB_aptn_ft[30]: PCSRCID
2838 477.035 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 2.089 23.768 500.803 FB1.uC.dut_inst.exmem1.writeregister_out[2].Q FB1.uB.dut_inst.idex1.alusrc_out.D WRMEM[2]: WRMEM_aptn_ft[2]: WRMEM_aptn_ft_0[2]
2839 477.035 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 2.089 23.768 500.803 FB1.uC.dut_inst.exmem1.writeregister_out[3].Q FB1.uB.dut_inst.idex1.alusrc_out.D WRMEM[3]: WRMEM_aptn_ft[3]: WRMEM_aptn_ft_0[3]
2840 477.159 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 1.965 23.643 500.803 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uB.dut_inst.idex1.alusrc_out.D WRMEM[0]: WRMEM_aptn_ft[0]: WRMEM_aptn_ft_0[0]
2841 477.159 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 1.965 23.643 500.803 FB1.uC.dut_inst.exmem1.writeregister_out[1].Q FB1.uB.dut_inst.idex1.alusrc_out.D WRMEM[1]: WRMEM_aptn_ft[1]: WRMEM_aptn_ft_0[1]
2842 477.197 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 1.738 23.605 500.803 FB1.uC.dut_inst.exmem1.memread_out.Q FB1.uB.dut_inst.idex1.alusrc_out.D MEMREADMEM: MEMREADMEM_aptn_ft: MEMREADMEM_aptn_ft_0
2843 477.367 clk:r clk:r - FB1_uD: FB1_uA x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:5.039) = 15.233 1.758 23.436 500.803 FB1.uC.dut_inst.exmem1.writeregister_out[4].Q FB1.uB.dut_inst.idex1.alusrc_out.D WRMEM[4]: WRMEM_aptn_ft[4]: WRMEM_aptn_ft_0[4]
2844 478.119 clk:r clk:r - FB1_uA: FB1_uD x1: x1: x1 (trace:5.039) + (trace:5.048) + (trace:5.146) = 15.233 6.616 22.666 500.785 FB1.uB.dut_inst.idex1.writeregister_out[0].Q FB1.uC.dut_inst.exmem1.writeregister_out[0].D WREX[0]: WREX_aptn_ft[0]: WREX_aptn_ft_0[0]
2845 478.119 clk:r clk:r - FB1_uA: FB1_uD x1: x1: x1 (trace:5.039) + (trace:5.048) + (trace:5.146) = 15.233 6.616 22.666 500.785 FB1.uB.dut_inst.idex1.writeregister_out[1].Q FB1.uC.dut_inst.exmem1.writeregister_out[1].D WREX[1]: WREX_aptn_ft[1]: WREX_aptn_ft_0[1]
2846 478.119 clk:r clk:r - FB1_uA: FB1_uD x1: x1: x1 (trace:5.039) + (trace:5.048) + (trace:5.146) = 15.233 6.616 22.666 500.785 FB1.uB.dut_inst.idex1.writeregister_out[2].Q FB1.uC.dut_inst.exmem1.writeregister_out[2].D WREX[2]: WREX_aptn_ft[2]: WREX_aptn_ft_0[2]
2847 478.119 clk:r clk:r - FB1_uA: FB1_uD x1: x1: x1 (trace:5.039) + (trace:5.048) + (trace:5.146) = 15.233 6.616 22.666 500.785 FB1.uB.dut_inst.idex1.writeregister_out[3].Q FB1.uC.dut_inst.exmem1.writeregister_out[3].D WREX[3]: WREX_aptn_ft[3]: WREX_aptn_ft_0[3]
2848 479.435 clk:r clk:r - FB1_uA: FB1_uD x1: x1: x1 (trace:5.146) + (trace:5.048) + (trace:3.753) = 13.947 6.586 21.350 500.785 FB1.uB.dut_inst.idex1.memread_out.Q FB1.uC.dut_inst.exmem1.memread_out.D MEMREADEX: MEMREADEX_aptn_ft: MEMREADEX_aptn_ft_0
2849 479.675 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.881 20.325 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q equal.equal WRWB[0]: WRWB_aptn_ft[0]
2850 479.675 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.881 20.325 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q equal.equal WRWB[3]: WRWB_aptn_ft[3]
2851 479.675 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.881 20.325 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q equal.equal WRWB[1]: WRWB_aptn_ft[1]
2852 479.675 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.881 20.325 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q equal.equal WRWB[2]: WRWB_aptn_ft[2]
2853 479.684 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.229 20.316 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[5]: WRITEDATAWB_aptn_ft[5]
2854 479.684 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.229 20.316 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[4]: WRITEDATAWB_aptn_ft[4]
2855 479.684 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.229 20.316 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[3]: WRITEDATAWB_aptn_ft[3]
2856 479.703 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.210 20.297 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[9]: WRITEDATAWB_aptn_ft[9]
2857 479.703 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.210 20.297 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[6]: WRITEDATAWB_aptn_ft[6]
2858 479.703 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.210 20.297 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[8]: WRITEDATAWB_aptn_ft[8]
2859 479.703 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.210 20.297 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[7]: WRITEDATAWB_aptn_ft[7]
2860 479.703 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.210 20.297 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[10]: WRITEDATAWB_aptn_ft[10]
2861 479.712 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.201 20.288 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[17]: WRITEDATAWB_aptn_ft[17]
2862 479.712 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.201 20.288 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[16]: WRITEDATAWB_aptn_ft[16]
2863 479.712 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.201 20.288 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[11]: WRITEDATAWB_aptn_ft[11]
2864 479.712 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.201 20.288 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[15]: WRITEDATAWB_aptn_ft[15]
2865 479.713 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.200 20.287 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[14]: WRITEDATAWB_aptn_ft[14]
2866 479.713 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.200 20.287 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[12]: WRITEDATAWB_aptn_ft[12]
2867 479.713 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.200 20.287 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[13]: WRITEDATAWB_aptn_ft[13]
2868 479.727 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.186 20.273 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[26]: WRITEDATAWB_aptn_ft[26]
2869 479.727 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.186 20.273 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[24]: WRITEDATAWB_aptn_ft[24]
2870 479.727 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.186 20.273 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[25]: WRITEDATAWB_aptn_ft[25]
2871 479.730 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.184 20.270 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[27]: WRITEDATAWB_aptn_ft[27]
2872 479.730 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.184 20.270 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[29]: WRITEDATAWB_aptn_ft[29]
2873 479.730 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.184 20.270 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[28]: WRITEDATAWB_aptn_ft[28]
2874 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[19]: WRITEDATAWB_aptn_ft[19]
2875 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[18]: WRITEDATAWB_aptn_ft[18]
2876 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[21]: WRITEDATAWB_aptn_ft[21]
2877 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[23]: WRITEDATAWB_aptn_ft[23]
2878 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[20]: WRITEDATAWB_aptn_ft[20]
2879 479.739 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.175 20.261 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[22]: WRITEDATAWB_aptn_ft[22]
2880 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[34]: WRITEDATAWB_aptn_ft[34]
2881 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[35]: WRITEDATAWB_aptn_ft[35]
2882 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[31]: WRITEDATAWB_aptn_ft[31]
2883 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[33]: WRITEDATAWB_aptn_ft[33]
2884 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[30]: WRITEDATAWB_aptn_ft[30]
2885 479.749 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.165 20.251 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[32]: WRITEDATAWB_aptn_ft[32]
2886 479.750 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.163 20.250 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[36]: WRITEDATAWB_aptn_ft[36]
2887 479.856 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.165 20.144 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[40]: WRITEDATAWB_aptn_ft[40]
2888 479.856 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.165 20.144 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[39]: WRITEDATAWB_aptn_ft[39]
2889 479.856 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.165 20.144 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[41]: WRITEDATAWB_aptn_ft[41]
2890 479.857 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.163 20.143 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[37]: WRITEDATAWB_aptn_ft[37]
2891 479.857 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.163 20.143 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[38]: WRITEDATAWB_aptn_ft[38]
2892 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[43]: WRITEDATAWB_aptn_ft[43]
2893 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[42]: WRITEDATAWB_aptn_ft[42]
2894 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[44]: WRITEDATAWB_aptn_ft[44]
2895 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[46]: WRITEDATAWB_aptn_ft[46]
2896 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[45]: WRITEDATAWB_aptn_ft[45]
2897 479.882 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.138 20.118 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[47]: WRITEDATAWB_aptn_ft[47]
2898 479.903 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.117 20.097 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[49]: WRITEDATAWB_aptn_ft[49]
2899 479.903 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.117 20.097 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[48]: WRITEDATAWB_aptn_ft[48]
2900 479.903 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.117 20.097 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[50]: WRITEDATAWB_aptn_ft[50]
2901 479.905 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.115 20.095 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[52]: WRITEDATAWB_aptn_ft[52]
2902 479.905 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.115 20.095 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[51]: WRITEDATAWB_aptn_ft[51]
2903 479.905 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.115 20.095 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[53]: WRITEDATAWB_aptn_ft[53]
2904 479.929 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.091 20.071 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[54]: WRITEDATAWB_aptn_ft[54]
2905 479.929 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.091 20.071 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[56]: WRITEDATAWB_aptn_ft[56]
2906 479.929 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.091 20.071 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[55]: WRITEDATAWB_aptn_ft[55]
2907 479.939 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.081 20.061 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[57]: WRITEDATAWB_aptn_ft[57]
2908 479.939 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.081 20.061 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[58]: WRITEDATAWB_aptn_ft[58]
2909 479.939 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.081 20.061 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[59]: WRITEDATAWB_aptn_ft[59]
2910 479.963 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.058 20.037 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[61]: WRITEDATAWB_aptn_ft[61]
2911 479.963 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.058 20.037 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[62]: WRITEDATAWB_aptn_ft[62]
2912 479.963 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 5.058 20.037 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[60]: WRITEDATAWB_aptn_ft[60]
2913 480.041 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.979 19.959 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[63]: WRITEDATAWB_aptn_ft[63]
2914 480.072 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 5.484 19.928 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q equal.equal WRWB[4]: WRWB_aptn_ft[4]
2915 480.894 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 8.211 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[0].Q IMMID[63:0].IMMID[12] INSTRUCID[0]: N_1
2916 480.894 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.753 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[1].Q IMMID[63:0].IMMID[12] INSTRUCID[1]: N_1
2917 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[34].Q equal.equal DMOUTWB[34]: DMOUTWB_aptn_ft[34]
2918 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[41].Q equal.equal DMOUTWB[41]: DMOUTWB_aptn_ft[41]
2919 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[39].Q equal.equal DMOUTWB[39]: DMOUTWB_aptn_ft[39]
2920 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[40].Q equal.equal DMOUTWB[40]: DMOUTWB_aptn_ft[40]
2921 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[35].Q equal.equal DMOUTWB[35]: DMOUTWB_aptn_ft[35]
2922 480.965 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.697 19.035 500.000 FB1.uD.dut_inst.memwb1.dmout_out[33].Q equal.equal DMOUTWB[33]: DMOUTWB_aptn_ft[33]
2923 480.967 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.696 19.033 500.000 FB1.uD.dut_inst.memwb1.dmout_out[36].Q equal.equal DMOUTWB[36]: DMOUTWB_aptn_ft[36]
2924 480.967 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.696 19.033 500.000 FB1.uD.dut_inst.memwb1.dmout_out[38].Q equal.equal DMOUTWB[38]: DMOUTWB_aptn_ft[38]
2925 480.967 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.696 19.033 500.000 FB1.uD.dut_inst.memwb1.dmout_out[37].Q equal.equal DMOUTWB[37]: DMOUTWB_aptn_ft[37]
2926 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[46].Q equal.equal DMOUTWB[46]: DMOUTWB_aptn_ft[46]
2927 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[42].Q equal.equal DMOUTWB[42]: DMOUTWB_aptn_ft[42]
2928 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[45].Q equal.equal DMOUTWB[45]: DMOUTWB_aptn_ft[45]
2929 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[43].Q equal.equal DMOUTWB[43]: DMOUTWB_aptn_ft[43]
2930 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[47].Q equal.equal DMOUTWB[47]: DMOUTWB_aptn_ft[47]
2931 480.992 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.671 19.008 500.000 FB1.uD.dut_inst.memwb1.dmout_out[44].Q equal.equal DMOUTWB[44]: DMOUTWB_aptn_ft[44]
2932 481.013 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.650 18.987 500.000 FB1.uD.dut_inst.memwb1.dmout_out[50].Q equal.equal DMOUTWB[50]: DMOUTWB_aptn_ft[50]
2933 481.013 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.650 18.987 500.000 FB1.uD.dut_inst.memwb1.dmout_out[48].Q equal.equal DMOUTWB[48]: DMOUTWB_aptn_ft[48]
2934 481.013 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.650 18.987 500.000 FB1.uD.dut_inst.memwb1.dmout_out[49].Q equal.equal DMOUTWB[49]: DMOUTWB_aptn_ft[49]
2935 481.015 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.648 18.985 500.000 FB1.uD.dut_inst.memwb1.dmout_out[53].Q equal.equal DMOUTWB[53]: DMOUTWB_aptn_ft[53]
2936 481.015 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.648 18.985 500.000 FB1.uD.dut_inst.memwb1.dmout_out[52].Q equal.equal DMOUTWB[52]: DMOUTWB_aptn_ft[52]
2937 481.015 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.648 18.985 500.000 FB1.uD.dut_inst.memwb1.dmout_out[51].Q equal.equal DMOUTWB[51]: DMOUTWB_aptn_ft[51]
2938 481.039 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.624 18.961 500.000 FB1.uD.dut_inst.memwb1.dmout_out[54].Q equal.equal DMOUTWB[54]: DMOUTWB_aptn_ft[54]
2939 481.039 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.624 18.961 500.000 FB1.uD.dut_inst.memwb1.dmout_out[56].Q equal.equal DMOUTWB[56]: DMOUTWB_aptn_ft[56]
2940 481.039 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.624 18.961 500.000 FB1.uD.dut_inst.memwb1.dmout_out[55].Q equal.equal DMOUTWB[55]: DMOUTWB_aptn_ft[55]
2941 481.049 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.614 18.951 500.000 FB1.uD.dut_inst.memwb1.dmout_out[58].Q equal.equal DMOUTWB[58]: DMOUTWB_aptn_ft[58]
2942 481.049 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.614 18.951 500.000 FB1.uD.dut_inst.memwb1.dmout_out[57].Q equal.equal DMOUTWB[57]: DMOUTWB_aptn_ft[57]
2943 481.049 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.614 18.951 500.000 FB1.uD.dut_inst.memwb1.dmout_out[59].Q equal.equal DMOUTWB[59]: DMOUTWB_aptn_ft[59]
2944 481.064 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.599 18.936 500.000 FB1.uD.dut_inst.memwb1.dmout_out[62].Q equal.equal DMOUTWB[62]: DMOUTWB_aptn_ft[62]
2945 481.064 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.599 18.936 500.000 FB1.uD.dut_inst.memwb1.dmout_out[61].Q equal.equal DMOUTWB[61]: DMOUTWB_aptn_ft[61]
2946 481.064 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.599 18.936 500.000 FB1.uD.dut_inst.memwb1.dmout_out[60].Q equal.equal DMOUTWB[60]: DMOUTWB_aptn_ft[60]
2947 481.066 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 5.240 18.934 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[1]: WRITEDATAWB_aptn_ft[1]
2948 481.066 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 5.240 18.934 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[2]: WRITEDATAWB_aptn_ft[2]
2949 481.066 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 5.240 18.934 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q equal.equal WRITEDATAWB[0]: WRITEDATAWB_aptn_ft[0]
2950 481.120 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.527 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[4].Q IMMID[63:0].IMMID[12] INSTRUCID[4]: N_1
2951 481.142 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 4.521 18.858 500.000 FB1.uD.dut_inst.memwb1.dmout_out[63].Q equal.equal DMOUTWB[63]: DMOUTWB_aptn_ft[63]
2952 481.179 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.773 18.821 500.000 FB1.uD.dut_inst.memwb1.dmout_out[2].Q equal.equal DMOUTWB[2]: DMOUTWB_aptn_ft[2]
2953 481.179 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.773 18.821 500.000 FB1.uD.dut_inst.memwb1.dmout_out[1].Q equal.equal DMOUTWB[1]: DMOUTWB_aptn_ft[1]
2954 481.179 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.773 18.821 500.000 FB1.uD.dut_inst.memwb1.dmout_out[0].Q equal.equal DMOUTWB[0]: DMOUTWB_aptn_ft[0]
2955 481.181 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.466 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[6].Q IMMID[63:0].IMMID[12] INSTRUCID[6]: N_1
2956 481.182 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.770 18.819 500.000 FB1.uD.dut_inst.memwb1.dmout_out[3].Q equal.equal DMOUTWB[3]: DMOUTWB_aptn_ft[3]
2957 481.182 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.770 18.819 500.000 FB1.uD.dut_inst.memwb1.dmout_out[5].Q equal.equal DMOUTWB[5]: DMOUTWB_aptn_ft[5]
2958 481.201 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.751 18.799 500.000 FB1.uD.dut_inst.memwb1.dmout_out[7].Q equal.equal DMOUTWB[7]: DMOUTWB_aptn_ft[7]
2959 481.201 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.751 18.799 500.000 FB1.uD.dut_inst.memwb1.dmout_out[10].Q equal.equal DMOUTWB[10]: DMOUTWB_aptn_ft[10]
2960 481.201 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.751 18.799 500.000 FB1.uD.dut_inst.memwb1.dmout_out[6].Q equal.equal DMOUTWB[6]: DMOUTWB_aptn_ft[6]
2961 481.201 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.751 18.799 500.000 FB1.uD.dut_inst.memwb1.dmout_out[8].Q equal.equal DMOUTWB[8]: DMOUTWB_aptn_ft[8]
2962 481.201 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.751 18.799 500.000 FB1.uD.dut_inst.memwb1.dmout_out[9].Q equal.equal DMOUTWB[9]: DMOUTWB_aptn_ft[9]
2963 481.204 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.443 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[3].Q IMMID[63:0].IMMID[12] INSTRUCID[3]: N_1
2964 481.204 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.443 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[5].Q IMMID[63:0].IMMID[12] INSTRUCID[5]: N_1
2965 481.204 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.443 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[2].Q IMMID[63:0].IMMID[12] INSTRUCID[2]: N_1
2966 481.218 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.734 18.782 500.000 FB1.uD.dut_inst.memwb1.dmout_out[11].Q equal.equal DMOUTWB[11]: DMOUTWB_aptn_ft[11]
2967 481.219 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.733 18.781 500.000 FB1.uD.dut_inst.memwb1.dmout_out[12].Q equal.equal DMOUTWB[12]: DMOUTWB_aptn_ft[12]
2968 481.219 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:4.750) = 9.798 4.733 18.781 500.000 FB1.uD.dut_inst.memwb1.dmout_out[13].Q equal.equal DMOUTWB[13]: DMOUTWB_aptn_ft[13]
2969 481.338 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[20]: PCSRCID
2970 481.338 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[22]: PCSRCID
2971 481.338 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[21]: PCSRCID
2972 481.338 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[23]: PCSRCID
2973 481.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[17].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[17]: PCSRCID
2974 481.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[18].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[18]: PCSRCID
2975 481.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[15].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[15]: PCSRCID
2976 481.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 6.421 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[16].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[16]: PCSRCID
2977 481.726 clk:r System:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.921 19.106 500.000 FB1.uA.dut_inst.ifid1.out_instruc[31].Q IMMID[63:0].IMMID[12] INSTRUCID[31]: N_1
2978 481.777 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 5.982 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[24]: PCSRCID
2979 481.777 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 5.982 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[19].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[19]: PCSRCID
2980 482.179 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.770 17.822 500.000 FB1.uD.dut_inst.memwb1.dmout_out[4].Q equal.equal DMOUTWB[4]: DMOUTWB_aptn_ft[4]
2981 482.215 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.734 17.785 500.000 FB1.uD.dut_inst.memwb1.dmout_out[16].Q equal.equal DMOUTWB[16]: DMOUTWB_aptn_ft[16]
2982 482.215 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.734 17.785 500.000 FB1.uD.dut_inst.memwb1.dmout_out[17].Q equal.equal DMOUTWB[17]: DMOUTWB_aptn_ft[17]
2983 482.215 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.734 17.785 500.000 FB1.uD.dut_inst.memwb1.dmout_out[15].Q equal.equal DMOUTWB[15]: DMOUTWB_aptn_ft[15]
2984 482.216 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.733 17.784 500.000 FB1.uD.dut_inst.memwb1.dmout_out[14].Q equal.equal DMOUTWB[14]: DMOUTWB_aptn_ft[14]
2985 482.230 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.719 17.770 500.000 FB1.uD.dut_inst.memwb1.dmout_out[25].Q equal.equal DMOUTWB[25]: DMOUTWB_aptn_ft[25]
2986 482.230 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.719 17.770 500.000 FB1.uD.dut_inst.memwb1.dmout_out[26].Q equal.equal DMOUTWB[26]: DMOUTWB_aptn_ft[26]
2987 482.230 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.719 17.770 500.000 FB1.uD.dut_inst.memwb1.dmout_out[24].Q equal.equal DMOUTWB[24]: DMOUTWB_aptn_ft[24]
2988 482.232 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.716 17.768 500.000 FB1.uD.dut_inst.memwb1.dmout_out[29].Q equal.equal DMOUTWB[29]: DMOUTWB_aptn_ft[29]
2989 482.232 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.716 17.768 500.000 FB1.uD.dut_inst.memwb1.dmout_out[28].Q equal.equal DMOUTWB[28]: DMOUTWB_aptn_ft[28]
2990 482.232 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.716 17.768 500.000 FB1.uD.dut_inst.memwb1.dmout_out[27].Q equal.equal DMOUTWB[27]: DMOUTWB_aptn_ft[27]
2991 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[22].Q equal.equal DMOUTWB[22]: DMOUTWB_aptn_ft[22]
2992 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[20].Q equal.equal DMOUTWB[20]: DMOUTWB_aptn_ft[20]
2993 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[21].Q equal.equal DMOUTWB[21]: DMOUTWB_aptn_ft[21]
2994 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[18].Q equal.equal DMOUTWB[18]: DMOUTWB_aptn_ft[18]
2995 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[19].Q equal.equal DMOUTWB[19]: DMOUTWB_aptn_ft[19]
2996 482.241 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.708 17.759 500.000 FB1.uD.dut_inst.memwb1.dmout_out[23].Q equal.equal DMOUTWB[23]: DMOUTWB_aptn_ft[23]
2997 482.251 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.697 17.749 500.000 FB1.uD.dut_inst.memwb1.dmout_out[30].Q equal.equal DMOUTWB[30]: DMOUTWB_aptn_ft[30]
2998 482.251 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.697 17.749 500.000 FB1.uD.dut_inst.memwb1.dmout_out[32].Q equal.equal DMOUTWB[32]: DMOUTWB_aptn_ft[32]
2999 482.251 clk:r System:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.697 17.749 500.000 FB1.uD.dut_inst.memwb1.dmout_out[31].Q equal.equal DMOUTWB[31]: DMOUTWB_aptn_ft[31]
3000 482.518 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.135 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[15].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[15]: PCSRCID
3001 482.518 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.135 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[17].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[17]: PCSRCID
3002 482.518 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.135 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[16].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[16]: PCSRCID
3003 482.519 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.133 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[14].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[14]: PCSRCID
3004 482.519 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.133 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[13].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[13]: PCSRCID
3005 482.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.120 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[24].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[24]: PCSRCID
3006 482.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.120 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[26].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[26]: PCSRCID
3007 482.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.120 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[25].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[25]: PCSRCID
3008 482.535 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.117 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[28].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[28]: PCSRCID
3009 482.535 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.117 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[27].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[27]: PCSRCID
3010 482.535 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.117 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[29].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[29]: PCSRCID
3011 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[20].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[20]: PCSRCID
3012 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[23].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[23]: PCSRCID
3013 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[21].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[21]: PCSRCID
3014 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[22].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[22]: PCSRCID
3015 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[19].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[19]: PCSRCID
3016 482.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.108 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[18].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[18]: PCSRCID
3017 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[31].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[31]: PCSRCID
3018 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[32].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[32]: PCSRCID
3019 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[39].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[39]: PCSRCID
3020 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[33].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[33]: PCSRCID
3021 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[40].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[40]: PCSRCID
3022 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[41].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[41]: PCSRCID
3023 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[30].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[30]: PCSRCID
3024 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[34].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[34]: PCSRCID
3025 482.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.098 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[35].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[35]: PCSRCID
3026 482.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.097 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[38].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[38]: PCSRCID
3027 482.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.097 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[37].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[37]: PCSRCID
3028 482.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.097 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[36].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[36]: PCSRCID
3029 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[45].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[45]: PCSRCID
3030 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[43].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[43]: PCSRCID
3031 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[46].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[46]: PCSRCID
3032 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[44].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[44]: PCSRCID
3033 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[47].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[47]: PCSRCID
3034 482.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.072 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[42].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[42]: PCSRCID
3035 482.602 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.051 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[49].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[49]: PCSRCID
3036 482.602 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.051 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[50].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[50]: PCSRCID
3037 482.602 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.051 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[48].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[48]: PCSRCID
3038 482.604 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.049 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[52].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[52]: PCSRCID
3039 482.604 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.049 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[53].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[53]: PCSRCID
3040 482.604 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.049 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[51].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[51]: PCSRCID
3041 482.625 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 5.135 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[11].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[11]: PCSRCID
3042 482.626 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 5.133 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[12].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[12]: PCSRCID
3043 482.628 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.025 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[55].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[55]: PCSRCID
3044 482.628 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.025 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[56].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[56]: PCSRCID
3045 482.628 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.025 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[54].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[54]: PCSRCID
3046 482.638 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.014 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[59].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[59]: PCSRCID
3047 482.638 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.014 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[57].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[57]: PCSRCID
3048 482.638 clk:r clk:r - FB1_uB x1: x1 (trace:5.146) + (trace:5.039) = 10.185 5.014 71.568 500.737 FB1.uC.dut_inst.exmem1.aluout_out[58].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE ALUOUTMEM[58]: PCSRCID
3049 482.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.555 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[1]: ADDOUTID[60]
3050 482.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.555 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[0]: ADDOUTID[60]
3051 482.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.555 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[1]: ADDOUTID[59]
3052 482.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.555 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[0]: ADDOUTID[59]
3053 482.850 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[3]: ADDOUTID[60]
3054 482.850 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[2]: ADDOUTID[60]
3055 482.850 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[5]: ADDOUTID[60]
3056 482.851 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[5]: ADDOUTID[59]
3057 482.851 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[2]: ADDOUTID[59]
3058 482.851 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.542 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[3]: ADDOUTID[59]
3059 482.887 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.505 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[1]: ADDOUTID[46]
3060 482.887 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.505 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[0]: ADDOUTID[46]
3061 482.900 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.492 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[3]: ADDOUTID[46]
3062 482.900 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.492 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[5]: ADDOUTID[46]
3063 482.900 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.492 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[2]: ADDOUTID[46]
3064 482.908 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.485 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[1]: ADDOUTID[45]
3065 482.908 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.485 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[0]: ADDOUTID[45]
3066 482.921 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.471 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[3]: ADDOUTID[45]
3067 482.921 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.471 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[5]: ADDOUTID[45]
3068 482.921 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.471 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[2]: ADDOUTID[45]
3069 482.921 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.578 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[1]: ADDOUTID[62]
3070 482.921 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.578 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[0]: ADDOUTID[62]
3071 482.925 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.575 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[1]: ADDOUTID[63]
3072 482.925 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.575 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[0]: ADDOUTID[63]
3073 482.934 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.565 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[5]: ADDOUTID[62]
3074 482.934 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.565 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[2]: ADDOUTID[62]
3075 482.934 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.565 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[3]: ADDOUTID[62]
3076 482.938 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.561 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[5]: ADDOUTID[63]
3077 482.938 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.561 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[3]: ADDOUTID[63]
3078 482.938 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.561 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[2]: ADDOUTID[63]
3079 482.941 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.558 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[0]: ADDOUTID[61]
3080 482.941 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.558 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[1]: ADDOUTID[61]
3081 482.946 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.553 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[0]: ADDOUTID[58]
3082 482.946 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.553 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[1]: ADDOUTID[58]
3083 482.955 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.545 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[2]: ADDOUTID[61]
3084 482.955 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.545 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[3]: ADDOUTID[61]
3085 482.955 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.545 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[5]: ADDOUTID[61]
3086 482.957 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.542 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[1]: ADDOUTID[56]
3087 482.957 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.542 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[0]: ADDOUTID[56]
3088 482.958 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.542 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[0]: ADDOUTID[54]
3089 482.958 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.542 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[1]: ADDOUTID[54]
3090 482.959 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.540 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[3]: ADDOUTID[58]
3091 482.959 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.540 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[2]: ADDOUTID[58]
3092 482.959 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.540 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[5]: ADDOUTID[58]
3093 482.960 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.432 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[0]: ADDOUTID[32]
3094 482.960 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.432 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[1]: ADDOUTID[32]
3095 482.961 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.539 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[1]: ADDOUTID[57]
3096 482.961 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.539 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[0]: ADDOUTID[57]
3097 482.961 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.538 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[0]: ADDOUTID[55]
3098 482.961 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.538 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[1]: ADDOUTID[55]
3099 482.964 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.428 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[1]: ADDOUTID[31]
3100 482.964 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.428 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[0]: ADDOUTID[31]
3101 482.970 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.529 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[2]: ADDOUTID[56]
3102 482.970 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.529 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[3]: ADDOUTID[56]
3103 482.970 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.529 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[5]: ADDOUTID[56]
3104 482.971 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.528 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[2]: ADDOUTID[54]
3105 482.971 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.528 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[3]: ADDOUTID[54]
3106 482.971 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.528 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[5]: ADDOUTID[54]
3107 482.973 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.419 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[5]: ADDOUTID[32]
3108 482.973 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.419 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[3]: ADDOUTID[32]
3109 482.973 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.419 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[2]: ADDOUTID[32]
3110 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[3]: ADDOUTID[57]
3111 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[2]: ADDOUTID[57]
3112 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[5]: ADDOUTID[57]
3113 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[2]: ADDOUTID[55]
3114 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[5]: ADDOUTID[55]
3115 482.974 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.525 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[3]: ADDOUTID[55]
3116 482.977 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.415 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[5]: ADDOUTID[31]
3117 482.977 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.415 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[2]: ADDOUTID[31]
3118 482.977 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.415 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[3]: ADDOUTID[31]
3119 482.978 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.414 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[6]: ADDOUTID[60]
3120 482.978 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.521 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[0]: ADDOUTID[53]
3121 482.978 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.521 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[1]: ADDOUTID[53]
3122 482.978 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.414 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[6]: ADDOUTID[59]
3123 482.980 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.519 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[0]: ADDOUTID[52]
3124 482.980 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.519 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[1]: ADDOUTID[52]
3125 482.981 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.518 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[1]: ADDOUTID[51]
3126 482.981 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.518 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[0]: ADDOUTID[51]
3127 482.983 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.516 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[1]: ADDOUTID[50]
3128 482.983 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.516 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[0]: ADDOUTID[50]
3129 482.991 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.508 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[2]: ADDOUTID[53]
3130 482.991 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.508 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[3]: ADDOUTID[53]
3131 482.991 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.508 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[5]: ADDOUTID[53]
3132 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.506 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[1]: ADDOUTID[48]
3133 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.506 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[0]: ADDOUTID[48]
3134 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.506 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[2]: ADDOUTID[52]
3135 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.506 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[5]: ADDOUTID[52]
3136 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.506 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[3]: ADDOUTID[52]
3137 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.505 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[3]: ADDOUTID[51]
3138 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.505 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[5]: ADDOUTID[51]
3139 482.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.505 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[2]: ADDOUTID[51]
3140 482.996 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.503 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[3]: ADDOUTID[50]
3141 482.996 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.503 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[2]: ADDOUTID[50]
3142 482.996 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.503 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[5]: ADDOUTID[50]
3143 482.997 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.502 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[1]: ADDOUTID[49]
3144 482.997 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.502 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[0]: ADDOUTID[49]
3145 482.998 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.501 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[1]: ADDOUTID[47]
3146 482.998 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.501 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[0]: ADDOUTID[47]
3147 483.007 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.492 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[2]: ADDOUTID[48]
3148 483.007 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.492 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[3]: ADDOUTID[48]
3149 483.007 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.492 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[5]: ADDOUTID[48]
3150 483.010 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.489 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[5]: ADDOUTID[49]
3151 483.010 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.489 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[2]: ADDOUTID[49]
3152 483.010 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.489 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[3]: ADDOUTID[49]
3153 483.011 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.488 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[5]: ADDOUTID[47]
3154 483.011 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.488 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[3]: ADDOUTID[47]
3155 483.011 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.488 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[2]: ADDOUTID[47]
3156 483.017 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.482 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[1]: ADDOUTID[44]
3157 483.017 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.482 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[0]: ADDOUTID[44]
3158 483.018 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.482 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[1]: ADDOUTID[43]
3159 483.018 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.482 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[0]: ADDOUTID[43]
3160 483.019 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.480 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[0]: ADDOUTID[42]
3161 483.019 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.480 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[1]: ADDOUTID[42]
3162 483.028 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.364 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[6]: ADDOUTID[46]
3163 483.030 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.469 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[0]: ADDOUTID[40]
3164 483.030 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.469 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[1]: ADDOUTID[40]
3165 483.030 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.469 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[2]: ADDOUTID[44]
3166 483.030 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.469 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[5]: ADDOUTID[44]
3167 483.030 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.469 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[3]: ADDOUTID[44]
3168 483.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.468 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[1]: ADDOUTID[38]
3169 483.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.468 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[0]: ADDOUTID[38]
3170 483.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.468 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[3]: ADDOUTID[43]
3171 483.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.468 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[5]: ADDOUTID[43]
3172 483.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.468 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[2]: ADDOUTID[43]
3173 483.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.466 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[5]: ADDOUTID[42]
3174 483.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.466 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[2]: ADDOUTID[42]
3175 483.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.466 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[3]: ADDOUTID[42]
3176 483.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.465 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[1]: ADDOUTID[41]
3177 483.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.465 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[0]: ADDOUTID[41]
3178 483.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.465 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[0]: ADDOUTID[39]
3179 483.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.465 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[1]: ADDOUTID[39]
3180 483.043 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.456 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[3]: ADDOUTID[40]
3181 483.043 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.456 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[5]: ADDOUTID[40]
3182 483.043 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.456 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[2]: ADDOUTID[40]
3183 483.044 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.455 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[5]: ADDOUTID[38]
3184 483.044 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.455 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[2]: ADDOUTID[38]
3185 483.044 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.455 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[3]: ADDOUTID[38]
3186 483.047 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[2]: ADDOUTID[41]
3187 483.047 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[3]: ADDOUTID[41]
3188 483.047 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[5]: ADDOUTID[41]
3189 483.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[3]: ADDOUTID[39]
3190 483.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[5]: ADDOUTID[39]
3191 483.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.452 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[2]: ADDOUTID[39]
3192 483.049 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.344 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[6]: ADDOUTID[45]
3193 483.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.448 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[0]: ADDOUTID[37]
3194 483.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.448 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[1]: ADDOUTID[37]
3195 483.054 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.446 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[0]: ADDOUTID[36]
3196 483.054 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.446 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[1]: ADDOUTID[36]
3197 483.054 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.445 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[1]: ADDOUTID[35]
3198 483.054 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.445 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[0]: ADDOUTID[35]
3199 483.056 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.443 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[0]: ADDOUTID[34]
3200 483.056 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.443 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[1]: ADDOUTID[34]
3201 483.062 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.437 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[6]: ADDOUTID[62]
3202 483.062 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.330 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[4]: ADDOUTID[60]
3203 483.063 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.329 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[4]: ADDOUTID[59]
3204 483.064 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.435 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[2]: ADDOUTID[37]
3205 483.064 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.435 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[3]: ADDOUTID[37]
3206 483.064 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.435 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[5]: ADDOUTID[37]
3207 483.066 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.434 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[6]: ADDOUTID[63]
3208 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[2]: ADDOUTID[36]
3209 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[5]: ADDOUTID[36]
3210 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[3]: ADDOUTID[36]
3211 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[1]: ADDOUTID[30]
3212 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[0]: ADDOUTID[30]
3213 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[2]: ADDOUTID[35]
3214 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[3]: ADDOUTID[35]
3215 483.067 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.432 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[5]: ADDOUTID[35]
3216 483.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.430 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[2]: ADDOUTID[34]
3217 483.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.430 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[3]: ADDOUTID[34]
3218 483.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.430 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[5]: ADDOUTID[34]
3219 483.070 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.429 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[1]: ADDOUTID[33]
3220 483.070 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.429 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[0]: ADDOUTID[33]
3221 483.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.319 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[1]: ADDOUTID[9]
3222 483.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.319 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[0]: ADDOUTID[9]
3223 483.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.418 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[5]: ADDOUTID[30]
3224 483.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.418 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[2]: ADDOUTID[30]
3225 483.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.418 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[3]: ADDOUTID[30]
3226 483.082 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.417 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[6]: ADDOUTID[61]
3227 483.084 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.416 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[3]: ADDOUTID[33]
3228 483.084 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.416 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[5]: ADDOUTID[33]
3229 483.084 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.416 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[2]: ADDOUTID[33]
3230 483.086 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.306 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[3]: ADDOUTID[9]
3231 483.086 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.306 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[5]: ADDOUTID[9]
3232 483.086 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.306 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[2]: ADDOUTID[9]
3233 483.087 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.412 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[6]: ADDOUTID[58]
3234 483.088 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.411 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[0]: ADDOUTID[29]
3235 483.088 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.411 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[1]: ADDOUTID[29]
3236 483.090 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.409 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[0]: ADDOUTID[28]
3237 483.090 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.409 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[1]: ADDOUTID[28]
3238 483.091 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.408 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[0]: ADDOUTID[27]
3239 483.091 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.408 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[1]: ADDOUTID[27]
3240 483.093 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.407 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[1]: ADDOUTID[26]
3241 483.093 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.407 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[0]: ADDOUTID[26]
3242 483.098 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.401 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[6]: ADDOUTID[56]
3243 483.099 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.401 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[6]: ADDOUTID[54]
3244 483.101 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.291 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[6]: ADDOUTID[32]
3245 483.101 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.398 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[5]: ADDOUTID[29]
3246 483.101 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.398 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[2]: ADDOUTID[29]
3247 483.101 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.398 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[3]: ADDOUTID[29]
3248 483.102 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.398 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[6]: ADDOUTID[57]
3249 483.102 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.397 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[6]: ADDOUTID[55]
3250 483.103 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.396 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[1]: ADDOUTID[24]
3251 483.103 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.396 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[0]: ADDOUTID[24]
3252 483.103 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.396 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[3]: ADDOUTID[28]
3253 483.103 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.396 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[5]: ADDOUTID[28]
3254 483.103 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.396 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[2]: ADDOUTID[28]
3255 483.104 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.395 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[3]: ADDOUTID[27]
3256 483.104 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.395 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[5]: ADDOUTID[27]
3257 483.104 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.395 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[2]: ADDOUTID[27]
3258 483.105 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.287 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[6]: ADDOUTID[31]
3259 483.106 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.393 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[2]: ADDOUTID[26]
3260 483.106 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.393 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[3]: ADDOUTID[26]
3261 483.106 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.393 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[5]: ADDOUTID[26]
3262 483.107 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.392 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[0]: ADDOUTID[25]
3263 483.107 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.392 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[1]: ADDOUTID[25]
3264 483.113 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.279 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[4]: ADDOUTID[46]
3265 483.117 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.383 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[5]: ADDOUTID[24]
3266 483.117 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.383 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[3]: ADDOUTID[24]
3267 483.117 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.383 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[2]: ADDOUTID[24]
3268 483.119 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.380 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[6]: ADDOUTID[53]
3269 483.120 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.379 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[5]: ADDOUTID[25]
3270 483.120 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.379 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[2]: ADDOUTID[25]
3271 483.120 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.379 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[3]: ADDOUTID[25]
3272 483.121 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.378 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[6]: ADDOUTID[52]
3273 483.122 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.377 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[6]: ADDOUTID[51]
3274 483.124 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.375 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[6]: ADDOUTID[50]
3275 483.133 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.259 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[4]: ADDOUTID[45]
3276 483.135 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.365 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[6]: ADDOUTID[48]
3277 483.138 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.361 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[6]: ADDOUTID[49]
3278 483.139 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.360 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[6]: ADDOUTID[47]
3279 483.147 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.353 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[4]: ADDOUTID[62]
3280 483.148 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.312 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[6]: PCSRCID
3281 483.150 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.349 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[4]: ADDOUTID[63]
3282 483.158 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.341 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[6]: ADDOUTID[44]
3283 483.159 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.341 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[6]: ADDOUTID[43]
3284 483.160 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.339 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[6]: ADDOUTID[42]
3285 483.167 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.332 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[4]: ADDOUTID[61]
3286 483.171 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.328 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[6]: ADDOUTID[40]
3287 483.171 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.289 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[5]: PCSRCID
3288 483.172 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.327 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[6]: ADDOUTID[38]
3289 483.172 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.327 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[4]: ADDOUTID[58]
3290 483.175 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.324 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[6]: ADDOUTID[41]
3291 483.175 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.324 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[6]: ADDOUTID[39]
3292 483.183 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.317 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[4]: ADDOUTID[56]
3293 483.183 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.316 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[4]: ADDOUTID[54]
3294 483.185 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.207 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[4]: ADDOUTID[32]
3295 483.186 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.313 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[4]: ADDOUTID[57]
3296 483.186 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.274 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[4]: PCSRCID
3297 483.187 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.312 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[4]: ADDOUTID[55]
3298 483.190 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.203 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[4]: ADDOUTID[31]
3299 483.190 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.270 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[1]: PCSRCID
3300 483.190 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.270 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[0]: PCSRCID
3301 483.192 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.307 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[6]: ADDOUTID[37]
3302 483.195 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.305 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[6]: ADDOUTID[36]
3303 483.195 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.304 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[6]: ADDOUTID[35]
3304 483.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.302 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[6]: ADDOUTID[34]
3305 483.204 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.296 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[4]: ADDOUTID[53]
3306 483.206 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.293 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[4]: ADDOUTID[52]
3307 483.207 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.293 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[4]: ADDOUTID[51]
3308 483.208 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.291 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[4]: ADDOUTID[50]
3309 483.208 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.291 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[6]: ADDOUTID[30]
3310 483.211 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.288 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[6]: ADDOUTID[33]
3311 483.214 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.178 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[6]: ADDOUTID[9]
3312 483.219 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.280 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[4]: ADDOUTID[48]
3313 483.221 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.171 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[0]: ADDOUTID[2]
3314 483.221 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.171 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[1]: ADDOUTID[2]
3315 483.222 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.238 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[2]: PCSRCID
3316 483.222 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.238 71.568 500.737 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[3]: PCSRCID
3317 483.223 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.276 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[4]: ADDOUTID[49]
3318 483.223 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.276 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[4]: ADDOUTID[47]
3319 483.229 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.270 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[6]: ADDOUTID[29]
3320 483.231 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.268 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[6]: ADDOUTID[28]
3321 483.232 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.267 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[6]: ADDOUTID[27]
3322 483.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.266 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[6]: ADDOUTID[26]
3323 483.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.158 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[5]: ADDOUTID[2]
3324 483.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.158 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[3]: ADDOUTID[2]
3325 483.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.158 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[2]: ADDOUTID[2]
3326 483.243 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.257 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[4]: ADDOUTID[44]
3327 483.243 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.256 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[4]: ADDOUTID[43]
3328 483.244 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.255 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[6]: ADDOUTID[24]
3329 483.245 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.254 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[4]: ADDOUTID[42]
3330 483.248 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.251 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[6]: ADDOUTID[25]
3331 483.256 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.243 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[4]: ADDOUTID[40]
3332 483.256 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.243 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[4]: ADDOUTID[38]
3333 483.259 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.240 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[4]: ADDOUTID[41]
3334 483.260 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.239 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[4]: ADDOUTID[39]
3335 483.277 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.222 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[4]: ADDOUTID[37]
3336 483.279 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.220 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[4]: ADDOUTID[36]
3337 483.280 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.219 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[4]: ADDOUTID[35]
3338 483.282 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.218 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[4]: ADDOUTID[34]
3339 483.293 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.206 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[4]: ADDOUTID[30]
3340 483.296 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.203 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[4]: ADDOUTID[33]
3341 483.299 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.093 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[4]: ADDOUTID[9]
3342 483.313 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.186 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[4]: ADDOUTID[29]
3343 483.316 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.183 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[4]: ADDOUTID[28]
3344 483.316 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.183 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[4]: ADDOUTID[27]
3345 483.318 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.181 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[4]: ADDOUTID[26]
3346 483.329 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.170 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[4]: ADDOUTID[24]
3347 483.333 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 4.167 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[4]: ADDOUTID[25]
3348 483.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.419 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[23]: stall
3349 483.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.419 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[22]: stall
3350 483.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.419 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[17].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[17]: stall
3351 483.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.419 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[18].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[18]: stall
3352 483.338 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.054 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[6]: ADDOUTID[2]
3353 483.416 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 5.275 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[8]: ADDOUTID[60]
3354 483.416 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.976 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[8]: ADDOUTID[59]
3355 483.430 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.359 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[1]: ADDOUTID[14]
3356 483.430 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.359 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[0]: ADDOUTID[14]
3357 483.433 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.355 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[0]: ADDOUTID[15]
3358 483.433 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.355 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[1]: ADDOUTID[15]
3359 483.435 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 5.256 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[10]: ADDOUTID[60]
3360 483.435 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 5.256 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[9]: ADDOUTID[60]
3361 483.436 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.957 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[9]: ADDOUTID[59]
3362 483.436 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.957 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[10]: ADDOUTID[59]
3363 483.436 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 5.255 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[11]: ADDOUTID[60]
3364 483.437 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.955 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[11]: ADDOUTID[59]
3365 483.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.345 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[3]: ADDOUTID[14]
3366 483.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.345 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[5]: ADDOUTID[14]
3367 483.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.345 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[2]: ADDOUTID[14]
3368 483.446 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.946 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[4]: ADDOUTID[2]
3369 483.446 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.342 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[5]: ADDOUTID[15]
3370 483.446 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.342 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[2]: ADDOUTID[15]
3371 483.446 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.342 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[3]: ADDOUTID[15]
3372 483.450 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.338 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[0]: ADDOUTID[13]
3373 483.450 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.338 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[1]: ADDOUTID[13]
3374 483.452 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.336 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[1]: ADDOUTID[12]
3375 483.452 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.336 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[0]: ADDOUTID[12]
3376 483.453 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.335 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[1]: ADDOUTID[11]
3377 483.453 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.335 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[0]: ADDOUTID[11]
3378 483.455 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.333 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[1]: ADDOUTID[10]
3379 483.455 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.333 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[0]: ADDOUTID[10]
3380 483.457 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.935 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[21]: ADDOUTID[60]
3381 483.458 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.935 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[21]: ADDOUTID[59]
3382 483.460 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.295 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[20]: stall
3383 483.460 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.294 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[21]: stall
3384 483.460 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.294 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[15].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[15]: stall
3385 483.460 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.294 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[16].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[16]: stall
3386 483.463 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.325 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[2]: ADDOUTID[13]
3387 483.463 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.325 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[3]: ADDOUTID[13]
3388 483.463 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.325 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[5]: ADDOUTID[13]
3389 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[2]: ADDOUTID[12]
3390 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[5]: ADDOUTID[12]
3391 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[3]: ADDOUTID[12]
3392 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[3]: ADDOUTID[11]
3393 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[5]: ADDOUTID[11]
3394 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.322 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[2]: ADDOUTID[11]
3395 483.466 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.926 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[8]: ADDOUTID[46]
3396 483.468 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.320 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[3]: ADDOUTID[10]
3397 483.468 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.320 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[2]: ADDOUTID[10]
3398 483.468 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.320 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[5]: ADDOUTID[10]
3399 483.472 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.920 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[24]: ADDOUTID[60]
3400 483.472 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.920 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[24]: ADDOUTID[59]
3401 483.476 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.916 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[22]: ADDOUTID[60]
3402 483.476 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.916 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[23]: ADDOUTID[60]
3403 483.477 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.915 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[22]: ADDOUTID[59]
3404 483.477 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.915 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[23]: ADDOUTID[59]
3405 483.485 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.907 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[10]: ADDOUTID[46]
3406 483.485 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.907 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[9]: ADDOUTID[46]
3407 483.487 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.905 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[11]: ADDOUTID[46]
3408 483.487 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.905 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[8]: ADDOUTID[45]
3409 483.498 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.290 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[0]: ADDOUTID[8]
3410 483.498 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.290 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[1]: ADDOUTID[8]
3411 483.499 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.290 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[0]: ADDOUTID[6]
3412 483.499 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.290 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[1]: ADDOUTID[6]
3413 483.500 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.999 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[8]: ADDOUTID[62]
3414 483.502 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.286 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[1]: ADDOUTID[7]
3415 483.502 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.286 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[0]: ADDOUTID[7]
3416 483.504 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.996 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[8]: ADDOUTID[63]
3417 483.506 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.886 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[10]: ADDOUTID[45]
3418 483.506 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.886 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[9]: ADDOUTID[45]
3419 483.507 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.885 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[11]: ADDOUTID[45]
3420 483.507 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.885 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[21]: ADDOUTID[46]
3421 483.511 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.277 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[5]: ADDOUTID[8]
3422 483.511 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.277 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[2]: ADDOUTID[8]
3423 483.511 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.277 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[3]: ADDOUTID[8]
3424 483.512 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.276 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[3]: ADDOUTID[6]
3425 483.512 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.276 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[2]: ADDOUTID[6]
3426 483.512 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.276 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[5]: ADDOUTID[6]
3427 483.515 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.273 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[2]: ADDOUTID[7]
3428 483.515 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.273 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[3]: ADDOUTID[7]
3429 483.515 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.273 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[5]: ADDOUTID[7]
3430 483.519 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.980 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[10]: ADDOUTID[62]
3431 483.519 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.980 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[9]: ADDOUTID[62]
3432 483.520 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.268 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[0]: ADDOUTID[5]
3433 483.520 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.268 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[1]: ADDOUTID[5]
3434 483.520 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.979 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[11]: ADDOUTID[62]
3435 483.520 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.979 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[8]: ADDOUTID[61]
3436 483.522 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.870 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[24]: ADDOUTID[46]
3437 483.523 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.976 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[9]: ADDOUTID[63]
3438 483.523 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.976 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[10]: ADDOUTID[63]
3439 483.524 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.975 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[11]: ADDOUTID[63]
3440 483.525 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.974 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[8]: ADDOUTID[58]
3441 483.526 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.866 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[22]: ADDOUTID[46]
3442 483.526 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.866 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[23]: ADDOUTID[46]
3443 483.528 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.864 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[21]: ADDOUTID[45]
3444 483.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.255 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[2]: ADDOUTID[5]
3445 483.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.255 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[3]: ADDOUTID[5]
3446 483.533 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.255 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[5]: ADDOUTID[5]
3447 483.536 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.963 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[8]: ADDOUTID[56]
3448 483.537 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.963 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[8]: ADDOUTID[54]
3449 483.539 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.853 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[8]: ADDOUTID[32]
3450 483.540 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.960 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[9]: ADDOUTID[61]
3451 483.540 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.960 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[8]: ADDOUTID[57]
3452 483.540 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.960 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[10]: ADDOUTID[61]
3453 483.540 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.959 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[8]: ADDOUTID[55]
3454 483.541 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.958 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[11]: ADDOUTID[61]
3455 483.541 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.958 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[21]: ADDOUTID[62]
3456 483.543 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.850 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[24]: ADDOUTID[45]
3457 483.543 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.849 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[8]: ADDOUTID[31]
3458 483.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.955 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[10]: ADDOUTID[58]
3459 483.544 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.955 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[9]: ADDOUTID[58]
3460 483.545 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.954 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[21]: ADDOUTID[63]
3461 483.546 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.954 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[11]: ADDOUTID[58]
3462 483.547 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.845 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[22]: ADDOUTID[45]
3463 483.547 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.845 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[23]: ADDOUTID[45]
3464 483.555 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.944 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[10]: ADDOUTID[56]
3465 483.555 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.944 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[9]: ADDOUTID[56]
3466 483.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.943 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[9]: ADDOUTID[54]
3467 483.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.943 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[10]: ADDOUTID[54]
3468 483.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.943 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[24]: ADDOUTID[62]
3469 483.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.943 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[11]: ADDOUTID[56]
3470 483.557 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.942 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[11]: ADDOUTID[54]
3471 483.557 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.942 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[8]: ADDOUTID[53]
3472 483.558 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.834 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[9]: ADDOUTID[32]
3473 483.558 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.834 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[10]: ADDOUTID[32]
3474 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[9]: ADDOUTID[57]
3475 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[10]: ADDOUTID[57]
3476 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.833 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[11]: ADDOUTID[32]
3477 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[10]: ADDOUTID[55]
3478 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[8]: ADDOUTID[52]
3479 483.559 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[9]: ADDOUTID[55]
3480 483.560 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.940 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[24]: ADDOUTID[63]
3481 483.560 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.939 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[8]: ADDOUTID[51]
3482 483.560 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.939 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[11]: ADDOUTID[57]
3483 483.560 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.939 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[23]: ADDOUTID[62]
3484 483.560 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.939 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[22]: ADDOUTID[62]
3485 483.561 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.939 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[11]: ADDOUTID[55]
3486 483.562 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.938 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[21]: ADDOUTID[61]
3487 483.562 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.937 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[8]: ADDOUTID[50]
3488 483.562 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.830 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[9]: ADDOUTID[31]
3489 483.562 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.830 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[10]: ADDOUTID[31]
3490 483.563 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.829 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[11]: ADDOUTID[31]
3491 483.564 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.935 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[23]: ADDOUTID[63]
3492 483.564 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.935 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[22]: ADDOUTID[63]
3493 483.566 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.933 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[21]: ADDOUTID[58]
3494 483.571 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.218 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[6]: ADDOUTID[14]
3495 483.572 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.216 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[0]: ADDOUTID[4]
3496 483.572 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.216 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[1]: ADDOUTID[4]
3497 483.573 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.927 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[8]: ADDOUTID[48]
3498 483.574 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.214 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[6]: ADDOUTID[15]
3499 483.576 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.923 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[9]: ADDOUTID[53]
3500 483.576 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.923 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[10]: ADDOUTID[53]
3501 483.576 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.923 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[8]: ADDOUTID[49]
3502 483.576 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.923 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[24]: ADDOUTID[61]
3503 483.577 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.212 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[1]: ADDOUTID[3]
3504 483.577 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.212 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[0]: ADDOUTID[3]
3505 483.577 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.922 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[8]: ADDOUTID[47]
3506 483.577 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.922 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[21]: ADDOUTID[56]
3507 483.577 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.922 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[11]: ADDOUTID[53]
3508 483.578 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.921 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[21]: ADDOUTID[54]
3509 483.579 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.921 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[9]: ADDOUTID[52]
3510 483.579 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.921 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[10]: ADDOUTID[52]
3511 483.579 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.920 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[9]: ADDOUTID[51]
3512 483.579 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.920 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[10]: ADDOUTID[51]
3513 483.580 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.919 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[11]: ADDOUTID[52]
3514 483.580 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.812 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[21]: ADDOUTID[32]
3515 483.580 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.919 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[11]: ADDOUTID[51]
3516 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[23]: ADDOUTID[61]
3517 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[22]: ADDOUTID[61]
3518 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[21]: ADDOUTID[57]
3519 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[9]: ADDOUTID[50]
3520 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[10]: ADDOUTID[50]
3521 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[24]: ADDOUTID[58]
3522 483.581 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.918 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[21]: ADDOUTID[55]
3523 483.582 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.917 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[11]: ADDOUTID[50]
3524 483.584 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.808 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[21]: ADDOUTID[31]
3525 483.586 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.914 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[22]: ADDOUTID[58]
3526 483.586 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.914 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[23]: ADDOUTID[58]
3527 483.586 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.203 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[3]: ADDOUTID[4]
3528 483.586 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.203 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[5]: ADDOUTID[4]
3529 483.586 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.203 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[2]: ADDOUTID[4]
3530 483.590 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.198 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[5]: ADDOUTID[3]
3531 483.590 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.198 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[3]: ADDOUTID[3]
3532 483.590 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.198 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[2]: ADDOUTID[3]
3533 483.591 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.197 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[6]: ADDOUTID[13]
3534 483.592 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.907 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[10]: ADDOUTID[48]
3535 483.592 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.907 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[9]: ADDOUTID[48]
3536 483.592 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.907 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[24]: ADDOUTID[56]
3537 483.593 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.907 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[24]: ADDOUTID[54]
3538 483.593 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.906 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[11]: ADDOUTID[48]
3539 483.593 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.195 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[6]: ADDOUTID[12]
3540 483.594 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.194 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[6]: ADDOUTID[11]
3541 483.595 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.797 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[24]: ADDOUTID[32]
3542 483.595 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.904 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[10]: ADDOUTID[49]
3543 483.595 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.904 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[9]: ADDOUTID[49]
3544 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.904 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[24]: ADDOUTID[57]
3545 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.192 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[6]: ADDOUTID[10]
3546 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[9]: ADDOUTID[47]
3547 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[8]: ADDOUTID[44]
3548 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[10]: ADDOUTID[47]
3549 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[24]: ADDOUTID[55]
3550 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[22]: ADDOUTID[56]
3551 483.596 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[23]: ADDOUTID[56]
3552 483.597 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[11]: ADDOUTID[49]
3553 483.597 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.903 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[8]: ADDOUTID[43]
3554 483.597 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.902 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[23]: ADDOUTID[54]
3555 483.597 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.902 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[22]: ADDOUTID[54]
3556 483.597 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.902 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[11]: ADDOUTID[47]
3557 483.598 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.901 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[21]: ADDOUTID[53]
3558 483.598 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.901 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[8]: ADDOUTID[42]
3559 483.599 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.793 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[24]: ADDOUTID[31]
3560 483.599 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.793 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[23]: ADDOUTID[32]
3561 483.599 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.793 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[22]: ADDOUTID[32]
3562 483.600 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.899 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[22]: ADDOUTID[57]
3563 483.600 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.899 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[23]: ADDOUTID[57]
3564 483.601 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.899 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[22]: ADDOUTID[55]
3565 483.601 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.899 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[21]: ADDOUTID[52]
3566 483.601 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.899 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[23]: ADDOUTID[55]
3567 483.601 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.898 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[21]: ADDOUTID[51]
3568 483.602 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.153 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[24]: stall
3569 483.602 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.153 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[19].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[19]: stall
3570 483.603 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.896 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[21]: ADDOUTID[50]
3571 483.603 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.789 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[23]: ADDOUTID[31]
3572 483.603 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.789 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[22]: ADDOUTID[31]
3573 483.609 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.890 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[8]: ADDOUTID[40]
3574 483.610 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.889 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[8]: ADDOUTID[38]
3575 483.613 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.886 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[8]: ADDOUTID[41]
3576 483.613 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.886 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[24]: ADDOUTID[53]
3577 483.613 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.886 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[8]: ADDOUTID[39]
3578 483.614 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.885 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[21]: ADDOUTID[48]
3579 483.615 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.884 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[9]: ADDOUTID[44]
3580 483.615 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.884 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[10]: ADDOUTID[44]
3581 483.615 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.884 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[24]: ADDOUTID[52]
3582 483.616 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.883 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[9]: ADDOUTID[43]
3583 483.616 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.883 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[10]: ADDOUTID[43]
3584 483.616 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.883 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[24]: ADDOUTID[51]
3585 483.616 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.883 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[11]: ADDOUTID[44]
3586 483.617 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[11]: ADDOUTID[43]
3587 483.617 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[23]: ADDOUTID[53]
3588 483.617 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[22]: ADDOUTID[53]
3589 483.617 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[21]: ADDOUTID[49]
3590 483.618 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[9]: ADDOUTID[42]
3591 483.618 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.882 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[10]: ADDOUTID[42]
3592 483.618 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.881 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[24]: ADDOUTID[50]
3593 483.618 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.881 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[21]: ADDOUTID[47]
3594 483.619 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.880 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[11]: ADDOUTID[42]
3595 483.620 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[22]: ADDOUTID[52]
3596 483.620 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[23]: ADDOUTID[52]
3597 483.620 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[22]: ADDOUTID[51]
3598 483.620 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.879 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[23]: ADDOUTID[51]
3599 483.622 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.877 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[23]: ADDOUTID[50]
3600 483.622 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.877 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[22]: ADDOUTID[50]
3601 483.628 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.871 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[10]: ADDOUTID[40]
3602 483.628 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.871 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[9]: ADDOUTID[40]
3603 483.629 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.871 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[24]: ADDOUTID[48]
3604 483.629 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.870 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[10]: ADDOUTID[38]
3605 483.629 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.870 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[9]: ADDOUTID[38]
3606 483.630 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.870 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[11]: ADDOUTID[40]
3607 483.630 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.869 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[8]: ADDOUTID[37]
3608 483.630 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.869 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[11]: ADDOUTID[38]
3609 483.632 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[10]: ADDOUTID[41]
3610 483.632 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[9]: ADDOUTID[41]
3611 483.632 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[24]: ADDOUTID[49]
3612 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[9]: ADDOUTID[39]
3613 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[8]: ADDOUTID[36]
3614 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.867 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[10]: ADDOUTID[39]
3615 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.866 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[24]: ADDOUTID[47]
3616 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.866 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[23]: ADDOUTID[48]
3617 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.866 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[22]: ADDOUTID[48]
3618 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.866 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[8]: ADDOUTID[35]
3619 483.633 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.866 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[11]: ADDOUTID[41]
3620 483.634 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.865 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[11]: ADDOUTID[39]
3621 483.635 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.864 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[8]: ADDOUTID[34]
3622 483.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[23]: ADDOUTID[49]
3623 483.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.863 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[22]: ADDOUTID[49]
3624 483.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.862 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[21]: ADDOUTID[44]
3625 483.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.862 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[22]: ADDOUTID[47]
3626 483.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.862 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[23]: ADDOUTID[47]
3627 483.638 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.861 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[21]: ADDOUTID[43]
3628 483.639 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.149 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[6]: ADDOUTID[8]
3629 483.639 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.860 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[21]: ADDOUTID[42]
3630 483.639 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.149 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[6]: ADDOUTID[6]
3631 483.640 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 5.051 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[7]: ADDOUTID[60]
3632 483.641 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.751 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[7]: ADDOUTID[59]
3633 483.644 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.144 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[6]: ADDOUTID[7]
3634 483.646 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.853 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[8]: ADDOUTID[30]
3635 483.649 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.850 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[9]: ADDOUTID[37]
3636 483.649 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.850 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[8]: ADDOUTID[33]
3637 483.649 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.850 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[10]: ADDOUTID[37]
3638 483.650 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.849 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[21]: ADDOUTID[40]
3639 483.651 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.849 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[11]: ADDOUTID[37]
3640 483.651 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.848 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[21]: ADDOUTID[38]
3641 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[10]: ADDOUTID[36]
3642 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[9]: ADDOUTID[36]
3643 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[24]: ADDOUTID[44]
3644 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.740 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[8]: ADDOUTID[9]
3645 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[10]: ADDOUTID[35]
3646 483.652 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[9]: ADDOUTID[35]
3647 483.653 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.847 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[24]: ADDOUTID[43]
3648 483.653 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.846 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[11]: ADDOUTID[36]
3649 483.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.846 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[11]: ADDOUTID[35]
3650 483.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.845 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[21]: ADDOUTID[41]
3651 483.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.845 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[9]: ADDOUTID[34]
3652 483.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.845 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[10]: ADDOUTID[34]
3653 483.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.845 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[24]: ADDOUTID[42]
3654 483.655 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.845 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[21]: ADDOUTID[39]
3655 483.655 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.133 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[4]: ADDOUTID[14]
3656 483.655 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.844 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[11]: ADDOUTID[34]
3657 483.656 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.843 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[23]: ADDOUTID[44]
3658 483.656 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.843 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[22]: ADDOUTID[44]
3659 483.657 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.842 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[22]: ADDOUTID[43]
3660 483.657 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.842 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[23]: ADDOUTID[43]
3661 483.659 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.129 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[4]: ADDOUTID[15]
3662 483.659 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.840 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[22]: ADDOUTID[42]
3663 483.659 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.840 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[23]: ADDOUTID[42]
3664 483.661 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.127 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[6]: ADDOUTID[5]
3665 483.665 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.834 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[24]: ADDOUTID[40]
3666 483.666 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.834 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[9]: ADDOUTID[30]
3667 483.666 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.834 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[10]: ADDOUTID[30]
3668 483.666 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.833 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[24]: ADDOUTID[38]
3669 483.667 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.832 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[8]: ADDOUTID[29]
3670 483.667 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.832 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[11]: ADDOUTID[30]
3671 483.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.831 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[10]: ADDOUTID[33]
3672 483.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.831 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[9]: ADDOUTID[33]
3673 483.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.830 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[24]: ADDOUTID[41]
3674 483.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.830 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[8]: ADDOUTID[28]
3675 483.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.830 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[24]: ADDOUTID[39]
3676 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[23]: ADDOUTID[40]
3677 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.830 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[22]: ADDOUTID[40]
3678 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.829 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[8]: ADDOUTID[27]
3679 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.829 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[11]: ADDOUTID[33]
3680 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.829 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[22]: ADDOUTID[38]
3681 483.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.829 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[23]: ADDOUTID[38]
3682 483.671 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.828 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[21]: ADDOUTID[37]
3683 483.671 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.721 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[10]: ADDOUTID[9]
3684 483.671 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.721 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[9]: ADDOUTID[9]
3685 483.672 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.828 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[8]: ADDOUTID[26]
3686 483.673 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.720 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[11]: ADDOUTID[9]
3687 483.673 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.826 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[22]: ADDOUTID[41]
3688 483.673 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.826 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[23]: ADDOUTID[41]
3689 483.674 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.825 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[23]: ADDOUTID[39]
3690 483.674 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.825 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[22]: ADDOUTID[39]
3691 483.674 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.825 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[21]: ADDOUTID[36]
3692 483.674 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.825 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[21]: ADDOUTID[35]
3693 483.675 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.113 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[4]: ADDOUTID[13]
3694 483.676 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.823 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[21]: ADDOUTID[34]
3695 483.678 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.110 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[4]: ADDOUTID[12]
3696 483.679 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.110 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[4]: ADDOUTID[11]
3697 483.680 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.108 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[4]: ADDOUTID[10]
3698 483.682 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.817 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[8]: ADDOUTID[24]
3699 483.686 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.813 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[10]: ADDOUTID[29]
3700 483.686 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.813 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[9]: ADDOUTID[29]
3701 483.686 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.813 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[8]: ADDOUTID[25]
3702 483.686 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.813 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[24]: ADDOUTID[37]
3703 483.687 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.812 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[11]: ADDOUTID[29]
3704 483.688 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.812 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[21]: ADDOUTID[30]
3705 483.688 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.811 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[10]: ADDOUTID[28]
3706 483.688 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.811 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[9]: ADDOUTID[28]
3707 483.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.811 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[24]: ADDOUTID[36]
3708 483.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.810 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[10]: ADDOUTID[27]
3709 483.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.810 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[9]: ADDOUTID[27]
3710 483.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.810 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[24]: ADDOUTID[35]
3711 483.690 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.810 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[11]: ADDOUTID[28]
3712 483.690 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.809 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[11]: ADDOUTID[27]
3713 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.809 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[22]: ADDOUTID[37]
3714 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.809 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[21]: ADDOUTID[33]
3715 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.809 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[23]: ADDOUTID[37]
3716 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.702 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[7]: ADDOUTID[46]
3717 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.808 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[10]: ADDOUTID[26]
3718 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.808 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[9]: ADDOUTID[26]
3719 483.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.808 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[24]: ADDOUTID[34]
3720 483.692 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.807 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[11]: ADDOUTID[26]
3721 483.693 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.806 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[23]: ADDOUTID[36]
3722 483.693 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.806 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[22]: ADDOUTID[36]
3723 483.693 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.699 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[21]: ADDOUTID[9]
3724 483.693 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.998 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[25]: ADDOUTID[60]
3725 483.694 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.806 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[23]: ADDOUTID[35]
3726 483.694 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.806 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[22]: ADDOUTID[35]
3727 483.694 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.698 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[25]: ADDOUTID[59]
3728 483.695 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.804 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[23]: ADDOUTID[34]
3729 483.695 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.804 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[22]: ADDOUTID[34]
3730 483.702 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.798 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[10]: ADDOUTID[24]
3731 483.702 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.798 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[9]: ADDOUTID[24]
3732 483.702 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.797 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[24]: ADDOUTID[30]
3733 483.703 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.796 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[11]: ADDOUTID[24]
3734 483.705 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.083 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[6]: ADDOUTID[4]
3735 483.705 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.794 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[9]: ADDOUTID[25]
3736 483.705 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.794 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[10]: ADDOUTID[25]
3737 483.705 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.794 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[24]: ADDOUTID[33]
3738 483.706 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.793 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[11]: ADDOUTID[25]
3739 483.707 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.792 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[23]: ADDOUTID[30]
3740 483.707 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.792 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[22]: ADDOUTID[30]
3741 483.708 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.791 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[21]: ADDOUTID[29]
3742 483.708 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.684 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[24]: ADDOUTID[9]
3743 483.709 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.079 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[6]: ADDOUTID[3]
3744 483.710 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.789 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[23]: ADDOUTID[33]
3745 483.710 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.789 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[22]: ADDOUTID[33]
3746 483.710 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.789 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[21]: ADDOUTID[28]
3747 483.711 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.788 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[21]: ADDOUTID[27]
3748 483.711 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.681 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[7]: ADDOUTID[45]
3749 483.713 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.680 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[22]: ADDOUTID[9]
3750 483.713 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.680 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[23]: ADDOUTID[9]
3751 483.713 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.786 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[21]: ADDOUTID[26]
3752 483.723 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.776 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[24]: ADDOUTID[29]
3753 483.724 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.065 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[4]: ADDOUTID[8]
3754 483.724 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.776 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[21]: ADDOUTID[24]
3755 483.724 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.064 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[4]: ADDOUTID[6]
3756 483.724 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.775 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[7]: ADDOUTID[62]
3757 483.725 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.774 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[24]: ADDOUTID[28]
3758 483.726 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.773 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[24]: ADDOUTID[27]
3759 483.727 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.772 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[23]: ADDOUTID[29]
3760 483.727 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.772 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[21]: ADDOUTID[25]
3761 483.727 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.772 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[22]: ADDOUTID[29]
3762 483.728 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.772 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[24]: ADDOUTID[26]
3763 483.728 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.060 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[4]: ADDOUTID[7]
3764 483.728 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.771 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[7]: ADDOUTID[63]
3765 483.730 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.770 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[22]: ADDOUTID[28]
3766 483.730 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.770 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[23]: ADDOUTID[28]
3767 483.730 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.769 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[22]: ADDOUTID[27]
3768 483.730 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.769 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[23]: ADDOUTID[27]
3769 483.732 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.767 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[22]: ADDOUTID[26]
3770 483.732 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.767 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[23]: ADDOUTID[26]
3771 483.738 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.761 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[24]: ADDOUTID[24]
3772 483.742 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.757 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[24]: ADDOUTID[25]
3773 483.743 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.756 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[23]: ADDOUTID[24]
3774 483.743 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.756 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[22]: ADDOUTID[24]
3775 483.744 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.648 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[25]: ADDOUTID[46]
3776 483.745 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.754 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[7]: ADDOUTID[61]
3777 483.746 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 4.042 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[4]: ADDOUTID[5]
3778 483.746 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.753 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[22]: ADDOUTID[25]
3779 483.746 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.753 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[23]: ADDOUTID[25]
3780 483.750 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.750 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[7]: ADDOUTID[58]
3781 483.760 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.739 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[7]: ADDOUTID[56]
3782 483.761 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.738 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[7]: ADDOUTID[54]
3783 483.763 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.992 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[6]: stall
3784 483.763 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.629 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[7]: ADDOUTID[32]
3785 483.764 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.735 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[7]: ADDOUTID[57]
3786 483.764 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.628 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[25]: ADDOUTID[45]
3787 483.765 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.735 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[7]: ADDOUTID[55]
3788 483.767 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.625 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[7]: ADDOUTID[31]
3789 483.778 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.722 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[25]: ADDOUTID[62]
3790 483.781 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.718 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[25]: ADDOUTID[63]
3791 483.781 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.718 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[7]: ADDOUTID[53]
3792 483.784 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.715 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[7]: ADDOUTID[52]
3793 483.784 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.715 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[7]: ADDOUTID[51]
3794 483.785 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.969 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[5]: stall
3795 483.786 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.713 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[7]: ADDOUTID[50]
3796 483.788 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.604 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[20]: ADDOUTID[60]
3797 483.789 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.603 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[20]: ADDOUTID[59]
3798 483.797 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.702 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[7]: ADDOUTID[48]
3799 483.798 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.990 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[4]: ADDOUTID[4]
3800 483.798 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.701 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[25]: ADDOUTID[61]
3801 483.800 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.592 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[8]: ADDOUTID[2]
3802 483.800 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.954 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[4]: stall
3803 483.801 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.699 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[7]: ADDOUTID[49]
3804 483.801 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.698 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[7]: ADDOUTID[47]
3805 483.802 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.986 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[4]: ADDOUTID[3]
3806 483.803 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.696 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[25]: ADDOUTID[58]
3807 483.804 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.950 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[0]: stall
3808 483.804 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.950 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[1]: stall
3809 483.814 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.686 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[25]: ADDOUTID[56]
3810 483.814 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.685 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[25]: ADDOUTID[54]
3811 483.816 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.576 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[25]: ADDOUTID[32]
3812 483.817 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.682 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[25]: ADDOUTID[57]
3813 483.818 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.681 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[25]: ADDOUTID[55]
3814 483.820 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.679 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[7]: ADDOUTID[44]
3815 483.821 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.572 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[25]: ADDOUTID[31]
3816 483.821 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.678 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[7]: ADDOUTID[43]
3817 483.823 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.676 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[7]: ADDOUTID[42]
3818 483.834 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.666 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[7]: ADDOUTID[40]
3819 483.834 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.665 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[7]: ADDOUTID[38]
3820 483.835 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.665 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[25]: ADDOUTID[53]
3821 483.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.662 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[25]: ADDOUTID[52]
3822 483.837 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.662 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[7]: ADDOUTID[41]
3823 483.838 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.662 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[25]: ADDOUTID[51]
3824 483.838 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.661 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[7]: ADDOUTID[39]
3825 483.839 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.554 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[20]: ADDOUTID[46]
3826 483.839 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.660 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[25]: ADDOUTID[50]
3827 483.841 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.551 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[21]: ADDOUTID[2]
3828 483.850 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.649 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[25]: ADDOUTID[48]
3829 483.854 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.645 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[25]: ADDOUTID[49]
3830 483.854 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.645 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[25]: ADDOUTID[47]
3831 483.855 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.645 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[7]: ADDOUTID[37]
3832 483.857 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.642 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[7]: ADDOUTID[36]
3833 483.858 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.642 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[7]: ADDOUTID[35]
3834 483.859 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.533 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[20]: ADDOUTID[45]
3835 483.859 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.640 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[7]: ADDOUTID[34]
3836 483.871 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.628 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[7]: ADDOUTID[30]
3837 483.872 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.627 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[20]: ADDOUTID[62]
3838 483.874 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.626 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[25]: ADDOUTID[44]
3839 483.874 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.625 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[7]: ADDOUTID[33]
3840 483.874 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.625 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[25]: ADDOUTID[43]
3841 483.876 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.623 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[25]: ADDOUTID[42]
3842 483.876 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.623 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[20]: ADDOUTID[63]
3843 483.877 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.516 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[7]: ADDOUTID[9]
3844 483.887 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.612 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[25]: ADDOUTID[40]
3845 483.887 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.612 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[25]: ADDOUTID[38]
3846 483.890 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.609 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[25]: ADDOUTID[41]
3847 483.891 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.608 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[25]: ADDOUTID[39]
3848 483.891 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.608 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[7]: ADDOUTID[29]
3849 483.893 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.606 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[20]: ADDOUTID[61]
3850 483.894 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.606 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[7]: ADDOUTID[28]
3851 483.894 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.605 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[7]: ADDOUTID[27]
3852 483.896 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.603 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[7]: ADDOUTID[26]
3853 483.898 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.602 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[20]: ADDOUTID[58]
3854 483.907 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.592 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[7]: ADDOUTID[24]
3855 483.908 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.591 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[25]: ADDOUTID[37]
3856 483.908 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.591 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[20]: ADDOUTID[56]
3857 483.909 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.590 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[20]: ADDOUTID[54]
3858 483.910 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.589 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[25]: ADDOUTID[36]
3859 483.910 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.589 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[7]: ADDOUTID[25]
3860 483.911 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.588 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[25]: ADDOUTID[35]
3861 483.911 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.481 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[20]: ADDOUTID[32]
3862 483.912 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.587 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[20]: ADDOUTID[57]
3863 483.913 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.587 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[20]: ADDOUTID[55]
3864 483.913 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.587 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[25]: ADDOUTID[34]
3865 483.913 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.842 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[2]: stall
3866 483.913 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 2.842 31.593 500.737 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE INSTRUCID[3]: stall
3867 483.915 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.477 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[20]: ADDOUTID[31]
3868 483.924 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.575 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[25]: ADDOUTID[30]
3869 483.927 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.572 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[25]: ADDOUTID[33]
3870 483.929 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.570 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[20]: ADDOUTID[53]
3871 483.930 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.462 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[25]: ADDOUTID[9]
3872 483.932 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.567 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[20]: ADDOUTID[52]
3873 483.932 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.567 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[20]: ADDOUTID[51]
3874 483.934 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.565 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[20]: ADDOUTID[50]
3875 483.944 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.555 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[25]: ADDOUTID[29]
3876 483.945 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.554 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[20]: ADDOUTID[48]
3877 483.947 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.552 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[25]: ADDOUTID[28]
3878 483.947 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.552 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[25]: ADDOUTID[27]
3879 483.949 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.550 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[20]: ADDOUTID[49]
3880 483.949 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.550 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[25]: ADDOUTID[26]
3881 483.949 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.550 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[20]: ADDOUTID[47]
3882 483.960 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.539 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[25]: ADDOUTID[24]
3883 483.964 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.536 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[25]: ADDOUTID[25]
3884 483.968 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.531 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[20]: ADDOUTID[44]
3885 483.969 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.530 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[20]: ADDOUTID[43]
3886 483.971 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.528 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[20]: ADDOUTID[42]
3887 483.982 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.518 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[20]: ADDOUTID[40]
3888 483.982 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.517 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[20]: ADDOUTID[38]
3889 483.985 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.514 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[20]: ADDOUTID[41]
3890 483.986 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.513 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[20]: ADDOUTID[39]
3891 484.000 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.392 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[7]: ADDOUTID[2]
3892 484.003 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.497 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[20]: ADDOUTID[37]
3893 484.005 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.494 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[20]: ADDOUTID[36]
3894 484.006 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.494 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[20]: ADDOUTID[35]
3895 484.007 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.492 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[20]: ADDOUTID[34]
3896 484.009 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.780 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[8]: ADDOUTID[14]
3897 484.012 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.776 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[8]: ADDOUTID[15]
3898 484.019 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.480 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[20]: ADDOUTID[30]
3899 484.022 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.477 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[20]: ADDOUTID[33]
3900 484.025 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.368 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[20]: ADDOUTID[9]
3901 484.028 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.760 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[10]: ADDOUTID[14]
3902 484.028 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.760 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[9]: ADDOUTID[14]
3903 484.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.759 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[8]: ADDOUTID[13]
3904 484.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.759 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[11]: ADDOUTID[14]
3905 484.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.757 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[10]: ADDOUTID[15]
3906 484.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.757 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[8]: ADDOUTID[12]
3907 484.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.757 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[9]: ADDOUTID[15]
3908 484.032 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.756 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[8]: ADDOUTID[11]
3909 484.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.756 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[11]: ADDOUTID[15]
3910 484.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.754 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[8]: ADDOUTID[10]
3911 484.039 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.460 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[20]: ADDOUTID[29]
3912 484.042 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.458 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[20]: ADDOUTID[28]
3913 484.042 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.457 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[20]: ADDOUTID[27]
3914 484.044 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.455 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[20]: ADDOUTID[26]
3915 484.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.740 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[9]: ADDOUTID[13]
3916 484.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.740 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[10]: ADDOUTID[13]
3917 484.049 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.739 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[11]: ADDOUTID[13]
3918 484.050 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.738 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[21]: ADDOUTID[14]
3919 484.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.738 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[9]: ADDOUTID[12]
3920 484.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.738 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[10]: ADDOUTID[12]
3921 484.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.737 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[9]: ADDOUTID[11]
3922 484.051 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.737 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[10]: ADDOUTID[11]
3923 484.052 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.736 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[11]: ADDOUTID[12]
3924 484.052 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.736 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[11]: ADDOUTID[11]
3925 484.053 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.735 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[9]: ADDOUTID[10]
3926 484.053 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.735 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[10]: ADDOUTID[10]
3927 484.053 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.735 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[21]: ADDOUTID[15]
3928 484.054 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.734 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[11]: ADDOUTID[10]
3929 484.055 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.444 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[20]: ADDOUTID[24]
3930 484.058 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.441 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[20]: ADDOUTID[25]
3931 484.065 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.724 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[24]: ADDOUTID[14]
3932 484.068 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.720 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[24]: ADDOUTID[15]
3933 484.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.719 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[22]: ADDOUTID[14]
3934 484.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.719 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[23]: ADDOUTID[14]
3935 484.070 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.718 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[21]: ADDOUTID[13]
3936 484.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.716 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[21]: ADDOUTID[12]
3937 484.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.716 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[22]: ADDOUTID[15]
3938 484.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.716 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[23]: ADDOUTID[15]
3939 484.073 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.715 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[21]: ADDOUTID[11]
3940 484.075 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.713 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[21]: ADDOUTID[10]
3941 484.077 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.711 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[8]: ADDOUTID[8]
3942 484.078 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.711 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[8]: ADDOUTID[6]
3943 484.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.611 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[26]: ADDOUTID[60]
3944 484.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.311 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[26]: ADDOUTID[59]
3945 484.081 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.707 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[8]: ADDOUTID[7]
3946 484.085 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.703 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[24]: ADDOUTID[13]
3947 484.087 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.701 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[24]: ADDOUTID[12]
3948 484.087 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.305 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[9]: ADDOUTID[2]
3949 484.088 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.700 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[24]: ADDOUTID[11]
3950 484.088 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.603 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[28]: ADDOUTID[60]
3951 484.088 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 4.603 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[29]: ADDOUTID[60]
3952 484.089 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.304 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[29]: ADDOUTID[59]
3953 484.089 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.304 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[28]: ADDOUTID[59]
3954 484.089 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.699 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[22]: ADDOUTID[13]
3955 484.089 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.699 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[23]: ADDOUTID[13]
3956 484.090 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.698 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[24]: ADDOUTID[10]
3957 484.092 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.696 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[22]: ADDOUTID[12]
3958 484.092 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.696 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[23]: ADDOUTID[12]
3959 484.092 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.696 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[22]: ADDOUTID[11]
3960 484.092 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.696 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[23]: ADDOUTID[11]
3961 484.094 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.694 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[22]: ADDOUTID[10]
3962 484.094 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.694 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[23]: ADDOUTID[10]
3963 484.099 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.689 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[8]: ADDOUTID[5]
3964 484.100 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.688 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[9]: ADDOUTID[8]
3965 484.102 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.687 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[9]: ADDOUTID[6]
3966 484.105 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 2.236 16.680 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D WRWB[0]: WRWB_aptn_ft[0]
3967 484.105 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 2.236 16.680 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D WRWB[1]: WRWB_aptn_ft[1]
3968 484.105 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 2.236 16.680 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D WRWB[2]: WRWB_aptn_ft[2]
3969 484.105 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 2.236 16.680 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D WRWB[3]: WRWB_aptn_ft[3]
3970 484.105 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.683 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[9]: ADDOUTID[7]
3971 484.110 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.678 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[10]: ADDOUTID[8]
3972 484.112 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.676 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[10]: ADDOUTID[6]
3973 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[6].D WRITEDATAWB[6]: WRITEDATAWB_aptn_ft[6]
3974 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[19].D WRITEDATAWB[19]: WRITEDATAWB_aptn_ft[19]
3975 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[30].D WRITEDATAWB[30]: WRITEDATAWB_aptn_ft[30]
3976 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[13].D WRITEDATAWB[13]: WRITEDATAWB_aptn_ft[13]
3977 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[22].D WRITEDATAWB[22]: WRITEDATAWB_aptn_ft[22]
3978 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[7].D WRITEDATAWB[7]: WRITEDATAWB_aptn_ft[7]
3979 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[21].D WRITEDATAWB[21]: WRITEDATAWB_aptn_ft[21]
3980 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[14].D WRITEDATAWB[14]: WRITEDATAWB_aptn_ft[14]
3981 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[34].D WRITEDATAWB[34]: WRITEDATAWB_aptn_ft[34]
3982 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[11].D WRITEDATAWB[11]: WRITEDATAWB_aptn_ft[11]
3983 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[23].D WRITEDATAWB[23]: WRITEDATAWB_aptn_ft[23]
3984 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[3].D WRITEDATAWB[3]: WRITEDATAWB_aptn_ft[3]
3985 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[9].D WRITEDATAWB[9]: WRITEDATAWB_aptn_ft[9]
3986 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[15].D WRITEDATAWB[15]: WRITEDATAWB_aptn_ft[15]
3987 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[12].D WRITEDATAWB[12]: WRITEDATAWB_aptn_ft[12]
3988 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[10].D WRITEDATAWB[10]: WRITEDATAWB_aptn_ft[10]
3989 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[36].D WRITEDATAWB[36]: WRITEDATAWB_aptn_ft[36]
3990 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[31].D WRITEDATAWB[31]: WRITEDATAWB_aptn_ft[31]
3991 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[4].D WRITEDATAWB[4]: WRITEDATAWB_aptn_ft[4]
3992 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[29].D WRITEDATAWB[29]: WRITEDATAWB_aptn_ft[29]
3993 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[5].D WRITEDATAWB[5]: WRITEDATAWB_aptn_ft[5]
3994 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[33].D WRITEDATAWB[33]: WRITEDATAWB_aptn_ft[33]
3995 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[32].D WRITEDATAWB[32]: WRITEDATAWB_aptn_ft[32]
3996 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[35].D WRITEDATAWB[35]: WRITEDATAWB_aptn_ft[35]
3997 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[24].D WRITEDATAWB[24]: WRITEDATAWB_aptn_ft[24]
3998 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[28].D WRITEDATAWB[28]: WRITEDATAWB_aptn_ft[28]
3999 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[20].D WRITEDATAWB[20]: WRITEDATAWB_aptn_ft[20]
4000 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[17].D WRITEDATAWB[17]: WRITEDATAWB_aptn_ft[17]
4001 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[26].D WRITEDATAWB[26]: WRITEDATAWB_aptn_ft[26]
4002 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[25].D WRITEDATAWB[25]: WRITEDATAWB_aptn_ft[25]
4003 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[27].D WRITEDATAWB[27]: WRITEDATAWB_aptn_ft[27]
4004 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[16].D WRITEDATAWB[16]: WRITEDATAWB_aptn_ft[16]
4005 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[8].D WRITEDATAWB[8]: WRITEDATAWB_aptn_ft[8]
4006 484.113 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.585 16.671 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[18].D WRITEDATAWB[18]: WRITEDATAWB_aptn_ft[18]
4007 484.115 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.673 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[10]: ADDOUTID[7]
4008 484.115 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.277 38.568 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[60].D INSTRUCID[31]: ADDOUTID[60]
4009 484.116 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.276 38.567 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[59].D INSTRUCID[31]: ADDOUTID[59]
4010 484.118 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.670 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[21]: ADDOUTID[8]
4011 484.119 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.669 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[21]: ADDOUTID[6]
4012 484.122 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.666 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[21]: ADDOUTID[7]
4013 484.123 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.665 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[9]: ADDOUTID[5]
4014 484.131 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.261 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[26]: ADDOUTID[46]
4015 484.135 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.653 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[10]: ADDOUTID[5]
4016 484.138 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.254 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[28]: ADDOUTID[46]
4017 484.138 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.254 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[29]: ADDOUTID[46]
4018 484.140 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.648 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[21]: ADDOUTID[5]
4019 484.141 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.647 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[22]: ADDOUTID[8]
4020 484.143 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.645 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[22]: ADDOUTID[6]
4021 484.143 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.645 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[11]: ADDOUTID[8]
4022 484.146 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.642 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[22]: ADDOUTID[7]
4023 484.148 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.244 38.208 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[2].D INSTRUCID[20]: ADDOUTID[2]
4024 484.148 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.640 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[11]: ADDOUTID[7]
4025 484.151 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.637 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[23]: ADDOUTID[8]
4026 484.151 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.241 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[26]: ADDOUTID[45]
4027 484.151 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.637 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[8]: ADDOUTID[4]
4028 484.153 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.635 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[23]: ADDOUTID[6]
4029 484.156 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.633 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[9]: ADDOUTID[3]
4030 484.156 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.633 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[8]: ADDOUTID[3]
4031 484.156 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.632 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[23]: ADDOUTID[7]
4032 484.159 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.233 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[29]: ADDOUTID[45]
4033 484.159 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.233 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[28]: ADDOUTID[45]
4034 484.164 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.624 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[22]: ADDOUTID[5]
4035 484.165 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.334 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[26]: ADDOUTID[62]
4036 484.166 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.226 38.517 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[46].D INSTRUCID[31]: ADDOUTID[46]
4037 484.168 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.331 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[26]: ADDOUTID[63]
4038 484.171 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.618 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[11]: ADDOUTID[6]
4039 484.172 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.327 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[28]: ADDOUTID[62]
4040 484.172 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.327 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[29]: ADDOUTID[62]
4041 484.176 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.323 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[28]: ADDOUTID[63]
4042 484.176 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.323 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[29]: ADDOUTID[63]
4043 484.176 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.612 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[23]: ADDOUTID[5]
4044 484.177 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.611 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[9]: ADDOUTID[4]
4045 484.179 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.610 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[24]: ADDOUTID[8]
4046 484.184 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.604 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[24]: ADDOUTID[7]
4047 484.185 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.314 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[26]: ADDOUTID[61]
4048 484.186 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.206 38.497 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[45].D INSTRUCID[31]: ADDOUTID[45]
4049 484.190 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.309 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[26]: ADDOUTID[58]
4050 484.192 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.596 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[21]: ADDOUTID[4]
4051 484.193 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.307 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[28]: ADDOUTID[61]
4052 484.193 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.307 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[29]: ADDOUTID[61]
4053 484.194 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.594 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[10]: ADDOUTID[4]
4054 484.196 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.592 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[11]: ADDOUTID[5]
4055 484.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.591 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[21]: ADDOUTID[3]
4056 484.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.591 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[22]: ADDOUTID[3]
4057 484.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.302 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[28]: ADDOUTID[58]
4058 484.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.302 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[29]: ADDOUTID[58]
4059 484.200 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.300 38.484 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[62].D INSTRUCID[31]: ADDOUTID[62]
4060 484.201 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.298 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[26]: ADDOUTID[56]
4061 484.201 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.298 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[26]: ADDOUTID[54]
4062 484.203 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.296 38.480 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[63].D INSTRUCID[31]: ADDOUTID[63]
4063 484.204 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.189 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[26]: ADDOUTID[32]
4064 484.204 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.295 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[26]: ADDOUTID[57]
4065 484.205 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.294 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[26]: ADDOUTID[55]
4066 484.206 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.582 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[24]: ADDOUTID[6]
4067 484.208 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.184 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[26]: ADDOUTID[31]
4068 484.208 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.291 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[29]: ADDOUTID[56]
4069 484.208 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.291 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[28]: ADDOUTID[56]
4070 484.209 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.290 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[29]: ADDOUTID[54]
4071 484.209 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.290 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[28]: ADDOUTID[54]
4072 484.211 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.181 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[29]: ADDOUTID[32]
4073 484.211 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.181 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[28]: ADDOUTID[32]
4074 484.212 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.287 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[29]: ADDOUTID[57]
4075 484.212 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.287 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[28]: ADDOUTID[57]
4076 484.212 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.287 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[29]: ADDOUTID[55]
4077 484.212 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.287 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[28]: ADDOUTID[55]
4078 484.215 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.177 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[29]: ADDOUTID[31]
4079 484.215 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.177 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[28]: ADDOUTID[31]
4080 484.218 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.570 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[22]: ADDOUTID[4]
4081 484.220 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.279 38.463 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[61].D INSTRUCID[31]: ADDOUTID[61]
4082 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[55].D WRITEDATAWB[55]: WRITEDATAWB_aptn_ft[55]
4083 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[62].D WRITEDATAWB[62]: WRITEDATAWB_aptn_ft[62]
4084 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[42].D WRITEDATAWB[42]: WRITEDATAWB_aptn_ft[42]
4085 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[46].D WRITEDATAWB[46]: WRITEDATAWB_aptn_ft[46]
4086 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[44].D WRITEDATAWB[44]: WRITEDATAWB_aptn_ft[44]
4087 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[54].D WRITEDATAWB[54]: WRITEDATAWB_aptn_ft[54]
4088 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[58].D WRITEDATAWB[58]: WRITEDATAWB_aptn_ft[58]
4089 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[56].D WRITEDATAWB[56]: WRITEDATAWB_aptn_ft[56]
4090 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[57].D WRITEDATAWB[57]: WRITEDATAWB_aptn_ft[57]
4091 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[59].D WRITEDATAWB[59]: WRITEDATAWB_aptn_ft[59]
4092 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[51].D WRITEDATAWB[51]: WRITEDATAWB_aptn_ft[51]
4093 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[50].D WRITEDATAWB[50]: WRITEDATAWB_aptn_ft[50]
4094 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[48].D WRITEDATAWB[48]: WRITEDATAWB_aptn_ft[48]
4095 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[60].D WRITEDATAWB[60]: WRITEDATAWB_aptn_ft[60]
4096 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[45].D WRITEDATAWB[45]: WRITEDATAWB_aptn_ft[45]
4097 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[61].D WRITEDATAWB[61]: WRITEDATAWB_aptn_ft[61]
4098 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[39].D WRITEDATAWB[39]: WRITEDATAWB_aptn_ft[39]
4099 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[49].D WRITEDATAWB[49]: WRITEDATAWB_aptn_ft[49]
4100 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[37].D WRITEDATAWB[37]: WRITEDATAWB_aptn_ft[37]
4101 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[41].D WRITEDATAWB[41]: WRITEDATAWB_aptn_ft[41]
4102 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[52].D WRITEDATAWB[52]: WRITEDATAWB_aptn_ft[52]
4103 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[38].D WRITEDATAWB[38]: WRITEDATAWB_aptn_ft[38]
4104 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[43].D WRITEDATAWB[43]: WRITEDATAWB_aptn_ft[43]
4105 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[53].D WRITEDATAWB[53]: WRITEDATAWB_aptn_ft[53]
4106 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[40].D WRITEDATAWB[40]: WRITEDATAWB_aptn_ft[40]
4107 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[47].D WRITEDATAWB[47]: WRITEDATAWB_aptn_ft[47]
4108 484.220 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.039) = 10.087 1.585 16.564 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[63].D WRITEDATAWB[63]: WRITEDATAWB_aptn_ft[63]
4109 484.222 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.277 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[26]: ADDOUTID[53]
4110 484.224 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.275 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[26]: ADDOUTID[52]
4111 484.225 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.274 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[26]: ADDOUTID[51]
4112 484.225 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.274 38.458 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[58].D INSTRUCID[31]: ADDOUTID[58]
4113 484.227 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.273 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[26]: ADDOUTID[50]
4114 484.229 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.270 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[29]: ADDOUTID[53]
4115 484.229 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.270 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[28]: ADDOUTID[53]
4116 484.231 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.557 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[24]: ADDOUTID[5]
4117 484.232 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.268 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[28]: ADDOUTID[52]
4118 484.232 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.268 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[29]: ADDOUTID[52]
4119 484.232 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.267 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[28]: ADDOUTID[51]
4120 484.232 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.267 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[29]: ADDOUTID[51]
4121 484.233 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.555 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[7]: ADDOUTID[14]
4122 484.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.265 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[28]: ADDOUTID[50]
4123 484.234 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.265 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[29]: ADDOUTID[50]
4124 484.235 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.553 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[23]: ADDOUTID[4]
4125 484.236 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.264 38.448 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[56].D INSTRUCID[31]: ADDOUTID[56]
4126 484.236 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.263 38.447 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[54].D INSTRUCID[31]: ADDOUTID[54]
4127 484.237 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.552 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[7]: ADDOUTID[15]
4128 484.237 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.262 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[26]: ADDOUTID[48]
4129 484.238 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.154 38.445 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[32].D INSTRUCID[31]: ADDOUTID[32]
4130 484.239 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.260 38.444 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[57].D INSTRUCID[31]: ADDOUTID[57]
4131 484.240 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.259 38.443 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[55].D INSTRUCID[31]: ADDOUTID[55]
4132 484.241 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.258 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[26]: ADDOUTID[49]
4133 484.242 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.258 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[26]: ADDOUTID[47]
4134 484.243 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.150 38.441 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[31].D INSTRUCID[31]: ADDOUTID[31]
4135 484.245 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.254 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[28]: ADDOUTID[48]
4136 484.245 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.254 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[29]: ADDOUTID[48]
4137 484.248 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.251 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[28]: ADDOUTID[49]
4138 484.248 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.251 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[29]: ADDOUTID[49]
4139 484.249 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.250 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[29]: ADDOUTID[47]
4140 484.249 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.250 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[28]: ADDOUTID[47]
4141 484.253 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.535 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[7]: ADDOUTID[13]
4142 484.256 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.532 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[7]: ADDOUTID[12]
4143 484.256 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.532 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[7]: ADDOUTID[11]
4144 484.257 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.243 38.427 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[53].D INSTRUCID[31]: ADDOUTID[53]
4145 484.258 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.530 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[7]: ADDOUTID[10]
4146 484.259 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.240 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[52].D INSTRUCID[31]: ADDOUTID[52]
4147 484.260 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.240 38.424 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[51].D INSTRUCID[31]: ADDOUTID[51]
4148 484.261 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.238 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[26]: ADDOUTID[44]
4149 484.261 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.238 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[26]: ADDOUTID[43]
4150 484.261 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.238 38.422 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[50].D INSTRUCID[31]: ADDOUTID[50]
4151 484.263 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.236 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[26]: ADDOUTID[42]
4152 484.268 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.231 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[28]: ADDOUTID[44]
4153 484.268 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.231 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[29]: ADDOUTID[44]
4154 484.269 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.230 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[28]: ADDOUTID[43]
4155 484.269 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.230 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[29]: ADDOUTID[43]
4156 484.271 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.229 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[29]: ADDOUTID[42]
4157 484.271 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.229 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[28]: ADDOUTID[42]
4158 484.272 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.227 38.411 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[48].D INSTRUCID[31]: ADDOUTID[48]
4159 484.274 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.225 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[26]: ADDOUTID[40]
4160 484.275 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.225 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[26]: ADDOUTID[38]
4161 484.276 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.223 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[49].D INSTRUCID[31]: ADDOUTID[49]
4162 484.276 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.223 38.407 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[47].D INSTRUCID[31]: ADDOUTID[47]
4163 484.278 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.222 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[26]: ADDOUTID[41]
4164 484.278 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.221 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[26]: ADDOUTID[39]
4165 484.281 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.218 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[29]: ADDOUTID[40]
4166 484.281 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.218 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[28]: ADDOUTID[40]
4167 484.282 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.217 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[28]: ADDOUTID[38]
4168 484.282 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.217 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[29]: ADDOUTID[38]
4169 484.285 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.214 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[28]: ADDOUTID[41]
4170 484.285 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.214 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[29]: ADDOUTID[41]
4171 484.286 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.214 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[29]: ADDOUTID[39]
4172 484.286 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.214 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[28]: ADDOUTID[39]
4173 484.286 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.502 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[25]: ADDOUTID[14]
4174 484.290 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.498 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[25]: ADDOUTID[15]
4175 484.295 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.204 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[26]: ADDOUTID[37]
4176 484.296 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.204 38.388 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[44].D INSTRUCID[31]: ADDOUTID[44]
4177 484.296 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.203 38.387 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[43].D INSTRUCID[31]: ADDOUTID[43]
4178 484.297 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.202 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[26]: ADDOUTID[36]
4179 484.298 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.201 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[26]: ADDOUTID[35]
4180 484.298 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.201 38.385 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[42].D INSTRUCID[31]: ADDOUTID[42]
4181 484.300 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.199 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[26]: ADDOUTID[34]
4182 484.301 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.487 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[7]: ADDOUTID[8]
4183 484.302 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.486 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[7]: ADDOUTID[6]
4184 484.302 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.197 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[29]: ADDOUTID[37]
4185 484.302 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.197 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[28]: ADDOUTID[37]
4186 484.305 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.194 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[28]: ADDOUTID[36]
4187 484.305 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.194 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[29]: ADDOUTID[36]
4188 484.305 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.194 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[28]: ADDOUTID[35]
4189 484.305 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.194 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[29]: ADDOUTID[35]
4190 484.306 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.482 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[7]: ADDOUTID[7]
4191 484.307 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.482 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[25]: ADDOUTID[13]
4192 484.307 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.192 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[28]: ADDOUTID[34]
4193 484.307 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.192 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[29]: ADDOUTID[34]
4194 484.309 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.190 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[40].D INSTRUCID[31]: ADDOUTID[40]
4195 484.309 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.479 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[25]: ADDOUTID[12]
4196 484.309 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.190 38.374 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[38].D INSTRUCID[31]: ADDOUTID[38]
4197 484.310 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.479 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[25]: ADDOUTID[11]
4198 484.311 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.188 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[26]: ADDOUTID[30]
4199 484.311 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.477 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[25]: ADDOUTID[10]
4200 484.312 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.187 38.371 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[41].D INSTRUCID[31]: ADDOUTID[41]
4201 484.313 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.186 38.370 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[39].D INSTRUCID[31]: ADDOUTID[39]
4202 484.314 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.185 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[26]: ADDOUTID[33]
4203 484.317 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.075 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[26]: ADDOUTID[9]
4204 484.319 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.181 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[28]: ADDOUTID[30]
4205 484.319 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.181 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[29]: ADDOUTID[30]
4206 484.322 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.178 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[29]: ADDOUTID[33]
4207 484.322 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.178 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[28]: ADDOUTID[33]
4208 484.324 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.465 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[7]: ADDOUTID[5]
4209 484.330 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.169 38.353 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[37].D INSTRUCID[31]: ADDOUTID[37]
4210 484.332 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.168 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[26]: ADDOUTID[29]
4211 484.332 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.167 38.351 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[36].D INSTRUCID[31]: ADDOUTID[36]
4212 484.333 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.166 38.350 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[35].D INSTRUCID[31]: ADDOUTID[35]
4213 484.334 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.165 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[26]: ADDOUTID[28]
4214 484.335 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.165 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[26]: ADDOUTID[27]
4215 484.335 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.165 38.349 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[34].D INSTRUCID[31]: ADDOUTID[34]
4216 484.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 3.056 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[28]: ADDOUTID[9]
4217 484.336 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.163 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[26]: ADDOUTID[26]
4218 484.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.160 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[28]: ADDOUTID[29]
4219 484.339 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.160 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[29]: ADDOUTID[29]
4220 484.341 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.158 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[29]: ADDOUTID[28]
4221 484.341 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.158 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[28]: ADDOUTID[28]
4222 484.342 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.157 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[28]: ADDOUTID[27]
4223 484.342 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.157 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[29]: ADDOUTID[27]
4224 484.344 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.155 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[29]: ADDOUTID[26]
4225 484.344 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.155 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[28]: ADDOUTID[26]
4226 484.346 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.153 38.337 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[30].D INSTRUCID[31]: ADDOUTID[30]
4227 484.347 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.152 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[26]: ADDOUTID[24]
4228 484.349 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.150 38.334 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[33].D INSTRUCID[31]: ADDOUTID[33]
4229 484.351 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.148 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[26]: ADDOUTID[25]
4230 484.355 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.145 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[29]: ADDOUTID[24]
4231 484.355 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.145 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[28]: ADDOUTID[24]
4232 484.358 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.141 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[29]: ADDOUTID[25]
4233 484.358 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.141 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[28]: ADDOUTID[25]
4234 484.366 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.133 38.317 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[29].D INSTRUCID[31]: ADDOUTID[29]
4235 484.367 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.421 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[7]: ADDOUTID[4]
4236 484.369 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.130 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[28].D INSTRUCID[31]: ADDOUTID[28]
4237 484.369 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.130 38.314 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[27].D INSTRUCID[31]: ADDOUTID[27]
4238 484.371 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.128 38.312 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[26].D INSTRUCID[31]: ADDOUTID[26]
4239 484.372 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.417 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[7]: ADDOUTID[3]
4240 484.381 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.407 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[20]: ADDOUTID[14]
4241 484.382 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.117 38.301 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[24].D INSTRUCID[31]: ADDOUTID[24]
4242 484.385 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.404 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[20]: ADDOUTID[15]
4243 484.386 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.039) = 10.078 3.114 38.298 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[25].D INSTRUCID[31]: ADDOUTID[25]
4244 484.390 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.395 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[1]: ADDOUTID[22]
4245 484.390 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.395 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[0]: ADDOUTID[22]
4246 484.394 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.392 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[0]: ADDOUTID[23]
4247 484.394 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.392 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[1]: ADDOUTID[23]
4248 484.400 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.388 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[25]: ADDOUTID[8]
4249 484.401 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.387 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[20]: ADDOUTID[13]
4250 484.403 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.382 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[3]: ADDOUTID[22]
4251 484.403 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.382 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[5]: ADDOUTID[22]
4252 484.403 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.382 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[2]: ADDOUTID[22]
4253 484.404 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.384 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[20]: ADDOUTID[12]
4254 484.404 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.384 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[20]: ADDOUTID[11]
4255 484.406 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.383 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[25]: ADDOUTID[7]
4256 484.406 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.382 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[20]: ADDOUTID[10]
4257 484.407 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.378 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[5]: ADDOUTID[23]
4258 484.407 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.378 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[2]: ADDOUTID[23]
4259 484.407 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.378 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[3]: ADDOUTID[23]
4260 484.410 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.375 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[1]: ADDOUTID[21]
4261 484.410 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.375 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[0]: ADDOUTID[21]
4262 484.413 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.372 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[0]: ADDOUTID[20]
4263 484.413 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.372 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[1]: ADDOUTID[20]
4264 484.413 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.372 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[1]: ADDOUTID[19]
4265 484.413 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.372 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[0]: ADDOUTID[19]
4266 484.415 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.370 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[1]: ADDOUTID[18]
4267 484.415 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.370 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[0]: ADDOUTID[18]
4268 484.424 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.362 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[3]: ADDOUTID[21]
4269 484.424 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.362 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[2]: ADDOUTID[21]
4270 484.424 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.362 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[5]: ADDOUTID[21]
4271 484.426 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[1]: ADDOUTID[16]
4272 484.426 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[0]: ADDOUTID[16]
4273 484.426 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[3]: ADDOUTID[20]
4274 484.426 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[5]: ADDOUTID[20]
4275 484.426 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[2]: ADDOUTID[20]
4276 484.427 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[2]: ADDOUTID[19]
4277 484.427 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[3]: ADDOUTID[19]
4278 484.427 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.359 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[5]: ADDOUTID[19]
4279 484.428 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.360 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[25]: ADDOUTID[6]
4280 484.428 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.357 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[3]: ADDOUTID[18]
4281 484.428 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.357 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[5]: ADDOUTID[18]
4282 484.428 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.357 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[2]: ADDOUTID[18]
4283 484.430 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.356 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[0]: ADDOUTID[17]
4284 484.430 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.356 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[1]: ADDOUTID[17]
4285 484.437 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:5.146) = 10.185 2.955 38.331 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[9].D INSTRUCID[29]: ADDOUTID[9]
4286 484.439 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.346 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[5]: ADDOUTID[16]
4287 484.439 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.346 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[3]: ADDOUTID[16]
4288 484.439 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.346 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[2]: ADDOUTID[16]
4289 484.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.342 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[3]: ADDOUTID[17]
4290 484.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.342 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[2]: ADDOUTID[17]
4291 484.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.342 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[5]: ADDOUTID[17]
4292 484.443 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.345 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[10]: ADDOUTID[3]
4293 484.449 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.339 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[20]: ADDOUTID[8]
4294 484.450 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.338 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[20]: ADDOUTID[6]
4295 484.453 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.335 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[25]: ADDOUTID[5]
4296 484.454 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.334 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[20]: ADDOUTID[7]
4297 484.472 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.317 37.884 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[5].D INSTRUCID[20]: ADDOUTID[5]
4298 484.482 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.307 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[11]: ADDOUTID[4]
4299 484.501 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:5.146) = 10.194 1.839 16.284 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q FB1.uB.dut_inst.idex1.readdata2_out[52].D WRWB[4]: WRWB_aptn_ft[4]
4300 484.515 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.273 37.841 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[4].D INSTRUCID[20]: ADDOUTID[4]
4301 484.520 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.268 37.836 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[3].D INSTRUCID[20]: ADDOUTID[3]
4302 484.531 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.254 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[6]: ADDOUTID[22]
4303 484.535 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.251 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[6]: ADDOUTID[23]
4304 484.551 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.234 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[6]: ADDOUTID[21]
4305 484.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.231 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[6]: ADDOUTID[20]
4306 484.554 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.231 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[6]: ADDOUTID[19]
4307 484.556 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.229 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[6]: ADDOUTID[18]
4308 484.567 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.218 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[6]: ADDOUTID[16]
4309 484.571 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.215 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[6]: ADDOUTID[17]
4310 484.615 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.170 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[4]: ADDOUTID[22]
4311 484.619 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.166 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[4]: ADDOUTID[23]
4312 484.636 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.149 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[4]: ADDOUTID[21]
4313 484.638 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.147 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[4]: ADDOUTID[20]
4314 484.639 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.146 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[4]: ADDOUTID[19]
4315 484.641 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.144 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[4]: ADDOUTID[18]
4316 484.651 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.134 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[4]: ADDOUTID[16]
4317 484.655 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 4.130 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[4]: ADDOUTID[17]
4318 484.673 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.115 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[26]: ADDOUTID[14]
4319 484.677 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.111 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[26]: ADDOUTID[15]
4320 484.692 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.096 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[28]: ADDOUTID[14]
4321 484.694 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.094 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[26]: ADDOUTID[13]
4322 484.696 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.092 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[28]: ADDOUTID[15]
4323 484.696 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.092 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[26]: ADDOUTID[12]
4324 484.697 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.091 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[26]: ADDOUTID[11]
4325 484.699 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.090 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[26]: ADDOUTID[10]
4326 484.713 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.076 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[28]: ADDOUTID[13]
4327 484.713 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.075 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[29]: ADDOUTID[14]
4328 484.715 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.073 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[28]: ADDOUTID[12]
4329 484.716 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.073 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[28]: ADDOUTID[11]
4330 484.717 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.071 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[29]: ADDOUTID[15]
4331 484.717 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.071 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[28]: ADDOUTID[10]
4332 484.722 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.066 37.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[14].D INSTRUCID[31]: ADDOUTID[14]
4333 484.725 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.063 37.971 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[15].D INSTRUCID[31]: ADDOUTID[15]
4334 484.735 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.053 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[29]: ADDOUTID[13]
4335 484.745 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.043 37.955 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[13].D INSTRUCID[31]: ADDOUTID[13]
4336 484.779 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.010 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[29]: ADDOUTID[12]
4337 484.783 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.005 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[11].D INSTRUCID[29]: ADDOUTID[11]
4338 484.788 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 3.000 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[26]: ADDOUTID[8]
4339 484.793 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 2.995 37.902 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[7].D INSTRUCID[26]: ADDOUTID[7]
4340 484.807 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 2.981 37.950 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[10].D INSTRUCID[29]: ADDOUTID[10]
4341 484.833 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 2.956 37.907 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[8].D INSTRUCID[28]: ADDOUTID[8]
4342 484.841 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 2.947 37.906 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[6].D INSTRUCID[26]: ADDOUTID[6]
4343 484.889 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:4.750) = 9.789 2.900 37.952 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[12].D INSTRUCID[31]: ADDOUTID[12]
4344 484.969 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.816 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[8]: ADDOUTID[22]
4345 484.973 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.812 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[8]: ADDOUTID[23]
4346 484.988 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.797 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[9]: ADDOUTID[22]
4347 484.988 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.797 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[10]: ADDOUTID[22]
4348 484.989 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.796 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[11]: ADDOUTID[22]
4349 484.989 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.796 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[8]: ADDOUTID[21]
4350 484.992 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.793 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[10]: ADDOUTID[23]
4351 484.992 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.793 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[9]: ADDOUTID[23]
4352 484.992 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.793 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[8]: ADDOUTID[20]
4353 484.992 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.793 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[8]: ADDOUTID[19]
4354 484.993 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.792 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[11]: ADDOUTID[23]
4355 484.994 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.791 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[8]: ADDOUTID[18]
4356 485.005 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.780 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[8]: ADDOUTID[16]
4357 485.009 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.776 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[10]: ADDOUTID[21]
4358 485.009 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.776 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[8]: ADDOUTID[17]
4359 485.009 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.776 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[9]: ADDOUTID[21]
4360 485.010 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.775 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[11]: ADDOUTID[21]
4361 485.010 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.775 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[21]: ADDOUTID[22]
4362 485.011 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.774 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[9]: ADDOUTID[20]
4363 485.011 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.774 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[10]: ADDOUTID[20]
4364 485.012 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.774 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[9]: ADDOUTID[19]
4365 485.012 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.774 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[10]: ADDOUTID[19]
4366 485.012 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.773 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[11]: ADDOUTID[20]
4367 485.013 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.772 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[11]: ADDOUTID[19]
4368 485.013 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.772 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[10]: ADDOUTID[18]
4369 485.013 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.772 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[9]: ADDOUTID[18]
4370 485.014 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.771 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[21]: ADDOUTID[23]
4371 485.015 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.771 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[11]: ADDOUTID[18]
4372 485.024 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.761 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[10]: ADDOUTID[16]
4373 485.024 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.761 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[9]: ADDOUTID[16]
4374 485.025 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.760 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[24]: ADDOUTID[22]
4375 485.025 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.760 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[11]: ADDOUTID[16]
4376 485.028 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.757 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[10]: ADDOUTID[17]
4377 485.028 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.757 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[9]: ADDOUTID[17]
4378 485.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.757 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[24]: ADDOUTID[23]
4379 485.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.756 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[11]: ADDOUTID[17]
4380 485.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.756 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[23]: ADDOUTID[22]
4381 485.029 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.756 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[22]: ADDOUTID[22]
4382 485.031 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.755 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[21]: ADDOUTID[21]
4383 485.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.752 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[23]: ADDOUTID[23]
4384 485.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.752 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[21]: ADDOUTID[20]
4385 485.033 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.752 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[22]: ADDOUTID[23]
4386 485.034 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.752 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[21]: ADDOUTID[19]
4387 485.035 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.750 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[21]: ADDOUTID[18]
4388 485.045 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.740 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[24]: ADDOUTID[21]
4389 485.046 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.739 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[21]: ADDOUTID[16]
4390 485.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.737 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[24]: ADDOUTID[20]
4391 485.048 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.737 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[24]: ADDOUTID[19]
4392 485.050 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.735 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[22]: ADDOUTID[21]
4393 485.050 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.735 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[23]: ADDOUTID[21]
4394 485.050 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.735 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[21]: ADDOUTID[17]
4395 485.050 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.735 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[24]: ADDOUTID[18]
4396 485.052 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.733 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[23]: ADDOUTID[20]
4397 485.052 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.733 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[22]: ADDOUTID[20]
4398 485.053 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.732 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[23]: ADDOUTID[19]
4399 485.053 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.732 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[22]: ADDOUTID[19]
4400 485.055 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.731 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[23]: ADDOUTID[18]
4401 485.055 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.731 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[22]: ADDOUTID[18]
4402 485.061 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.724 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[24]: ADDOUTID[16]
4403 485.065 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.721 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[24]: ADDOUTID[17]
4404 485.065 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.720 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[23]: ADDOUTID[16]
4405 485.065 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.720 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[22]: ADDOUTID[16]
4406 485.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.716 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[22]: ADDOUTID[17]
4407 485.069 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.716 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[23]: ADDOUTID[17]
4408 485.120 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.665 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[6]: ADDOUTID[1]
4409 485.143 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.642 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[2]: ADDOUTID[1]
4410 485.143 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.642 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[5]: ADDOUTID[1]
4411 485.143 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.642 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[3]: ADDOUTID[1]
4412 485.162 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.623 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[1]: ADDOUTID[1]
4413 485.162 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.623 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[0]: ADDOUTID[1]
4414 485.193 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.592 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[7]: ADDOUTID[22]
4415 485.197 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.588 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[7]: ADDOUTID[23]
4416 485.214 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.571 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[7]: ADDOUTID[21]
4417 485.216 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.569 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[7]: ADDOUTID[20]
4418 485.217 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.568 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[7]: ADDOUTID[19]
4419 485.219 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.567 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[7]: ADDOUTID[18]
4420 485.229 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.556 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[7]: ADDOUTID[16]
4421 485.233 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.552 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[7]: ADDOUTID[17]
4422 485.247 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.538 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[25]: ADDOUTID[22]
4423 485.250 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.535 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[25]: ADDOUTID[23]
4424 485.267 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.518 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[25]: ADDOUTID[21]
4425 485.269 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.516 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[25]: ADDOUTID[20]
4426 485.270 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.515 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[25]: ADDOUTID[19]
4427 485.272 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.513 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[25]: ADDOUTID[18]
4428 485.283 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.502 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[25]: ADDOUTID[16]
4429 485.286 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.499 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[25]: ADDOUTID[17]
4430 485.341 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.444 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[20]: ADDOUTID[22]
4431 485.345 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.440 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[20]: ADDOUTID[23]
4432 485.362 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.423 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[20]: ADDOUTID[21]
4433 485.364 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.421 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[20]: ADDOUTID[20]
4434 485.365 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.420 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[20]: ADDOUTID[19]
4435 485.367 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.419 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[20]: ADDOUTID[18]
4436 485.377 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.408 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[20]: ADDOUTID[16]
4437 485.381 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.404 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[20]: ADDOUTID[17]
4438 485.490 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.296 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[4]: ADDOUTID[1]
4439 485.498 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 1.594 15.287 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[2].D WRITEDATAWB[2]: WRITEDATAWB_aptn_ft[2]
4440 485.498 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 1.594 15.287 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[1].D WRITEDATAWB[1]: WRITEDATAWB_aptn_ft[1]
4441 485.498 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 1.594 15.287 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uB.dut_inst.idex1.readdata2_out[0].D WRITEDATAWB[0]: WRITEDATAWB_aptn_ft[0]
4442 485.525 clk:r System:r - - x1 (trace:5.039) = 5.039 7.275 14.475 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q ALUOUTEX[63:0].ALUOUTEX[62] WRWB_aptn_s[3]
4443 485.525 clk:r System:r - - x1 (trace:5.039) = 5.039 7.275 14.475 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q ALUOUTEX[63:0].ALUOUTEX[62] WRWB_aptn_s[1]
4444 485.525 clk:r System:r - - x1 (trace:5.039) = 5.039 7.275 14.475 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q ALUOUTEX[63:0].ALUOUTEX[62] WRWB_aptn_s[0]
4445 485.525 clk:r System:r - - x1 (trace:5.039) = 5.039 7.275 14.475 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q ALUOUTEX[63:0].ALUOUTEX[62] WRWB_aptn_s[2]
4446 485.525 clk:r System:r - - x1 (trace:5.039) = 5.039 7.275 14.475 500.000 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q ALUOUTEX[63:0].ALUOUTEX[62] WRWB_aptn_s[4]
4447 485.634 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.151 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[26]: ADDOUTID[22]
4448 485.637 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.148 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[26]: ADDOUTID[23]
4449 485.641 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.144 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[29]: ADDOUTID[22]
4450 485.641 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.144 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[28]: ADDOUTID[22]
4451 485.645 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.140 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[29]: ADDOUTID[23]
4452 485.645 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.140 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[28]: ADDOUTID[23]
4453 485.654 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.131 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[26]: ADDOUTID[21]
4454 485.657 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.129 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[26]: ADDOUTID[20]
4455 485.657 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.128 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[26]: ADDOUTID[19]
4456 485.659 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.126 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[26]: ADDOUTID[18]
4457 485.662 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.123 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[28]: ADDOUTID[21]
4458 485.662 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.123 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[29]: ADDOUTID[21]
4459 485.664 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.121 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[29]: ADDOUTID[20]
4460 485.664 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.121 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[28]: ADDOUTID[20]
4461 485.665 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.121 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[29]: ADDOUTID[19]
4462 485.665 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.121 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[28]: ADDOUTID[19]
4463 485.666 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.119 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[29]: ADDOUTID[18]
4464 485.666 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.119 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[28]: ADDOUTID[18]
4465 485.669 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.117 37.015 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[22].D INSTRUCID[31]: ADDOUTID[22]
4466 485.670 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.115 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[26]: ADDOUTID[16]
4467 485.672 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.113 37.011 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[23].D INSTRUCID[31]: ADDOUTID[23]
4468 485.673 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.112 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[26]: ADDOUTID[17]
4469 485.681 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.104 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[29]: ADDOUTID[17]
4470 485.681 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.104 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[28]: ADDOUTID[17]
4471 485.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.097 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[28]: ADDOUTID[16]
4472 485.689 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.096 36.994 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[21].D INSTRUCID[31]: ADDOUTID[21]
4473 485.691 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.094 36.992 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[20].D INSTRUCID[31]: ADDOUTID[20]
4474 485.692 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.093 36.991 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[19].D INSTRUCID[31]: ADDOUTID[19]
4475 485.694 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.091 36.989 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[18].D INSTRUCID[31]: ADDOUTID[18]
4476 485.708 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.077 36.975 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[17].D INSTRUCID[31]: ADDOUTID[17]
4477 485.710 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.076 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[29]: ADDOUTID[16]
4478 485.717 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.068 36.979 500.803 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uA.dut_inst.pc1.PC[16].D INSTRUCID[31]: ADDOUTID[16]
4479 485.783 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 3.002 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[7]: ADDOUTID[1]
4480 485.798 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 2.987 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[8]: ADDOUTID[1]
4481 485.801 clk:r System:r - - x1 (trace:5.146) = 5.146 6.862 14.199 500.000 FB1.uD.dut_inst.memwb1.regwrite_out.Q ALUOUTEX[63:0].ALUOUTEX[62] REGWRITEWB_aptn_s
4482 485.931 clk:r clk:r - FB1_uB x1: x1 (trace:5.039) + (trace:3.753) = 8.792 2.855 36.425 500.803 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uA.dut_inst.pc1.PC[1].D INSTRUCID[20]: ADDOUTID[1]
4483 486.135 clk:r System:r - - x1 (trace:5.039) = 5.039 8.010 13.865 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[41]
4484 486.154 clk:r System:r - - x1 (trace:5.039) = 5.039 7.991 13.846 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[43]
4485 486.154 clk:r System:r - - x1 (trace:5.039) = 5.039 7.991 13.846 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[42]
4486 486.154 clk:r System:r - - x1 (trace:5.039) = 5.039 7.991 13.846 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[45]
4487 486.155 clk:r System:r - - x1 (trace:5.039) = 5.039 7.989 13.845 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[44]
4488 486.180 clk:r System:r - - x1 (trace:5.039) = 5.039 7.964 13.820 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[46]
4489 486.180 clk:r System:r - - x1 (trace:5.039) = 5.039 7.964 13.820 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[47]
4490 486.202 clk:r System:r - - x1 (trace:5.039) = 5.039 7.943 13.798 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[48]
4491 486.204 clk:r System:r - - x1 (trace:5.039) = 5.039 7.940 13.796 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[49]
4492 486.224 clk:r System:r - - x1 (trace:5.039) = 5.039 7.921 13.777 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[53]
4493 486.224 clk:r System:r - - x1 (trace:5.039) = 5.039 7.921 13.777 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[51]
4494 486.224 clk:r System:r - - x1 (trace:5.039) = 5.039 7.921 13.777 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[50]
4495 486.225 clk:r System:r - - x1 (trace:5.039) = 5.039 7.920 13.775 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[52]
4496 486.238 clk:r System:r - - x1 (trace:4.750) = 4.750 8.195 13.762 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[0]
4497 486.241 clk:r System:r - - x1 (trace:4.750) = 4.750 8.193 13.759 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[1]
4498 486.250 clk:r System:r - - x1 (trace:5.039) = 5.039 7.895 13.750 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[55]
4499 486.250 clk:r System:r - - x1 (trace:5.039) = 5.039 7.895 13.750 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[54]
4500 486.260 clk:r System:r - - x1 (trace:4.750) = 4.750 8.174 13.740 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[5]
4501 486.260 clk:r System:r - - x1 (trace:4.750) = 4.750 8.174 13.740 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[3]
4502 486.260 clk:r System:r - - x1 (trace:4.750) = 4.750 8.174 13.740 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[2]
4503 486.261 clk:r System:r - - x1 (trace:4.750) = 4.750 8.172 13.739 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[4]
4504 486.275 clk:r System:r - - x1 (trace:4.750) = 4.750 8.159 13.725 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[8]
4505 486.277 clk:r System:r - - x1 (trace:4.750) = 4.750 8.156 13.723 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[9]
4506 486.286 clk:r System:r - - x1 (trace:4.750) = 4.750 8.147 13.714 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[7]
4507 486.286 clk:r System:r - - x1 (trace:4.750) = 4.750 8.147 13.714 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[6]
4508 486.292 clk:r clk:r - FB1_uA x1: x1 (trace:5.048) + (trace:3.753) = 8.801 4.875 14.493 500.785 FB1.uD.dut_inst.memwb1.regwrite_out.Q FB1.uB.dut_inst.registers1.Registers_1[69].D REGWRITEWB: REGWRITEWB_aptn_ft
4509 486.297 clk:r System:r - - x1 (trace:4.750) = 4.750 8.137 13.704 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[13]
4510 486.297 clk:r System:r - - x1 (trace:4.750) = 4.750 8.137 13.704 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[10]
4511 486.297 clk:r System:r - - x1 (trace:4.750) = 4.750 8.137 13.704 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[11]
4512 486.298 clk:r System:r - - x1 (trace:4.750) = 4.750 8.136 13.702 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[12]
4513 486.308 clk:r System:r - - x1 (trace:5.039) = 5.039 7.837 13.693 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[56]
4514 486.310 clk:r System:r - - x1 (trace:5.039) = 5.039 7.835 13.690 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[57]
4515 486.333 clk:r System:r - - x1 (trace:4.750) = 4.750 8.100 13.667 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[21]
4516 486.333 clk:r System:r - - x1 (trace:4.750) = 4.750 8.100 13.667 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[18]
4517 486.333 clk:r System:r - - x1 (trace:4.750) = 4.750 8.100 13.667 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[19]
4518 486.334 clk:r System:r - - x1 (trace:5.039) = 5.039 7.811 13.666 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[58]
4519 486.334 clk:r System:r - - x1 (trace:4.750) = 4.750 8.099 13.666 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[20]
4520 486.346 clk:r System:r - - x1 (trace:5.039) = 5.039 7.799 13.654 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[59]
4521 486.348 clk:r System:r - - x1 (trace:4.750) = 4.750 8.085 13.652 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[24]
4522 486.360 clk:r System:r - - x1 (trace:4.750) = 4.750 8.074 13.641 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[22]
4523 486.360 clk:r System:r - - x1 (trace:4.750) = 4.750 8.074 13.641 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[23]
4524 486.384 clk:r System:r - - x1 (trace:5.039) = 5.039 7.760 13.616 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[61]
4525 486.386 clk:r System:r - - x1 (trace:5.039) = 5.039 7.759 13.615 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[60]
4526 486.432 clk:r System:r - - x1 (trace:5.039) = 5.039 7.712 13.568 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[62]
4527 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[20].Q equal.equal INSTRUCID[20]
4528 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[21].Q equal.equal INSTRUCID[21]
4529 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[22].Q equal.equal INSTRUCID[22]
4530 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[23].Q equal.equal INSTRUCID[23]
4531 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[16].Q equal.equal INSTRUCID[16]
4532 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[18].Q equal.equal INSTRUCID[18]
4533 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[17].Q equal.equal INSTRUCID[17]
4534 486.702 clk:r System:r - - x1 (trace:5.039) = 5.039 6.144 13.298 500.000 FB1.uA.dut_inst.ifid1.out_instruc[15].Q equal.equal INSTRUCID[15]
4535 486.943 clk:r System:r - - x1 (trace:5.039) = 5.039 5.902 13.057 500.000 FB1.uA.dut_inst.ifid1.out_instruc[0].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[0]
4536 486.943 clk:r System:r - - x1 (trace:5.039) = 5.039 5.902 13.057 500.000 FB1.uA.dut_inst.ifid1.out_instruc[1].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[1]
4537 486.950 clk:r System:r - - x1 (trace:5.039) = 5.039 7.194 13.050 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[63] WRITEDATAWB_aptn_s[63]
4538 486.956 clk:r System:r - - x1 (trace:5.039) = 5.039 5.889 13.044 500.000 FB1.uA.dut_inst.ifid1.out_instruc[3].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[3]
4539 486.956 clk:r System:r - - x1 (trace:5.039) = 5.039 5.889 13.044 500.000 FB1.uA.dut_inst.ifid1.out_instruc[5].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[5]
4540 486.956 clk:r System:r - - x1 (trace:5.039) = 5.039 5.889 13.044 500.000 FB1.uA.dut_inst.ifid1.out_instruc[2].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[2]
4541 487.084 clk:r System:r - - x1 (trace:5.039) = 5.039 5.761 12.916 500.000 FB1.uA.dut_inst.ifid1.out_instruc[6].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[6]
4542 487.140 clk:r System:r - - x1 (trace:5.039) = 5.039 5.705 12.860 500.000 FB1.uA.dut_inst.ifid1.out_instruc[24].Q equal.equal INSTRUCID[24]
4543 487.140 clk:r System:r - - x1 (trace:5.039) = 5.039 5.705 12.860 500.000 FB1.uA.dut_inst.ifid1.out_instruc[19].Q equal.equal INSTRUCID[19]
4544 487.169 clk:r System:r - - x1 (trace:5.039) = 5.039 5.677 12.831 500.000 FB1.uA.dut_inst.ifid1.out_instruc[4].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[4]
4545 487.309 clk:r System:r - - x1 (trace:3.753) = 3.753 8.122 12.692 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[16]
4546 487.311 clk:r System:r - - x1 (trace:3.753) = 3.753 8.120 12.689 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[17]
4547 487.320 clk:r System:r - - x1 (trace:3.753) = 3.753 8.111 12.680 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[14]
4548 487.320 clk:r System:r - - x1 (trace:3.753) = 3.753 8.111 12.680 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[15]
4549 487.348 clk:r System:r - - x1 (trace:3.753) = 3.753 8.083 12.652 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[25]
4550 487.367 clk:r System:r - - x1 (trace:3.753) = 3.753 8.064 12.633 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[29]
4551 487.367 clk:r System:r - - x1 (trace:3.753) = 3.753 8.064 12.633 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[26]
4552 487.367 clk:r System:r - - x1 (trace:3.753) = 3.753 8.064 12.633 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[27]
4553 487.368 clk:r System:r - - x1 (trace:3.753) = 3.753 8.062 12.632 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[28]
4554 487.382 clk:r System:r - - x1 (trace:3.753) = 3.753 8.049 12.618 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[32]
4555 487.384 clk:r System:r - - x1 (trace:3.753) = 3.753 8.046 12.616 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[33]
4556 487.393 clk:r System:r - - x1 (trace:3.753) = 3.753 8.037 12.607 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[31]
4557 487.393 clk:r System:r - - x1 (trace:3.753) = 3.753 8.037 12.607 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[30]
4558 487.403 clk:r System:r - - x1 (trace:3.753) = 3.753 8.027 12.597 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[35]
4559 487.403 clk:r System:r - - x1 (trace:3.753) = 3.753 8.027 12.597 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[37]
4560 487.403 clk:r System:r - - x1 (trace:3.753) = 3.753 8.027 12.597 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[34]
4561 487.405 clk:r System:r - - x1 (trace:3.753) = 3.753 8.026 12.596 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[36]
4562 487.418 clk:r System:r - - x1 (trace:3.753) = 3.753 8.012 12.582 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[40]
4563 487.430 clk:r System:r - - x1 (trace:3.753) = 3.753 8.001 12.570 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[38]
4564 487.430 clk:r System:r - - x1 (trace:3.753) = 3.753 8.001 12.570 500.000 FB1.uD.dut_inst.memwb1.memtoreg_out.Q ALUOUTEX[63:0].ALUOUTEX[62] WRITEDATAWB_aptn_s[39]
4565 487.522 clk:r System:r - - x1 (trace:5.039) = 5.039 5.323 12.478 500.000 FB1.uA.dut_inst.ifid1.out_instruc[8].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[8]
4566 487.541 clk:r System:r - - x1 (trace:5.039) = 5.039 5.304 12.459 500.000 FB1.uA.dut_inst.ifid1.out_instruc[10].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[10]
4567 487.541 clk:r System:r - - x1 (trace:5.039) = 5.039 5.304 12.459 500.000 FB1.uA.dut_inst.ifid1.out_instruc[9].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[9]
4568 487.543 clk:r System:r - - x1 (trace:5.039) = 5.039 5.303 12.457 500.000 FB1.uA.dut_inst.ifid1.out_instruc[11].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[11]
4569 487.747 clk:r System:r - - x1 (trace:5.039) = 5.039 5.099 12.253 500.000 FB1.uA.dut_inst.ifid1.out_instruc[7].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[7]
4570 487.800 clk:r System:r - - x1 (trace:5.039) = 5.039 5.046 12.200 500.000 FB1.uA.dut_inst.ifid1.out_instruc[25].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[25]
4571 487.881 clk:r System:r - - x1 (trace:5.146) = 5.146 4.751 12.119 500.000 FB1.uC.dut_inst.exmem1.aluout_out[17].Q equal.equal ALUOUTMEM[17]
4572 487.881 clk:r System:r - - x1 (trace:5.146) = 5.146 4.751 12.119 500.000 FB1.uC.dut_inst.exmem1.aluout_out[15].Q equal.equal ALUOUTMEM[15]
4573 487.881 clk:r System:r - - x1 (trace:5.146) = 5.146 4.751 12.119 500.000 FB1.uC.dut_inst.exmem1.aluout_out[16].Q equal.equal ALUOUTMEM[16]
4574 487.882 clk:r System:r - - x1 (trace:5.146) = 5.146 4.750 12.118 500.000 FB1.uC.dut_inst.exmem1.aluout_out[13].Q equal.equal ALUOUTMEM[13]
4575 487.882 clk:r System:r - - x1 (trace:5.146) = 5.146 4.750 12.118 500.000 FB1.uC.dut_inst.exmem1.aluout_out[14].Q equal.equal ALUOUTMEM[14]
4576 487.896 clk:r System:r - - x1 (trace:5.146) = 5.146 4.736 12.104 500.000 FB1.uC.dut_inst.exmem1.aluout_out[24].Q equal.equal ALUOUTMEM[24]
4577 487.896 clk:r System:r - - x1 (trace:5.146) = 5.146 4.736 12.104 500.000 FB1.uC.dut_inst.exmem1.aluout_out[26].Q equal.equal ALUOUTMEM[26]
4578 487.896 clk:r System:r - - x1 (trace:5.146) = 5.146 4.736 12.104 500.000 FB1.uC.dut_inst.exmem1.aluout_out[25].Q equal.equal ALUOUTMEM[25]
4579 487.899 clk:r System:r - - x1 (trace:5.146) = 5.146 4.734 12.101 500.000 FB1.uC.dut_inst.exmem1.aluout_out[27].Q equal.equal ALUOUTMEM[27]
4580 487.899 clk:r System:r - - x1 (trace:5.146) = 5.146 4.734 12.101 500.000 FB1.uC.dut_inst.exmem1.aluout_out[29].Q equal.equal ALUOUTMEM[29]
4581 487.899 clk:r System:r - - x1 (trace:5.146) = 5.146 4.734 12.101 500.000 FB1.uC.dut_inst.exmem1.aluout_out[28].Q equal.equal ALUOUTMEM[28]
4582 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[20].Q equal.equal ALUOUTMEM[20]
4583 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[23].Q equal.equal ALUOUTMEM[23]
4584 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[21].Q equal.equal ALUOUTMEM[21]
4585 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[19].Q equal.equal ALUOUTMEM[19]
4586 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[22].Q equal.equal ALUOUTMEM[22]
4587 487.908 clk:r System:r - - x1 (trace:5.146) = 5.146 4.725 12.093 500.000 FB1.uC.dut_inst.exmem1.aluout_out[18].Q equal.equal ALUOUTMEM[18]
4588 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[32].Q equal.equal ALUOUTMEM[32]
4589 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[35].Q equal.equal ALUOUTMEM[35]
4590 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[39].Q equal.equal ALUOUTMEM[39]
4591 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[34].Q equal.equal ALUOUTMEM[34]
4592 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[41].Q equal.equal ALUOUTMEM[41]
4593 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[30].Q equal.equal ALUOUTMEM[30]
4594 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[40].Q equal.equal ALUOUTMEM[40]
4595 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[31].Q equal.equal ALUOUTMEM[31]
4596 487.918 clk:r System:r - - x1 (trace:5.146) = 5.146 4.714 12.082 500.000 FB1.uC.dut_inst.exmem1.aluout_out[33].Q equal.equal ALUOUTMEM[33]
4597 487.919 clk:r System:r - - x1 (trace:5.146) = 5.146 4.713 12.081 500.000 FB1.uC.dut_inst.exmem1.aluout_out[37].Q equal.equal ALUOUTMEM[37]
4598 487.919 clk:r System:r - - x1 (trace:5.146) = 5.146 4.713 12.081 500.000 FB1.uC.dut_inst.exmem1.aluout_out[36].Q equal.equal ALUOUTMEM[36]
4599 487.919 clk:r System:r - - x1 (trace:5.146) = 5.146 4.713 12.081 500.000 FB1.uC.dut_inst.exmem1.aluout_out[38].Q equal.equal ALUOUTMEM[38]
4600 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[46].Q equal.equal ALUOUTMEM[46]
4601 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[44].Q equal.equal ALUOUTMEM[44]
4602 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[43].Q equal.equal ALUOUTMEM[43]
4603 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[42].Q equal.equal ALUOUTMEM[42]
4604 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[45].Q equal.equal ALUOUTMEM[45]
4605 487.944 clk:r System:r - - x1 (trace:5.146) = 5.146 4.688 12.056 500.000 FB1.uC.dut_inst.exmem1.aluout_out[47].Q equal.equal ALUOUTMEM[47]
4606 487.965 clk:r System:r - - x1 (trace:5.146) = 5.146 4.667 12.035 500.000 FB1.uC.dut_inst.exmem1.aluout_out[48].Q equal.equal ALUOUTMEM[48]
4607 487.965 clk:r System:r - - x1 (trace:5.146) = 5.146 4.667 12.035 500.000 FB1.uC.dut_inst.exmem1.aluout_out[50].Q equal.equal ALUOUTMEM[50]
4608 487.965 clk:r System:r - - x1 (trace:5.146) = 5.146 4.667 12.035 500.000 FB1.uC.dut_inst.exmem1.aluout_out[49].Q equal.equal ALUOUTMEM[49]
4609 487.967 clk:r System:r - - x1 (trace:5.146) = 5.146 4.665 12.033 500.000 FB1.uC.dut_inst.exmem1.aluout_out[52].Q equal.equal ALUOUTMEM[52]
4610 487.967 clk:r System:r - - x1 (trace:5.146) = 5.146 4.665 12.033 500.000 FB1.uC.dut_inst.exmem1.aluout_out[53].Q equal.equal ALUOUTMEM[53]
4611 487.967 clk:r System:r - - x1 (trace:5.146) = 5.146 4.665 12.033 500.000 FB1.uC.dut_inst.exmem1.aluout_out[51].Q equal.equal ALUOUTMEM[51]
4612 487.988 clk:r System:r - - x1 (trace:5.039) = 5.039 4.751 12.012 500.000 FB1.uC.dut_inst.exmem1.aluout_out[11].Q equal.equal ALUOUTMEM[11]
4613 487.989 clk:r System:r - - x1 (trace:5.039) = 5.039 4.750 12.011 500.000 FB1.uC.dut_inst.exmem1.aluout_out[12].Q equal.equal ALUOUTMEM[12]
4614 487.991 clk:r System:r - - x1 (trace:5.146) = 5.146 4.641 12.009 500.000 FB1.uC.dut_inst.exmem1.aluout_out[55].Q equal.equal ALUOUTMEM[55]
4615 487.991 clk:r System:r - - x1 (trace:5.146) = 5.146 4.641 12.009 500.000 FB1.uC.dut_inst.exmem1.aluout_out[54].Q equal.equal ALUOUTMEM[54]
4616 487.991 clk:r System:r - - x1 (trace:5.146) = 5.146 4.641 12.009 500.000 FB1.uC.dut_inst.exmem1.aluout_out[56].Q equal.equal ALUOUTMEM[56]
4617 488.001 clk:r System:r - - x1 (trace:5.146) = 5.146 4.631 11.999 500.000 FB1.uC.dut_inst.exmem1.aluout_out[57].Q equal.equal ALUOUTMEM[57]
4618 488.001 clk:r System:r - - x1 (trace:5.146) = 5.146 4.631 11.999 500.000 FB1.uC.dut_inst.exmem1.aluout_out[59].Q equal.equal ALUOUTMEM[59]
4619 488.001 clk:r System:r - - x1 (trace:5.146) = 5.146 4.631 11.999 500.000 FB1.uC.dut_inst.exmem1.aluout_out[58].Q equal.equal ALUOUTMEM[58]
4620 488.187 clk:r System:r - - x1 (trace:5.039) = 5.039 4.658 11.813 500.000 FB1.uA.dut_inst.ifid1.out_instruc[26].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[26]
4621 488.194 clk:r System:r - - x1 (trace:5.039) = 5.039 4.651 11.806 500.000 FB1.uA.dut_inst.ifid1.out_instruc[29].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[29]
4622 488.194 clk:r System:r - - x1 (trace:5.039) = 5.039 4.651 11.806 500.000 FB1.uA.dut_inst.ifid1.out_instruc[28].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[28]
4623 488.222 clk:r System:r - - x1 (trace:5.039) = 5.039 4.623 11.778 500.000 FB1.uA.dut_inst.ifid1.out_instruc[31].Q ADDOUTID[63:0].ADDOUTID[62] INSTRUCID[31]
4624 488.637 clk:r System:r - - x1 (trace:5.146) = 5.146 4.101 11.363 500.000 FB1.uC.dut_inst.exmem1.memread_out.Q DMout[63:0].DMout[1] MEMREADMEM
4625 488.660 clk:r clk:r - - x1 (trace:5.039) = 5.039 4.925 12.125 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[3].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRWB_aptn_s[3]
4626 488.660 clk:r clk:r - - x1 (trace:5.039) = 5.039 4.925 12.125 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[1].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRWB_aptn_s[1]
4627 488.660 clk:r clk:r - - x1 (trace:5.039) = 5.039 4.925 12.125 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[0].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRWB_aptn_s[0]
4628 488.660 clk:r clk:r - - x1 (trace:5.039) = 5.039 4.925 12.125 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[2].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRWB_aptn_s[2]
4629 488.660 clk:r clk:r - - x1 (trace:5.039) = 5.039 4.925 12.125 500.785 FB1.uD.dut_inst.memwb1.writeregister_out[4].Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRWB_aptn_s[4]
4630 488.935 clk:r clk:r - - x1 (trace:5.146) = 5.146 4.512 11.849 500.785 FB1.uD.dut_inst.memwb1.regwrite_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D REGWRITEWB_aptn_s
4631 489.191 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.608 71.568 500.737 FB1.uB.dut_inst.registers1.Registers_1[0].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE PCSRCID
4632 489.270 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.673 11.515 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[41]
4633 489.289 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.654 11.496 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[45]
4634 489.289 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.654 11.496 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[43]
4635 489.289 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.654 11.496 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[42]
4636 489.290 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.652 11.495 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[44]
4637 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[3].Q DMout[63:0].DMout[1] ALUOUTMEM[3]
4638 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[1].Q DMout[63:0].DMout[1] ALUOUTMEM[1]
4639 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[4].Q DMout[63:0].DMout[1] ALUOUTMEM[4]
4640 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[2].Q DMout[63:0].DMout[1] ALUOUTMEM[2]
4641 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[0].Q DMout[63:0].DMout[1] ALUOUTMEM[0]
4642 489.306 clk:r System:r - - x1 (trace:3.753) = 3.753 4.750 10.694 500.000 FB1.uC.dut_inst.exmem1.aluout_out[5].Q DMout[63:0].DMout[1] ALUOUTMEM[5]
4643 489.315 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.627 11.470 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[46]
4644 489.315 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.627 11.470 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[47]
4645 489.337 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.606 11.448 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[48]
4646 489.339 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.603 11.446 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[49]
4647 489.358 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.584 11.427 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[51]
4648 489.358 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.584 11.427 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[50]
4649 489.358 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.584 11.427 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[53]
4650 489.360 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.583 11.425 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[52]
4651 489.373 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.858 11.412 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[0]
4652 489.376 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.856 11.409 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[1]
4653 489.385 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.558 11.400 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[55]
4654 489.385 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.558 11.400 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[54]
4655 489.395 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.837 11.390 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[3]
4656 489.395 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.837 11.390 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[5]
4657 489.395 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.837 11.390 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[2]
4658 489.396 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.835 11.389 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[4]
4659 489.410 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.822 11.375 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[8]
4660 489.412 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.819 11.373 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[9]
4661 489.421 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.810 11.364 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[7]
4662 489.421 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.810 11.364 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[6]
4663 489.431 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.800 11.354 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[11]
4664 489.431 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.800 11.354 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[10]
4665 489.431 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.800 11.354 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[13]
4666 489.433 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.799 11.352 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[12]
4667 489.442 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.500 11.343 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[56]
4668 489.445 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.498 11.340 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[57]
4669 489.468 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.763 11.317 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[21]
4670 489.468 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.763 11.317 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[18]
4671 489.468 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.763 11.317 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[19]
4672 489.469 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.474 11.316 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[58]
4673 489.469 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.762 11.316 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[20]
4674 489.481 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.462 11.304 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[59]
4675 489.483 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.748 11.302 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[24]
4676 489.494 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.737 11.290 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[22]
4677 489.494 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.737 11.290 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[23]
4678 489.519 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.423 11.266 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[61]
4679 489.520 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.422 11.264 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[60]
4680 489.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 3.375 11.218 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[62]
4681 490.085 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.857 10.700 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[63].D WRITEDATAWB_aptn_s[63]
4682 490.443 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.785 10.341 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[16]
4683 490.446 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.783 10.339 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[17]
4684 490.455 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.774 10.330 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[15]
4685 490.455 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.774 10.330 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[14]
4686 490.482 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.746 10.303 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[25]
4687 490.502 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.727 10.283 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[27]
4688 490.502 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.727 10.283 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[26]
4689 490.502 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.727 10.283 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[29]
4690 490.503 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.726 10.282 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[28]
4691 490.517 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.712 10.268 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[32]
4692 490.519 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.709 10.266 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[33]
4693 490.528 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.700 10.257 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[31]
4694 490.528 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.700 10.257 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[30]
4695 490.538 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.690 10.247 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[34]
4696 490.538 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.690 10.247 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[37]
4697 490.538 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.690 10.247 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[35]
4698 490.539 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.689 10.245 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[36]
4699 490.553 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.675 10.232 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[40]
4700 490.565 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.664 10.220 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[39]
4701 490.565 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.664 10.220 500.785 FB1.uD.dut_inst.memwb1.memtoreg_out.Q FB1.uC.dut_inst.exmem1.aluout_out[62].D WRITEDATAWB_aptn_s[38]
4702 490.700 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.392 31.593 500.737 FB1.uB.dut_inst.idex1.writeregister_out[2].Q FB1.uA.dut_inst.ifid1.out_instruc[0].CE stall
4703 491.039 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.591 9.745 500.785 FB1.uA.dut_inst.ifid1.out_instruc[6].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[6]
4704 491.062 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.568 9.723 500.785 FB1.uA.dut_inst.ifid1.out_instruc[3].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[3]
4705 491.062 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.568 9.723 500.785 FB1.uA.dut_inst.ifid1.out_instruc[2].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[2]
4706 491.062 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.568 9.723 500.785 FB1.uA.dut_inst.ifid1.out_instruc[5].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[5]
4707 491.081 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.549 9.704 500.785 FB1.uA.dut_inst.ifid1.out_instruc[0].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[0]
4708 491.081 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.549 9.704 500.785 FB1.uA.dut_inst.ifid1.out_instruc[1].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[1]
4709 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[20].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D INSTRUCID[20]
4710 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[21].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D INSTRUCID[21]
4711 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[23].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D INSTRUCID[23]
4712 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[22].Q FB1.uB.dut_inst.idex1.readdata2_out[22].D INSTRUCID[22]
4713 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[16].Q FB1.uB.dut_inst.idex1.readdata1_out[26].D INSTRUCID[16]
4714 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[18].Q FB1.uB.dut_inst.idex1.readdata1_out[26].D INSTRUCID[18]
4715 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[15].Q FB1.uB.dut_inst.idex1.readdata1_out[26].D INSTRUCID[15]
4716 491.131 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.499 9.654 500.785 FB1.uA.dut_inst.ifid1.out_instruc[17].Q FB1.uB.dut_inst.idex1.readdata1_out[26].D INSTRUCID[17]
4717 491.342 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.288 9.443 500.785 FB1.uA.dut_inst.ifid1.out_instruc[4].Q FB1.uB.dut_inst.idex1.imm_out[9].D INSTRUCID[4]
4718 491.492 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.156 9.311 500.803 FB1.uA.dut_inst.ifid1.out_instruc[24].Q FB1.uB.dut_inst.idex1.alusrc_out.D INSTRUCID[24]
4719 491.492 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.156 9.311 500.803 FB1.uA.dut_inst.ifid1.out_instruc[19].Q FB1.uB.dut_inst.idex1.alusrc_out.D INSTRUCID[19]
4720 491.702 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.928 9.083 500.785 FB1.uA.dut_inst.ifid1.out_instruc[7].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[7]
4721 491.717 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.913 9.068 500.785 FB1.uA.dut_inst.ifid1.out_instruc[8].Q FB1.uB.dut_inst.idex1.imm_out[0].D INSTRUCID[8]
4722 491.747 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.883 9.038 500.785 FB1.uA.dut_inst.ifid1.out_instruc[11].Q FB1.uB.dut_inst.idex1.imm_out[4].D INSTRUCID[11]
4723 491.747 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.883 9.038 500.785 FB1.uA.dut_inst.ifid1.out_instruc[9].Q FB1.uB.dut_inst.idex1.imm_out[2].D INSTRUCID[9]
4724 491.747 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.883 9.038 500.785 FB1.uA.dut_inst.ifid1.out_instruc[10].Q FB1.uB.dut_inst.idex1.imm_out[3].D INSTRUCID[10]
4725 491.772 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.751 9.013 500.785 FB1.uC.dut_inst.exmem1.memread_out.Q FB1.uD.dut_inst.memwb1.dmout_out[61].D MEMREADMEM
4726 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[53].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[53]
4727 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[21].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[21]
4728 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[50].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[50]
4729 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[52].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[52]
4730 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[20].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[20]
4731 491.801 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.040 9.002 500.803 FB1.uC.dut_inst.exmem1.aluout_out[18].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[18]
4732 491.810 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.030 8.992 500.803 FB1.uC.dut_inst.exmem1.aluout_out[36].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[36]
4733 491.810 clk:r clk:r - - x1 (trace:5.146) = 5.146 3.030 8.992 500.803 FB1.uC.dut_inst.exmem1.aluout_out[35].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[35]
4734 491.926 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.914 8.877 500.803 FB1.uC.dut_inst.exmem1.aluout_out[32].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[32]
4735 491.926 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.914 8.877 500.803 FB1.uC.dut_inst.exmem1.aluout_out[30].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[30]
4736 491.926 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.914 8.877 500.803 FB1.uC.dut_inst.exmem1.aluout_out[33].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[33]
4737 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.539 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[10].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM[10]
4738 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.913 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[13].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[13]
4739 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.913 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[42].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[42]
4740 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.913 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[12].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[12]
4741 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.913 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[45].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[45]
4742 491.927 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.913 8.876 500.803 FB1.uC.dut_inst.exmem1.aluout_out[44].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[44]
4743 491.937 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.904 8.866 500.803 FB1.uC.dut_inst.exmem1.aluout_out[28].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[28]
4744 491.937 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.904 8.866 500.803 FB1.uC.dut_inst.exmem1.aluout_out[27].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[27]
4745 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.896 8.858 500.803 FB1.uC.dut_inst.exmem1.aluout_out[48].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[48]
4746 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.896 8.858 500.803 FB1.uC.dut_inst.exmem1.aluout_out[47].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[47]
4747 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.896 8.858 500.803 FB1.uC.dut_inst.exmem1.aluout_out[16].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[16]
4748 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.896 8.858 500.803 FB1.uC.dut_inst.exmem1.aluout_out[15].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[15]
4749 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.895 8.857 500.803 FB1.uC.dut_inst.exmem1.aluout_out[60].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[60]
4750 491.945 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.895 8.857 500.803 FB1.uC.dut_inst.exmem1.aluout_out[59].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[59]
4751 492.004 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.626 8.781 500.785 FB1.uA.dut_inst.ifid1.out_instruc[25].Q FB1.uB.dut_inst.idex1.imm_out[4].D INSTRUCID[25]
4752 492.034 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.914 8.769 500.803 FB1.uC.dut_inst.exmem1.aluout_out[62].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[62]
4753 492.034 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.914 8.769 500.803 FB1.uC.dut_inst.exmem1.aluout_out[63].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[63]
4754 492.035 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.596 8.750 500.785 FB1.uA.dut_inst.ifid1.out_instruc[31].Q FB1.uB.dut_inst.idex1.imm_out[11].D INSTRUCID[31]
4755 492.035 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.595 8.750 500.785 FB1.uA.dut_inst.ifid1.out_instruc[26].Q FB1.uB.dut_inst.idex1.imm_out[6].D INSTRUCID[26]
4756 492.035 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.595 8.750 500.785 FB1.uA.dut_inst.ifid1.out_instruc[29].Q FB1.uB.dut_inst.idex1.imm_out[8].D INSTRUCID[29]
4757 492.035 clk:r clk:r - - x1 (trace:5.039) = 5.039 1.595 8.750 500.785 FB1.uA.dut_inst.ifid1.out_instruc[28].Q FB1.uB.dut_inst.idex1.imm_out[8].D INSTRUCID[28]
4758 492.047 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.418 8.756 500.803 FB1.uC.dut_inst.exmem1.aluout_out[7].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM[7]
4759 492.047 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.418 8.756 500.803 FB1.uC.dut_inst.exmem1.aluout_out[8].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM[8]
4760 492.047 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.418 8.756 500.803 FB1.uC.dut_inst.exmem1.aluout_out[6].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM[6]
4761 492.047 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.418 8.756 500.803 FB1.uC.dut_inst.exmem1.aluout_out[9].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM[9]
4762 492.059 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.782 8.744 500.803 FB1.uC.dut_inst.exmem1.memwrite_out.Q FB1.uD.dut_inst.dm1.memory[70].D MEMWRITEMEM
4763 492.061 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.779 8.742 500.803 FB1.uC.dut_inst.exmem1.aluout_out[55].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[55]
4764 492.061 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.779 8.742 500.803 FB1.uC.dut_inst.exmem1.aluout_out[56].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[56]
4765 492.070 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.770 8.733 500.803 FB1.uC.dut_inst.exmem1.aluout_out[24].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[24]
4766 492.070 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.770 8.733 500.803 FB1.uC.dut_inst.exmem1.aluout_out[25].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[25]
4767 492.079 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.761 8.723 500.803 FB1.uC.dut_inst.exmem1.aluout_out[38].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[38]
4768 492.079 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.761 8.723 500.803 FB1.uC.dut_inst.exmem1.aluout_out[40].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[40]
4769 492.178 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.058 8.625 500.803 FB1.uC.dut_inst.exmem1.aluout_out[37].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[37]
4770 492.178 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.058 8.625 500.803 FB1.uC.dut_inst.exmem1.aluout_out[34].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[34]
4771 492.188 clk:r clk:r - - x1 (trace:4.750) = 4.750 3.049 8.615 500.803 FB1.uC.dut_inst.exmem1.aluout_out[19].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[19]
4772 492.304 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.932 8.499 500.803 FB1.uC.dut_inst.exmem1.aluout_out[29].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[29]
4773 492.304 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.932 8.499 500.803 FB1.uC.dut_inst.exmem1.aluout_out[26].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[26]
4774 492.305 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.931 8.498 500.803 FB1.uC.dut_inst.exmem1.aluout_out[31].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[31]
4775 492.308 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.109 8.476 500.785 FB1.uC.dut_inst.exmem1.writeregister_out[1].Q FB1.uD.dut_inst.memwb1.writeregister_out[1].D WRMEM[1]
4776 492.308 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.109 8.476 500.785 FB1.uC.dut_inst.exmem1.writeregister_out[0].Q FB1.uD.dut_inst.memwb1.writeregister_out[0].D WRMEM[0]
4777 492.308 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.109 8.476 500.785 FB1.uC.dut_inst.exmem1.writeregister_out[2].Q FB1.uD.dut_inst.memwb1.writeregister_out[2].D WRMEM[2]
4778 492.308 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.109 8.476 500.785 FB1.uC.dut_inst.exmem1.writeregister_out[4].Q FB1.uD.dut_inst.memwb1.writeregister_out[4].D WRMEM[4]
4779 492.308 clk:r clk:r - - x1 (trace:5.146) = 5.146 1.109 8.476 500.785 FB1.uC.dut_inst.exmem1.writeregister_out[3].Q FB1.uD.dut_inst.memwb1.writeregister_out[3].D WRMEM[3]
4780 492.314 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.922 8.489 500.803 FB1.uC.dut_inst.exmem1.aluout_out[11].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[11]
4781 492.332 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.905 8.471 500.803 FB1.uC.dut_inst.exmem1.aluout_out[14].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[14]
4782 492.384 clk:r clk:r - - x1 (trace:5.146) = 5.146 2.438 8.401 500.785 FB1.uC.dut_inst.exmem1.regwrite_out.Q FB1.uD.dut_inst.memwb1.regwrite_out.D REGWRITEMEM
4783 492.433 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.803 8.370 500.803 FB1.uC.dut_inst.exmem1.aluout_out[23].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[23]
4784 492.433 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.803 8.370 500.803 FB1.uC.dut_inst.exmem1.aluout_out[22].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[22]
4785 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[3].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[3]
4786 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[2].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[2]
4787 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[4].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[4]
4788 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[5].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[5]
4789 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[0].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[0]
4790 492.441 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.400 8.344 500.785 FB1.uC.dut_inst.exmem1.aluout_out[1].Q FB1.uD.dut_inst.memwb1.dmout_out[61].D ALUOUTMEM[1]
4791 492.458 clk:r clk:r - - x1 (trace:4.750) = 4.750 2.778 8.344 500.803 FB1.uC.dut_inst.exmem1.aluout_out[39].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[39]
4792 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[25].Q FB1.uD.dut_inst.dm1.memory[25].D RD2MEM[25]
4793 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[15].Q FB1.uD.dut_inst.dm1.memory[15].D RD2MEM[15]
4794 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[12].Q FB1.uD.dut_inst.dm1.memory[12].D RD2MEM[12]
4795 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[47].Q FB1.uD.dut_inst.dm1.memory[47].D RD2MEM[47]
4796 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[60].Q FB1.uD.dut_inst.dm1.memory[60].D RD2MEM[60]
4797 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[49].Q FB1.uD.dut_inst.dm1.memory[49].D RD2MEM[49]
4798 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[5].Q FB1.uD.dut_inst.dm1.memory[5].D RD2MEM[5]
4799 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[63].Q FB1.uD.dut_inst.dm1.memory[63].D RD2MEM[63]
4800 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[3].Q FB1.uD.dut_inst.dm1.memory[3].D RD2MEM[3]
4801 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[27].Q FB1.uD.dut_inst.dm1.memory[27].D RD2MEM[27]
4802 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[35].Q FB1.uD.dut_inst.dm1.memory[35].D RD2MEM[35]
4803 492.567 clk:r clk:r - - x1 (trace:5.039) = 5.039 2.362 8.218 500.785 FB1.uC.dut_inst.exmem1.readdata2_out[40].Q FB1.uD.dut_inst.dm1.memory[40].D RD2MEM[40]
4804 493.185 clk:r clk:r - - x1 (trace:3.753) = 3.753 3.049 7.618 500.803 FB1.uC.dut_inst.exmem1.aluout_out[51].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[51]
4805 493.310 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.923 7.493 500.803 FB1.uC.dut_inst.exmem1.aluout_out[58].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[58]
4806 493.310 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.923 7.493 500.803 FB1.uC.dut_inst.exmem1.aluout_out[61].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[61]
4807 493.311 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.922 7.492 500.803 FB1.uC.dut_inst.exmem1.aluout_out[43].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[43]
4808 493.312 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.922 7.491 500.803 FB1.uC.dut_inst.exmem1.aluout_out[17].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[17]
4809 493.312 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.922 7.491 500.803 FB1.uC.dut_inst.exmem1.aluout_out[49].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[49]
4810 493.312 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.922 7.491 500.803 FB1.uC.dut_inst.exmem1.aluout_out[46].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[46]
4811 493.421 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.812 7.381 500.803 FB1.uC.dut_inst.exmem1.aluout_out[57].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[57]
4812 493.421 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.812 7.381 500.803 FB1.uC.dut_inst.exmem1.aluout_out[54].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[54]
4813 493.440 clk:r clk:r - - x1 (trace:3.753) = 3.753 2.793 7.363 500.803 FB1.uC.dut_inst.exmem1.aluout_out[41].Q FB1.uD.dut_inst.dm1.memory[70].D ALUOUTMEM_aptn_s[41]
4814 494.715 clk:r clk:r - - x1 (trace:5.146) = 5.146 0.000 5.283 499.998 FB1.uB.dut_inst.aptn_reset_sync_rst_n_6.Q[0] FB1.uC.dut_inst.aptn_reset_sync_rst_n_2.D[0] rst_n_aptn_ft
4815 494.813 clk:r clk:r - - x1 (trace:5.048) = 5.048 0.000 5.185 499.998 FB1.uA.dut_inst.aptn_reset_sync_rst_n_10.Q[0] FB1.uD.dut_inst.aptn_reset_sync_rst_n_5.D[0] rst_n_aptn_s
4816 496.108 clk:r clk:r - - x1 (trace:3.753) = 3.753 0.000 3.890 499.998 FB1.uA.dut_inst.aptn_reset_sync_rst_n_9.Q[0] FB1.uB.dut_inst.aptn_reset_sync_rst_n_5.D[0] rst_n
==================================================================================================================================================================================================================================================================================================================================================================================================================================================
Path: #1
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #2
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #3
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #4
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #5
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #6
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #7
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #8
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.170
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #9
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.312
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #10
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 429.312
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #11
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #12
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #13
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #14
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #15
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #16
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #17
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #18
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.097
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #19
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.239
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #20
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 430.239
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
========================================================================================================================
Path: #21
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #22
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #23
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #24
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #25
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #26
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #27
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #28
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.533
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #29
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.675
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #30
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 434.675
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
========================================================================================================================
Path: #31
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #32
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #33
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #34
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #35
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #36
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #37
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #38
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.460
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #39
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.602
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #40
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 435.602
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
========================================================================================================================
Path: #41
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #42
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #43
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #44
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #45
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #46
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #47
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #48
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #49
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #50
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.643
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #51
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.938
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #52
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 451.938
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #53
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #54
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #55
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #56
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #57
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #58
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #59
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #60
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #61
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #62
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.006
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #63
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.301
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #64
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 457.301
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #65
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 458.144
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #66
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 458.144
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #67
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 459.070
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #68
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 459.070
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================================================
Path: #69
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[62]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 460.619
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[62] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_2 (ALUOUTMEM[62]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=========================================================================================================================
Path: #70
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[60]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 460.619
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[60] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_0 (ALUOUTMEM[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=========================================================================================================================
Path: #71
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[61]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 460.619
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[61] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_1 (ALUOUTMEM[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=========================================================================================================================
Path: #72
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[63]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 460.697
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[63] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_3 (ALUOUTMEM[63]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=========================================================================================================================
Path: #73
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.235
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #74
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.236
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #75
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.274
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
==========================================================================================================================
Path: #76
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.275
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
==========================================================================================================================
Path: #77
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.283
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
==========================================================================================================================
Path: #78
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.284
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
==========================================================================================================================
Path: #79
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.285
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #80
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #81
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.313
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #82
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.314
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #83
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.319
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #84
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.323
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #85
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.325
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
==========================================================================================================================
Path: #86
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #87
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #88
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #89
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #90
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #91
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #92
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.334
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
==========================================================================================================================
Path: #93
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.334
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #94
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.334
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #95
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #96
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.341
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #97
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.342
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #98
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.344
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #99
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.345
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
==========================================================================================================================
Path: #100
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.354
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
==========================================================================================================================
Path: #101
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.355
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #102
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #103
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.358
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #104
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.358
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
==========================================================================================================================
Path: #105
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.359
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #106
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.359
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #107
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.362
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
==========================================================================================================================
Path: #108
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.362
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #109
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.364
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #110
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.367
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
==========================================================================================================================
Path: #111
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.371
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
==========================================================================================================================
Path: #112
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.376
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #113
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.379
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #114
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.379
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
==========================================================================================================================
Path: #115
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.379
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #116
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.381
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #117
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.383
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #118
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.383
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #119
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.383
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #120
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.384
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
==========================================================================================================================
Path: #121
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.384
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #122
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.384
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #123
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.388
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
==========================================================================================================================
Path: #124
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.392
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #125
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.392
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #126
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.393
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
==========================================================================================================================
Path: #127
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.394
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
==========================================================================================================================
Path: #128
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.395
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
==========================================================================================================================
Path: #129
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.395
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #130
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.396
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #131
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.397
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
==========================================================================================================================
Path: #132
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.398
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #133
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.398
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
==========================================================================================================================
Path: #134
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.399
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
==========================================================================================================================
Path: #135
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.401
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #136
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.401
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
==========================================================================================================================
Path: #137
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #138
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
==========================================================================================================================
Path: #139
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #140
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #141
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.404
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
==========================================================================================================================
Path: #142
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.405
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #143
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.406
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
==========================================================================================================================
Path: #144
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.407
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
==========================================================================================================================
Path: #145
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.408
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
==========================================================================================================================
Path: #146
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.410
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
==========================================================================================================================
Path: #147
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.412
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #148
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.415
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #149
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.415
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
==========================================================================================================================
Path: #150
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.416
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #151
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.417
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #152
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.417
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #153
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.417
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #154
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.418
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #155
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.418
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
==========================================================================================================================
Path: #156
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.418
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #157
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.418
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #158
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.418
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
==========================================================================================================================
Path: #159
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.420
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
==========================================================================================================================
Path: #160
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.420
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #161
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.420
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #162
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.420
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #163
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.422
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #164
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.423
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #165
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.424
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
==========================================================================================================================
Path: #166
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.425
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #167
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.427
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
==========================================================================================================================
Path: #168
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.427
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
==========================================================================================================================
Path: #169
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.428
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #170
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.429
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #171
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.429
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #172
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.429
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
==========================================================================================================================
Path: #173
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.431
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
==========================================================================================================================
Path: #174
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.432
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #175
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.433
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #176
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.434
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #177
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.434
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #178
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.435
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
==========================================================================================================================
Path: #179
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.435
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
==========================================================================================================================
Path: #180
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.436
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #181
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.437
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #182
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.437
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #183
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.437
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #184
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.437
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #185
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.438
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #186
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.438
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #187
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.440
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
==========================================================================================================================
Path: #188
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #189
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.442
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #190
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.442
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #191
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.442
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #192
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #193
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #194
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #195
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.444
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
==========================================================================================================================
Path: #196
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.444
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
==========================================================================================================================
Path: #197
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.445
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #198
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #199
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #200
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.449
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #201
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.451
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #202
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.452
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #203
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.452
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #204
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #205
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #206
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #207
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #208
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #209
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #210
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #211
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #212
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #213
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
==========================================================================================================================
Path: #214
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #215
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.454
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #216
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.455
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #217
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.455
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
==========================================================================================================================
Path: #218
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #219
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #220
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #221
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #222
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #223
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.456
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #224
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
==========================================================================================================================
Path: #225
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #226
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #227
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #228
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #229
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.457
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #230
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.458
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #231
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.458
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #232
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.458
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #233
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.459
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #234
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.460
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #235
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.460
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #236
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.460
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #237
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.461
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #238
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.461
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #239
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.462
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #240
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.463
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
==========================================================================================================================
Path: #241
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.464
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
==========================================================================================================================
Path: #242
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.464
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #243
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.464
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #244
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.464
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #245
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.464
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #246
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.465
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #247
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.465
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #248
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.465
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #249
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.465
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #250
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #251
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #252
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #253
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
==========================================================================================================================
Path: #254
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #255
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
==========================================================================================================================
Path: #256
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
==========================================================================================================================
Path: #257
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #258
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.469
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #259
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.470
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #260
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.471
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
==========================================================================================================================
Path: #261
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.471
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #262
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.472
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
==========================================================================================================================
Path: #263
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.474
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #264
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.474
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #265
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.474
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #266
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.474
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #267
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.474
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #268
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.475
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #269
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.476
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #270
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.476
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #271
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.476
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #272
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
==========================================================================================================================
Path: #273
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #274
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #275
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #276
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
==========================================================================================================================
Path: #277
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.477
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #278
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.478
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #279
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.478
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #280
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.478
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #281
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.478
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #282
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.479
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #283
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.480
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #284
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.480
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #285
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.480
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
==========================================================================================================================
Path: #286
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.481
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
==========================================================================================================================
Path: #287
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.482
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #288
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.482
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #289
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.482
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #290
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.485
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #291
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.485
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #292
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.486
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #293
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.487
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #294
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.488
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #295
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.489
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
==========================================================================================================================
Path: #296
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.489
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #297
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.489
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #298
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.489
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #299
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.489
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #300
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.490
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #301
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #302
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #303
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #304
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
==========================================================================================================================
Path: #305
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #306
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.491
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #307
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.492
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
==========================================================================================================================
Path: #308
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #309
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #310
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #311
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #312
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
==========================================================================================================================
Path: #313
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #314
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #315
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #316
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #317
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #318
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #319
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.495
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #320
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.496
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #321
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.496
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #322
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.498
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
==========================================================================================================================
Path: #323
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.498
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #324
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.500
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
==========================================================================================================================
Path: #325
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.501
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
==========================================================================================================================
Path: #326
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.501
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #327
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.501
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #328
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.501
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #329
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #330
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #331
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #332
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #333
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #334
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #335
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #336
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
==========================================================================================================================
Path: #337
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.503
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #338
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.505
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #339
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.505
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
==========================================================================================================================
Path: #340
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.505
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #341
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.507
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #342
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.507
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #343
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.508
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
==========================================================================================================================
Path: #344
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.510
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #345
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.511
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #346
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #347
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #348
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #349
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #350
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #351
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.513
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #352
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.514
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #353
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.514
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
==========================================================================================================================
Path: #354
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.514
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #355
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.514
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #356
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #357
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #358
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #359
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #360
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #361
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #362
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.516
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #363
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.516
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #364
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.516
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #365
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.516
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #366
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.517
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #367
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.517
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
==========================================================================================================================
Path: #368
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.518
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #369
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #370
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.520
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
==========================================================================================================================
Path: #371
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.521
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #372
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.522
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #373
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.524
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #374
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.525
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #375
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.525
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
==========================================================================================================================
Path: #376
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #377
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #378
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #379
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #380
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #381
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.526
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #382
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.527
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #383
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.527
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #384
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.527
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #385
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.527
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #386
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
==========================================================================================================================
Path: #387
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #388
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #389
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #390
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #391
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.528
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
==========================================================================================================================
Path: #392
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.529
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #393
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #394
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #395
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #396
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #397
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
==========================================================================================================================
Path: #398
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #399
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #400
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #401
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.530
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #402
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.531
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #403
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.531
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #404
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.531
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #405
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.531
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #406
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.532
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #407
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.533
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #408
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.533
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #409
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.534
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
==========================================================================================================================
Path: #410
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #411
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #412
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #413
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #414
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #415
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.536
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #416
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.537
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
==========================================================================================================================
Path: #417
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.537
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
==========================================================================================================================
Path: #418
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #419
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #420
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #421
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #422
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #423
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #424
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #425
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.538
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #426
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.539
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #427
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.539
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #428
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.539
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
==========================================================================================================================
Path: #429
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.539
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #430
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.541
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
==========================================================================================================================
Path: #431
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.541
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #432
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.541
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #433
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.542
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #434
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.544
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #435
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.544
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
==========================================================================================================================
Path: #436
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.547
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #437
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.547
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #438
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.547
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #439
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.547
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #440
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.547
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #441
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.548
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #442
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #443
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #444
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #445
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #446
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #447
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.549
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #448
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
==========================================================================================================================
Path: #449
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #450
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #451
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #452
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #453
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #454
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #455
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #456
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.550
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #457
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.551
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #458
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.551
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #459
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.551
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #460
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.551
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #461
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #462
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #463
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #464
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #465
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #466
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #467
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.552
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #468
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #469
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #470
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #471
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #472
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #473
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
==========================================================================================================================
Path: #474
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.553
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #475
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.555
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #476
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.555
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #477
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.555
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #478
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.556
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #479
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.558
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #480
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.559
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #481
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.559
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #482
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.560
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #483
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.562
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #484
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.562
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #485
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.563
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #486
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.563
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #487
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.563
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #488
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.563
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #489
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #490
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #491
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #492
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #493
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #494
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #495
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.564
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #496
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.565
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #497
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.565
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #498
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.565
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #499
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #500
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #501
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #502
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #503
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #504
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #505
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #506
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #507
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #508
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #509
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #510
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #511
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #512
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.568
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #513
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #514
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #515
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #516
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #517
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #518
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #519
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #520
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #521
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.569
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #522
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.570
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #523
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.570
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #524
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.570
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #525
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.570
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #526
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.570
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #527
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #528
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #529
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #530
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #531
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #532
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.573
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #533
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #534
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #535
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #536
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #537
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #538
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #539
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #540
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #541
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #542
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #543
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #544
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #545
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #546
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #547
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #548
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.575
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #549
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #550
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.577
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #551
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 462.578
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
====================================================================================================================
Path: #552
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.578
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #553
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.578
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #554
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.578
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #555
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.579
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #556
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.579
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #557
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.579
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #558
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.580
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #559
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.581
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #560
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #561
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #562
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #563
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #564
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #565
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.584
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #566
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #567
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #568
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #569
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #570
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #571
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #572
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #573
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #574
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #575
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.585
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #576
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #577
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #578
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #579
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #580
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #581
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #582
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #583
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #584
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #585
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #586
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #587
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #588
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #589
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #590
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #591
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #592
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #593
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.587
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #594
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #595
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #596
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #597
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #598
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #599
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #600
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #601
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #602
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #603
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.588
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #604
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #605
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #606
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #607
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #608
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #609
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #610
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #611
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #612
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #613
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #614
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #615
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #616
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #617
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #618
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.589
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #619
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #620
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #621
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #622
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #623
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.591
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #624
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.591
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #625
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #626
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #627
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #628
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #629
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #630
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #631
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.593
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #632
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #633
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
====================================================================================================================
Path: #634
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #635
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #636
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #637
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #638
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.597
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #639
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.598
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #640
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.598
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #641
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.598
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #642
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.598
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #643
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #644
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #645
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #646
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #647
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #648
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #649
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #650
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #651
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #652
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #653
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.600
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #654
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.601
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #655
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.601
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #656
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.601
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #657
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.601
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #658
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #659
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #660
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #661
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #662
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #663
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #664
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #665
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #666
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #667
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.604
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #668
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.604
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #669
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.604
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #670
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.604
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #671
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #672
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #673
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #674
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #675
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #676
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #677
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #678
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #679
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #680
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #681
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.606
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #682
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.607
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #683
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.607
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #684
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #685
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #686
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #687
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #688
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #689
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #690
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.608
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #691
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.609
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #692
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.609
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #693
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.609
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #694
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.609
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #695
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #696
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #697
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #698
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #699
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #700
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #701
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #702
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #703
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #704
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #705
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #706
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #707
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #708
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #709
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #710
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #711
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #712
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.611
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #713
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #714
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #715
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #716
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #717
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #718
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #719
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.612
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #720
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.613
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #721
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.614
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #722
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.614
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #723
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.614
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #724
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.614
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #725
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #726
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #727
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #728
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #729
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #730
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #731
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #732
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #733
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.618
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #734
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.618
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #735
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #736
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #737
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #738
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #739
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #740
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #741
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #742
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.621
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #743
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #744
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #745
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #746
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #747
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #748
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #749
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #750
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.622
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #751
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #752
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #753
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #754
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #755
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #756
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.623
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #757
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.624
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #758
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.624
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #759
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #760
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #761
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #762
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #763
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #764
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #765
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #766
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #767
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #768
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #769
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #770
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #771
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #772
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #773
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #774
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #775
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #776
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #777
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #778
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.625
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #779
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.626
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #780
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.626
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #781
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.626
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #782
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.626
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #783
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.627
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #784
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.627
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #785
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.627
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #786
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.628
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #787
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.628
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #788
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.628
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #789
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.632
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #790
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.632
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #791
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.632
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #792
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.632
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #793
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.634
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #794
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.634
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #795
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.634
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #796
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #797
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #798
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #799
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #800
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #801
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #802
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #803
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.636
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #804
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.636
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #805
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.636
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #806
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #807
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #808
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #809
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #810
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #811
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #812
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #813
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #814
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #815
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #816
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.637
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #817
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.638
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #818
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.638
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #819
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.638
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #820
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #821
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #822
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #823
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #824
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #825
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #826
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #827
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #828
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #829
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #830
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #831
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #832
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #833
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #834
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.641
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #835
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #836
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #837
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #838
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #839
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #840
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #841
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #842
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #843
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.642
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #844
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #845
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #846
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #847
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #848
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #849
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.643
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #850
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #851
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #852
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #853
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #854
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #855
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #856
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #857
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #858
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #859
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #860
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #861
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #862
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.646
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #863
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.646
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #864
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.646
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #865
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.646
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #866
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #867
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #868
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #869
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #870
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #871
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #872
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #873
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #874
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #875
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #876
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #877
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #878
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #879
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #880
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #881
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #882
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #883
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #884
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #885
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #886
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #887
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #888
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #889
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #890
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #891
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #892
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #893
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #894
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #895
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #896
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #897
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #898
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #899
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #900
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.657
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #901
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.657
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #902
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.657
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #903
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.657
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #904
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #905
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #906
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #907
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #908
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #909
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #910
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #911
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #912
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #913
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #914
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #915
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #916
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #917
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #918
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #919
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #920
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #921
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #922
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.659
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #923
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.659
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #924
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.659
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #925
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.659
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #926
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #927
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #928
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #929
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #930
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #931
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #932
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #933
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #934
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #935
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #936
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #937
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #938
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.660
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #939
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #940
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #941
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #942
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #943
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #944
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #945
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #946
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #947
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #948
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #949
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #950
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #951
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #952
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #953
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #954
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #955
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #956
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #957
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #958
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #959
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #960
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #961
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #962
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #963
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #964
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #965
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #966
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #967
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #968
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #969
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #970
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #971
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #972
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #973
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #974
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #975
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #976
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #977
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.663
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #978
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.664
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #979
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.664
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #980
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.664
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #981
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.664
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #982
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.665
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #983
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #984
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #985
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #986
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #987
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #988
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.670
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #989
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #990
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #991
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #992
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #993
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #994
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #995
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #996
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #997
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #998
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #999
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #1000
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1001
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1002
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1003
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1004
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1005
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1006
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1007
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1008
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1009
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1010
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1011
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1012
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1013
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1014
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #1015
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1016
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1017
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1018
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1019
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1020
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1021
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1022
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1023
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1024
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1025
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.676
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1026
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.677
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1027
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.677
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1028
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.677
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1029
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.677
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1030
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1031
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1032
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1033
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1034
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1035
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1036
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1037
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1038
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1039
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1040
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1041
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1042
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1043
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1044
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1045
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1046
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1047
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1048
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1049
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1050
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1051
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1052
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1053
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1054
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1055
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1056
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1057
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1058
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1059
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1060
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1061
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1062
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1063
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1064
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1065
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1066
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1067
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1068
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1069
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1070
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1071
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.683
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1072
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.683
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1073
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.683
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1074
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.683
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #1075
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1076
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1077
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1078
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1079
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1080
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1081
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1082
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1083
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1084
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1085
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1086
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1087
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1088
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1089
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1090
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1091
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1092
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1093
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1094
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1095
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1096
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1097
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1098
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1099
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1100
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1101
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1102
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1103
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1104
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1105
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1106
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1107
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1108
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1109
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1110
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1111
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1112
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1113
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1114
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1115
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1116
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1117
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1118
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1119
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1120
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1121
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1122
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1123
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1124
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1125
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1126
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1127
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1128
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1129
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1130
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1131
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.694
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1132
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1133
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1134
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1135
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1136
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1137
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1138
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1139
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1140
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1141
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1142
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1143
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1144
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #1145
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1146
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1147
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1148
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1149
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1150
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1151
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1152
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1153
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1154
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1155
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1156
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1157
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1158
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1159
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.696
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1160
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1161
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1162
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1163
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1164
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 462.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
====================================================================================================================
Path: #1165
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1166
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1167
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1168
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1169
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1170
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1171
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1172
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1173
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1174
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1175
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1176
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.698
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1177
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1178
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1179
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1180
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1181
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1182
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1183
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1184
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1185
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1186
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1187
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1188
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1189
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1190
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1191
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1192
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1193
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1194
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1195
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1196
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1197
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1198
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1199
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1200
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1201
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1202
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1203
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1204
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1205
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1206
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.700
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1207
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.700
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1208
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.700
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1209
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.700
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1210
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #1211
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1212
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1213
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1214
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1215
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1216
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #1217
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #1218
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #1219
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1220
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1221
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1222
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1223
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1224
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1225
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1226
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.707
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #1227
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1228
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1229
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1230
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1231
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1232
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1233
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1234
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1235
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1236
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1237
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1238
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1239
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1240
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.708
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1241
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.709
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #1242
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1243
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1244
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1245
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1246
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1247
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1248
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1249
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1250
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1251
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.712
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #1252
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1253
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1254
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1255
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1256
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1257
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1258
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1259
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1260
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1261
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1262
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1263
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1264
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1265
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1266
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1267
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1268
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1269
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1270
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1271
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1272
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1273
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.715
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1274
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.716
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #1275
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 462.716
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
====================================================================================================================
Path: #1276
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.717
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1277
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.717
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1278
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.717
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1279
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.717
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1280
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1281
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1282
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1283
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1284
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1285
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1286
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1287
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1288
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1289
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1290
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1291
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1292
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1293
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1294
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1295
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1296
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1297
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1298
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1299
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1300
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1301
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1302
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1303
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.718
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1304
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.719
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1305
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.719
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1306
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.719
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1307
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.719
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1308
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1309
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1310
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1311
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1312
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1313
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1314
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1315
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1316
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1317
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1318
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1319
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1320
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1321
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1322
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1323
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1324
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1325
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1326
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1327
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1328
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1329
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1330
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1331
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1332
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1333
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1334
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1335
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1336
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1337
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1338
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1339
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1340
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1341
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1342
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1343
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1344
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1345
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1346
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.721
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1347
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1348
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1349
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1350
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1351
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1352
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1353
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1354
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1355
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1356
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1357
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1358
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1359
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1360
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1361
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1362
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1363
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.725
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1364
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.731
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #1365
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1366
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1367
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1368
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1369
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1370
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1371
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1372
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1373
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1374
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1375
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1376
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1377
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1378
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1379
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.735
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1380
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.736
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1381
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.736
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1382
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.736
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1383
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.736
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1384
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.736
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1385
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.737
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #1386
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.737
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #1387
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1388
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1389
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1390
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1391
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1392
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1393
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1394
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1395
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1396
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1397
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1398
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1399
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1400
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1401
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1402
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.742
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1403
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1404
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1405
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1406
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1407
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1408
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1409
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1410
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1411
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1412
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1413
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1414
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.744
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1415
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1416
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1417
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1418
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1419
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1420
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1421
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1422
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1423
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1424
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1425
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1426
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1427
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1428
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1429
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1430
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1431
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1432
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1433
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1434
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1435
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1436
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1437
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1438
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1439
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1440
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1441
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.748
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1442
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.748
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1443
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.748
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1444
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.748
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1445
Starting point: FB1.uA/dut_inst.ifid1.out_pc[60]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 462.754
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[60] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0 (PCID[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
====================================================================================================================
Path: #1446
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 462.755
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
====================================================================================================================
Path: #1447
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 462.755
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
====================================================================================================================
Path: #1448
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 462.755
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
====================================================================================================================
Path: #1449
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 462.756
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
====================================================================================================================
Path: #1450
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1451
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1452
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1453
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1454
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1455
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1456
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1457
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1458
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1459
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1460
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.764
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1461
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.764
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1462
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.764
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1463
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.764
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1464
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.766
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1465
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.766
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1466
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.766
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1467
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.766
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1468
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.767
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1469
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.767
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1470
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.767
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1471
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.767
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1472
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.769
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1473
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.769
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1474
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.769
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1475
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.769
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1476
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.772
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1477
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.772
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1478
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.772
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1479
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.772
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1480
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.777
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1481
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.777
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1482
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.777
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1483
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.777
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1484
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.779
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1485
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.779
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1486
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.779
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1487
Starting point: FB1.uA/dut_inst.ifid1.out_pc[60]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.779
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[60] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0 (PCID[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1488
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.782
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1489
Starting point: FB1.uA/dut_inst.ifid1.out_pc[60]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.782
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[60] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0 (PCID[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1490
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.782
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1491
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.782
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1492
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.790
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1493
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.790
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1494
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.790
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1495
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.790
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1496
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.802
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1497
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.802
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1498
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.802
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1499
Starting point: FB1.uA/dut_inst.ifid1.out_pc[60]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.802
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[60] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0 (PCID[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1500
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.808
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1501
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.808
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1502
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.808
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1503
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.808
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1504
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1505
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1506
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1507
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1508
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1509
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1510
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1511
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.810
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1512
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.812
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1513
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.812
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1514
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.812
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1515
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.812
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1516
Starting point: FB1.uA/dut_inst.ifid1.out_pc[62]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.814
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[62] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2 (PCID[62]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1517
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.814
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1518
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.814
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1519
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.814
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1520
Starting point: FB1.uA/dut_inst.ifid1.out_pc[61]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[61] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1 (PCID[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1521
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1522
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1523
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1524
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.819
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1525
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.819
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1526
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.819
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1527
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.819
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1528
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1529
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1530
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1531
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
====================================================================================================================
Path: #1532
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
====================================================================================================================
Path: #1533
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1534
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1535
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1536
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.828
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1537
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.831
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1538
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1539
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1540
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1541
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1542
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1543
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.838
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1544
Starting point: FB1.uA/dut_inst.ifid1.out_pc[61]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.838
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[61] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1 (PCID[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1545
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.838
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1546
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.838
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1547
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1548
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1549
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1550
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1551
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1552
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1553
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1554
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.844
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1555
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.848
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1556
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1557
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1558
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.853
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1559
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 462.861
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
====================================================================================================================
Path: #1560
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 462.861
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
====================================================================================================================
Path: #1561
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 462.861
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
====================================================================================================================
Path: #1562
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 462.861
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
====================================================================================================================
Path: #1563
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
====================================================================================================================
Path: #1564
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
====================================================================================================================
Path: #1565
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1566
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
====================================================================================================================
Path: #1567
Starting point: FB1.uA/dut_inst.ifid1.out_pc[63]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[63] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_3 (PCID[63]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
====================================================================================================================
Path: #1568
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
====================================================================================================================
Path: #1569
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
====================================================================================================================
Path: #1570
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1571
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
====================================================================================================================
Path: #1572
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
====================================================================================================================
Path: #1573
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
====================================================================================================================
Path: #1574
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
====================================================================================================================
Path: #1575
Starting point: FB1.uA/dut_inst.ifid1.out_pc[62]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[62] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2 (PCID[62]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
====================================================================================================================
Path: #1576
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
====================================================================================================================
Path: #1577
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
====================================================================================================================
Path: #1578
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
====================================================================================================================
Path: #1579
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 462.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
====================================================================================================================
Path: #1580
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
====================================================================================================================
Path: #1581
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
====================================================================================================================
Path: #1582
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
====================================================================================================================
Path: #1583
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
====================================================================================================================
Path: #1584
Starting point: FB1.uA/dut_inst.ifid1.out_pc[61]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[61] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1 (PCID[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
====================================================================================================================
Path: #1585
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
====================================================================================================================
Path: #1586
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
====================================================================================================================
Path: #1587
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
====================================================================================================================
Path: #1588
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 462.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
====================================================================================================================
Path: #1589
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.876
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
==========================================================================================================================
Path: #1590
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.880
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
==========================================================================================================================
Path: #1591
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 462.896
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1592
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.896
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
==========================================================================================================================
Path: #1593
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 462.897
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1594
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.899
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
==========================================================================================================================
Path: #1595
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.899
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
==========================================================================================================================
Path: #1596
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.899
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
==========================================================================================================================
Path: #1597
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 462.901
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1598
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.901
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
==========================================================================================================================
Path: #1599
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.903
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
==========================================================================================================================
Path: #1600
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.906
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1601
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.910
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1602
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 462.918
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
====================================================================================================================
Path: #1603
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
==========================================================================================================================
Path: #1604
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1605
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1606
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1607
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.927
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1608
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.927
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1609
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1610
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1611
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1612
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1613
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.930
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1614
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.930
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1615
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.931
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1616
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 462.934
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
====================================================================================================================
Path: #1617
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 462.938
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
====================================================================================================================
Path: #1618
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.946
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1619
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.946
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1620
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.946
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1621
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.947
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1622
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.948
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1623
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.948
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1624
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.948
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1625
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.949
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1626
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.949
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1627
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.949
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1628
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.949
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1629
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.950
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1630
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.951
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1631
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.951
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1632
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.951
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1633
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.952
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1634
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 462.954
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
====================================================================================================================
Path: #1635
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.957
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1636
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.957
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
====================================================================================================================
Path: #1637
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 462.959
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
====================================================================================================================
Path: #1638
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 462.962
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
====================================================================================================================
Path: #1639
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 462.966
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
====================================================================================================================
Path: #1640
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.973
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
==========================================================================================================================
Path: #1641
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 462.975
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1642
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 462.975
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1643
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 462.977
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
==========================================================================================================================
Path: #1644
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 462.979
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1645
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 462.997
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
====================================================================================================================
Path: #1646
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 462.997
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1647
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 462.999
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
==========================================================================================================================
Path: #1648
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 462.999
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1649
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.002
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1650
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 463.008
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1651
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 463.009
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1652
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.012
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1653
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.017
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
==========================================================================================================================
Path: #1654
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 463.018
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
==========================================================================================================================
Path: #1655
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 463.021
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
====================================================================================================================
Path: #1656
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 463.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
====================================================================================================================
Path: #1657
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 463.040
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1658
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 463.041
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1659
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.045
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1660
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.046
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1661
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 463.049
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
====================================================================================================================
Path: #1662
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.948
Required time 500.000
Slack: 463.052
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.948
============================================================================================================================
Path: #1663
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.948
Required time 500.000
Slack: 463.052
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.948
============================================================================================================================
Path: #1664
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.948
Required time 500.000
Slack: 463.052
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.948
============================================================================================================================
Path: #1665
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.948
Required time 500.000
Slack: 463.052
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.948
============================================================================================================================
Path: #1666
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 463.053
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
====================================================================================================================
Path: #1667
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 463.053
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
====================================================================================================================
Path: #1668
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 463.057
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
====================================================================================================================
Path: #1669
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.940
Required time 500.000
Slack: 463.060
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.940
============================================================================================================================
Path: #1670
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.940
Required time 500.000
Slack: 463.060
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.940
============================================================================================================================
Path: #1671
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.940
Required time 500.000
Slack: 463.060
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.940
============================================================================================================================
Path: #1672
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.940
Required time 500.000
Slack: 463.060
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.940
============================================================================================================================
Path: #1673
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 463.068
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1674
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 463.075
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
====================================================================================================================
Path: #1675
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 463.075
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
====================================================================================================================
Path: #1676
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 463.091
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
====================================================================================================================
Path: #1677
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 463.093
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
====================================================================================================================
Path: #1678
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 463.093
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
====================================================================================================================
Path: #1679
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.806
Required time 500.000
Slack: 463.194
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.806
============================================================================================================================
Path: #1680
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 36.798
Required time 500.000
Slack: 463.202
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 36.798
============================================================================================================================
Path: #1681
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.329
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1682
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.330
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1683
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.338
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=====================================================================================================================
Path: #1684
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=====================================================================================================================
Path: #1685
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.345
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=====================================================================================================================
Path: #1686
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.345
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=====================================================================================================================
Path: #1687
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.348
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1688
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.349
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1689
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.380
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1690
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.389
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=====================================================================================================================
Path: #1691
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.395
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=====================================================================================================================
Path: #1692
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.399
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1693
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.400
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1694
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.409
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=====================================================================================================================
Path: #1695
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.412
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1696
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.412
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1697
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.413
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1698
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.413
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1699
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.413
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1700
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.415
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=====================================================================================================================
Path: #1701
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.417
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1702
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.419
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1703
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.422
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=====================================================================================================================
Path: #1704
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.426
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=====================================================================================================================
Path: #1705
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.429
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=====================================================================================================================
Path: #1706
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.432
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=====================================================================================================================
Path: #1707
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.433
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1708
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.434
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1709
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.436
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1710
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.439
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1711
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.443
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=====================================================================================================================
Path: #1712
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.448
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=====================================================================================================================
Path: #1713
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.449
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=====================================================================================================================
Path: #1714
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.449
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1715
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.450
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1716
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.452
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1717
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.453
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1718
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.453
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1719
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.454
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1720
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.454
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=====================================================================================================================
Path: #1721
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.456
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1722
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.458
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1723
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.458
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=====================================================================================================================
Path: #1724
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.459
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=====================================================================================================================
Path: #1725
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.461
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=====================================================================================================================
Path: #1726
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.462
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=====================================================================================================================
Path: #1727
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.462
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1728
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.463
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=====================================================================================================================
Path: #1729
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.463
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1730
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.465
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=====================================================================================================================
Path: #1731
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.465
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=====================================================================================================================
Path: #1732
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.465
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=====================================================================================================================
Path: #1733
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.468
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=====================================================================================================================
Path: #1734
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.468
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=====================================================================================================================
Path: #1735
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.469
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1736
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.469
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=====================================================================================================================
Path: #1737
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.469
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1738
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.470
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1739
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.471
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1740
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.472
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=====================================================================================================================
Path: #1741
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.472
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1742
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.473
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1743
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.473
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1744
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.473
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1745
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.475
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1746
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.476
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1747
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.479
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=====================================================================================================================
Path: #1748
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.482
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=====================================================================================================================
Path: #1749
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.482
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=====================================================================================================================
Path: #1750
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.482
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1751
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.484
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1752
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.484
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=====================================================================================================================
Path: #1753
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.486
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=====================================================================================================================
Path: #1754
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.486
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #1755
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.488
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=====================================================================================================================
Path: #1756
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.489
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=====================================================================================================================
Path: #1757
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1758
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1759
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1760
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.490
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=====================================================================================================================
Path: #1761
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.492
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1762
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.493
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1763
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.494
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1764
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.495
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=====================================================================================================================
Path: #1765
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.496
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1766
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.497
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1767
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.499
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=====================================================================================================================
Path: #1768
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.499
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=====================================================================================================================
Path: #1769
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.499
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1770
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.501
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1771
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.501
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=====================================================================================================================
Path: #1772
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.505
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=====================================================================================================================
Path: #1773
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.505
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #1774
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.506
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=====================================================================================================================
Path: #1775
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 463.507
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_1 (forwardA[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #1776
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 65.467
Required time 500.000
Slack: 463.507
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 34.214
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 44.214
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_3 (forwardB[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 49.253
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 59.253
equal equal Port top 65.467
=======================================================================================================================
Path: #1777
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.509
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1778
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.509
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #1779
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.509
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1780
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.510
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #1781
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.512
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #1782
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.516
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1783
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.517
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1784
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.518
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=====================================================================================================================
Path: #1785
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=====================================================================================================================
Path: #1786
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.521
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=====================================================================================================================
Path: #1787
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.521
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1788
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.522
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1789
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.523
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1790
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.523
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1791
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.525
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=====================================================================================================================
Path: #1792
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.525
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=====================================================================================================================
Path: #1793
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.526
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #1794
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.527
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #1795
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.527
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=====================================================================================================================
Path: #1796
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.529
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #1797
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.529
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #1798
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.531
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #1799
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.531
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=====================================================================================================================
Path: #1800
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.532
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1801
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.532
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=====================================================================================================================
Path: #1802
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.532
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1803
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.533
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1804
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.534
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1805
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.535
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1806
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.535
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=====================================================================================================================
Path: #1807
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.535
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1808
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.536
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=====================================================================================================================
Path: #1809
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.536
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1810
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.536
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1811
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.537
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1812
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.537
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1813
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.538
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=====================================================================================================================
Path: #1814
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.538
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=====================================================================================================================
Path: #1815
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.539
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1816
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.540
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1817
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.542
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=====================================================================================================================
Path: #1818
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.542
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1819
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.542
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=====================================================================================================================
Path: #1820
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.542
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1821
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.543
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #1822
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.545
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #1823
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.546
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #1824
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.546
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #1825
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.547
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #1826
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.548
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #1827
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.553
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=====================================================================================================================
Path: #1828
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.553
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1829
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.554
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1830
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.555
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=====================================================================================================================
Path: #1831
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.555
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1832
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.555
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=====================================================================================================================
Path: #1833
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.556
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1834
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.556
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1835
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.557
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1836
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.557
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=====================================================================================================================
Path: #1837
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.558
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1838
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.559
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1839
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.559
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=====================================================================================================================
Path: #1840
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.560
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #1841
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.561
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=====================================================================================================================
Path: #1842
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.562
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=====================================================================================================================
Path: #1843
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.563
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #1844
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.563
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #1845
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.564
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=====================================================================================================================
Path: #1846
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.565
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #1847
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.566
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #1848
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.567
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #1849
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.568
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #1850
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.569
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=====================================================================================================================
Path: #1851
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.570
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #1852
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.572
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=====================================================================================================================
Path: #1853
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.572
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1854
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.573
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1855
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.573
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1856
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.574
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1857
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 463.575
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=====================================================================================================================
Path: #1858
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.575
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=====================================================================================================================
Path: #1859
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.578
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=====================================================================================================================
Path: #1860
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.579
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #1861
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.580
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #1862
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.582
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #1863
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.583
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1864
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.583
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1865
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.585
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #1866
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.589
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=====================================================================================================================
Path: #1867
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.591
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=====================================================================================================================
Path: #1868
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.592
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #1869
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.592
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=====================================================================================================================
Path: #1870
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.592
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #1871
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.593
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #1872
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.594
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #1873
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.594
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=====================================================================================================================
Path: #1874
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.594
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #1875
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.595
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #1876
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=====================================================================================================================
Path: #1877
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.596
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #1878
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.598
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=====================================================================================================================
Path: #1879
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.599
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=====================================================================================================================
Path: #1880
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.599
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #1881
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.599
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #1882
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.600
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=====================================================================================================================
Path: #1883
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.602
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1884
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.602
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1885
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.604
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #1886
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.605
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=====================================================================================================================
Path: #1887
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.605
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1888
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.606
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1889
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.606
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1890
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.607
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #1891
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.608
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=====================================================================================================================
Path: #1892
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.609
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #1893
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.609
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #1894
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.610
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #1895
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.610
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #1896
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.611
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=====================================================================================================================
Path: #1897
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.615
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=====================================================================================================================
Path: #1898
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.615
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #1899
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.619
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #1900
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.626
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #1901
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.627
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #1902
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.628
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #1903
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.629
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #1904
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.630
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #1905
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.630
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #1906
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.631
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #1907
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.632
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #1908
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.642
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #1909
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.643
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #1910
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.645
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #1911
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.646
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #1912
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.663
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #1913
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.664
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #1914
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.665
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1915
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.666
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1916
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.666
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1917
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.667
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #1918
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.667
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #1919
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.669
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #1920
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.678
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #1921
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.679
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #1922
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.682
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #1923
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.683
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #1924
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 463.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=====================================================================================================================
Path: #1925
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.714
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1926
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.714
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1927
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 463.740
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================================================
Path: #1928
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 463.741
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================================================
Path: #1929
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.764
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1930
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.785
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1931
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.788
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1932
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 463.791
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================================================
Path: #1933
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.792
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #1934
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.798
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1935
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.802
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1936
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.809
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #1937
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 463.811
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================================================
Path: #1938
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.811
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #1939
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.812
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #1940
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.813
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #1941
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.818
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1942
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.823
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1943
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.824
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #1944
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 463.824
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================================================
Path: #1945
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.827
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
==========================================================================================================================
Path: #1946
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.828
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #1947
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 463.828
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================================================
Path: #1948
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.831
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
==========================================================================================================================
Path: #1949
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.834
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1950
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.835
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1951
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.836
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
==========================================================================================================================
Path: #1952
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.837
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1953
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.838
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1954
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.838
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1955
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.840
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
==========================================================================================================================
Path: #1956
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.841
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1957
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 463.845
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================================================
Path: #1958
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.848
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
==========================================================================================================================
Path: #1959
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 463.850
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================================================
Path: #1960
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.850
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
==========================================================================================================================
Path: #1961
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
==========================================================================================================================
Path: #1962
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.853
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
==========================================================================================================================
Path: #1963
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.855
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1964
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.857
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
==========================================================================================================================
Path: #1965
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.857
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1966
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.858
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1967
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.859
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
==========================================================================================================================
Path: #1968
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.860
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
==========================================================================================================================
Path: #1969
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.860
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1970
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 463.860
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================================================
Path: #1971
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 463.861
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================================================
Path: #1972
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.862
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
==========================================================================================================================
Path: #1973
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 463.863
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================================================
Path: #1974
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 463.864
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================================================
Path: #1975
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 463.865
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================================================
Path: #1976
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.867
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1977
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.867
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
==========================================================================================================================
Path: #1978
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 463.867
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================================================
Path: #1979
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.870
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #1980
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.871
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #1981
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.872
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
==========================================================================================================================
Path: #1982
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.874
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1983
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.875
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #1984
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.876
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
==========================================================================================================================
Path: #1985
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 463.881
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================================================
Path: #1986
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.884
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1987
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 463.884
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================================================
Path: #1988
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.886
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1989
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.886
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1990
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.886
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1991
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 463.886
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================================================
Path: #1992
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.887
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #1993
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.887
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #1994
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.889
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #1995
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.889
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #1996
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.889
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #1997
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.889
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #1998
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.890
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #1999
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.891
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2000
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.892
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2001
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.894
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #2002
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 463.894
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2003
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.895
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #2004
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.896
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
==========================================================================================================================
Path: #2005
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.896
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #2006
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 463.897
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================================================
Path: #2007
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 463.898
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2008
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.901
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #2009
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 463.901
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================================================
Path: #2010
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.903
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2011
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.906
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2012
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.906
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2013
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.906
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2014
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.906
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2015
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.907
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #2016
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.907
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2017
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.908
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #2018
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2019
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2020
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2021
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2022
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2023
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.909
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2024
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.910
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2025
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.910
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2026
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.911
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #2027
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.911
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2028
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.911
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2029
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.911
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2030
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.911
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #2031
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.912
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2032
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 463.915
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2033
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 463.917
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2034
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 463.918
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2035
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 463.920
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2036
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 463.920
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================================================
Path: #2037
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 463.921
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================================================
Path: #2038
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.922
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2039
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.922
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2040
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.922
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2041
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 463.923
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================================================
Path: #2042
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.923
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2043
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2044
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2045
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2046
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.927
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2047
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.928
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #2048
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 463.930
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2049
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.931
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #2050
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 463.931
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=====================================================================================================================
Path: #2051
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.931
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #2052
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.933
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #2053
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.934
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #2054
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 463.934
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2055
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 463.934
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================================================
Path: #2056
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 463.935
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=====================================================================================================================
Path: #2057
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 463.937
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================================================
Path: #2058
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 463.938
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================================================
Path: #2059
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.944
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #2060
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.947
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #2061
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 463.951
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=====================================================================================================================
Path: #2062
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 463.954
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=====================================================================================================================
Path: #2063
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 463.954
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=====================================================================================================================
Path: #2064
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 463.954
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================================================
Path: #2065
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 463.955
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================================================
Path: #2066
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 463.956
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=====================================================================================================================
Path: #2067
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 463.957
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================================================
Path: #2068
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 463.958
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================================================
Path: #2069
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 463.958
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2070
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 463.959
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================================================
Path: #2071
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.965
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #2072
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.967
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #2073
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.968
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #2074
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.970
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #2075
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 463.970
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=====================================================================================================================
Path: #2076
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 463.971
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================================================
Path: #2077
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 463.974
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================================================
Path: #2078
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 463.974
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=====================================================================================================================
Path: #2079
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 463.976
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================================================
Path: #2080
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 463.978
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================================================
Path: #2081
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 463.980
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #2082
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 463.981
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2083
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 463.984
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #2084
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 463.991
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================================================
Path: #2085
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 463.991
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=====================================================================================================================
Path: #2086
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.994
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #2087
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 463.994
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================================================
Path: #2088
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 463.996
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================================================
Path: #2089
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 464.000
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================================================
Path: #2090
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 464.007
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================================================
Path: #2091
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.007
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2092
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 464.010
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================================================
Path: #2093
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2094
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.028
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2095
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.028
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================================================
Path: #2096
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.028
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2097
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2098
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2099
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2100
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.032
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================================================
Path: #2101
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.032
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================================================
Path: #2102
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2103
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2104
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2105
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=====================================================================================================================
Path: #2106
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.039
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=====================================================================================================================
Path: #2107
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2108
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.050
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2109
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 464.052
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================================================
Path: #2110
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.052
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2111
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.054
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================================================
Path: #2112
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.055
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2113
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 464.055
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2114
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.058
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2115
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 464.064
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=====================================================================================================================
Path: #2116
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.065
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2117
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.068
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2118
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 464.071
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=====================================================================================================================
Path: #2119
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 464.073
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================================================
Path: #2120
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 464.075
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================================================
Path: #2121
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.076
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2122
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 464.088
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2123
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.088
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2124
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.094
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2125
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.098
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2126
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.100
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2127
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.102
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2128
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.105
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2129
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.109
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2130
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.109
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
====================================================================================================================
Path: #2131
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 464.111
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================================================
Path: #2132
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.123
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2133
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.124
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2134
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.130
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2135
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 464.134
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================================================
Path: #2136
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 464.136
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================================================
Path: #2137
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.147
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
====================================================================================================================
Path: #2138
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 464.148
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
====================================================================================================================
Path: #2139
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.148
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
====================================================================================================================
Path: #2140
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.148
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
====================================================================================================================
Path: #2141
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.148
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
====================================================================================================================
Path: #2142
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.149
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
====================================================================================================================
Path: #2143
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.149
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
====================================================================================================================
Path: #2144
Starting point: FB1.uB/dut_inst.idex1.aluop2_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.660
Required time 500.000
Slack: 464.340
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop2_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_1 (ALUOP2EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.660
========================================================================================================================
Path: #2145
Starting point: FB1.uB/dut_inst.idex1.aluop3_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.660
Required time 500.000
Slack: 464.340
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop3_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_2 (ALUOP3EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.660
========================================================================================================================
Path: #2146
Starting point: FB1.uB/dut_inst.idex1.func3_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.647
Required time 500.000
Slack: 464.353
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_0 (FUNC3EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.647
==========================================================================================================================
Path: #2147
Starting point: FB1.uB/dut_inst.idex1.func3_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.647
Required time 500.000
Slack: 464.353
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_1 (FUNC3EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.647
==========================================================================================================================
Path: #2148
Starting point: FB1.uB/dut_inst.idex1.func3_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.647
Required time 500.000
Slack: 464.353
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_2 (FUNC3EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.647
==========================================================================================================================
Path: #2149
Starting point: FB1.uB/dut_inst.idex1.func7_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.645
Required time 500.000
Slack: 464.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_3 (FUNC7EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.645
==========================================================================================================================
Path: #2150
Starting point: FB1.uB/dut_inst.idex1.func7_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.645
Required time 500.000
Slack: 464.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_3 (FUNC7EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.645
==========================================================================================================================
Path: #2151
Starting point: FB1.uB/dut_inst.idex1.func7_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.645
Required time 500.000
Slack: 464.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_2 (FUNC7EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.645
==========================================================================================================================
Path: #2152
Starting point: FB1.uB/dut_inst.idex1.func7_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.645
Required time 500.000
Slack: 464.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_0 (FUNC7EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.645
==========================================================================================================================
Path: #2153
Starting point: FB1.uB/dut_inst.idex1.func7_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.645
Required time 500.000
Slack: 464.356
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_1 (FUNC7EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.645
==========================================================================================================================
Path: #2154
Starting point: FB1.uB/dut_inst.idex1.aluop1_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.634
Required time 500.000
Slack: 464.366
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop1_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_0 (ALUOP1EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.634
========================================================================================================================
Path: #2155
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 464.377
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
====================================================================================================================
Path: #2156
Starting point: FB1.uB/dut_inst.idex1.func7_out[5]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.614
Required time 500.000
Slack: 464.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_0 (FUNC7EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.614
==========================================================================================================================
Path: #2157
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 464.389
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2158
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 464.434
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_2 (forwardB[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
=======================================================================================================================
Path: #2159
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 64.540
Required time 500.000
Slack: 464.434
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 33.269
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 43.269
cpm_snd_HSTDM_4_FB1_B2_A_0_keep_0 (forwardA[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 48.308
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 58.308
equal equal Port top 64.540
=======================================================================================================================
Path: #2160
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 464.437
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================================================
Path: #2161
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 464.437
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================================================
Path: #2162
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.484
Required time 500.000
Slack: 464.516
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_0 (RD1EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.484
=========================================================================================================================
Path: #2163
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.482
Required time 500.000
Slack: 464.518
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_1 (RD1EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.482
=========================================================================================================================
Path: #2164
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.477
Required time 500.000
Slack: 464.523
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_0 (RD2EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.477
========================================================================================================================
Path: #2165
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.474
Required time 500.000
Slack: 464.526
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_1 (RD2EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.474
========================================================================================================================
Path: #2166
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.463
Required time 500.000
Slack: 464.537
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_2 (RD1EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.463
=========================================================================================================================
Path: #2167
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.463
Required time 500.000
Slack: 464.537
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_3 (RD1EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.463
=========================================================================================================================
Path: #2168
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[5]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.463
Required time 500.000
Slack: 464.537
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_1 (RD1EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.463
========================================================================================================================
Path: #2169
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.461
Required time 500.000
Slack: 464.539
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_0 (RD1EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.461
========================================================================================================================
Path: #2170
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.455
Required time 500.000
Slack: 464.545
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_3 (RD2EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.455
========================================================================================================================
Path: #2171
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.455
Required time 500.000
Slack: 464.545
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_2 (RD2EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.455
========================================================================================================================
Path: #2172
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[5]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.455
Required time 500.000
Slack: 464.545
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_1 (RD2EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.455
========================================================================================================================
Path: #2173
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.454
Required time 500.000
Slack: 464.546
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_0 (RD2EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.454
========================================================================================================================
Path: #2174
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[8]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.448
Required time 500.000
Slack: 464.552
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_0 (RD1EX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.448
========================================================================================================================
Path: #2175
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[9]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.445
Required time 500.000
Slack: 464.555
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_1 (RD1EX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.445
========================================================================================================================
Path: #2176
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[8]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.440
Required time 500.000
Slack: 464.560
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_0 (RD2EX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.440
========================================================================================================================
Path: #2177
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[9]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.438
Required time 500.000
Slack: 464.562
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_1 (RD2EX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.438
========================================================================================================================
Path: #2178
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[7]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.436
Required time 500.000
Slack: 464.564
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_3 (RD1EX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.436
========================================================================================================================
Path: #2179
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[6]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.436
Required time 500.000
Slack: 464.564
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_2 (RD1EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.436
========================================================================================================================
Path: #2180
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[6]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.429
Required time 500.000
Slack: 464.571
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_2 (RD2EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.429
========================================================================================================================
Path: #2181
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[7]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.429
Required time 500.000
Slack: 464.571
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_3 (RD2EX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.429
========================================================================================================================
Path: #2182
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[11]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.426
Required time 500.000
Slack: 464.574
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_3 (RD1EX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.426
=========================================================================================================================
Path: #2183
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[13]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.426
Required time 500.000
Slack: 464.574
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[13] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_1 (RD2EX[13]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.426
=========================================================================================================================
Path: #2184
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[10]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.426
Required time 500.000
Slack: 464.574
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_2 (RD1EX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.426
=========================================================================================================================
Path: #2185
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[12]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.425
Required time 500.000
Slack: 464.575
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[12] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_0 (RD1EX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.425
=========================================================================================================================
Path: #2186
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[10]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.418
Required time 500.000
Slack: 464.582
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_2 (RD2EX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.418
=========================================================================================================================
Path: #2187
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[11]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.418
Required time 500.000
Slack: 464.582
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_3 (RD2EX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.418
=========================================================================================================================
Path: #2188
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[13]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.418
Required time 500.000
Slack: 464.582
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[13] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_1 (RD1EX[13]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.418
=========================================================================================================================
Path: #2189
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[12]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.417
Required time 500.000
Slack: 464.583
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[12] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_0 (RD2EX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.417
=========================================================================================================================
Path: #2190
Starting point: FB1.uB/dut_inst.idex1.alusrc_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.413
Required time 500.000
Slack: 464.587
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.alusrc_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_3 (ALUSRCEX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.413
========================================================================================================================
Path: #2191
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[16]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.411
Required time 500.000
Slack: 464.589
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[16] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_0 (RD2EX[16]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.411
=========================================================================================================================
Path: #2192
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[17]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.409
Required time 500.000
Slack: 464.591
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[17] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_1 (RD2EX[17]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.409
=========================================================================================================================
Path: #2193
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[16]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.403
Required time 500.000
Slack: 464.597
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[16] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_0 (RD1EX[16]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.403
=========================================================================================================================
Path: #2194
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[17]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.401
Required time 500.000
Slack: 464.599
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[17] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_1 (RD1EX[17]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.401
=========================================================================================================================
Path: #2195
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[15]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.400
Required time 500.000
Slack: 464.600
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[15] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_3 (RD2EX[15]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.400
=========================================================================================================================
Path: #2196
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[14]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.400
Required time 500.000
Slack: 464.600
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[14] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_2 (RD2EX[14]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.400
=========================================================================================================================
Path: #2197
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[15]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.392
Required time 500.000
Slack: 464.608
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[15] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_3 (RD1EX[15]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.392
=========================================================================================================================
Path: #2198
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[14]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.392
Required time 500.000
Slack: 464.608
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[14] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_2 (RD1EX[14]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.392
=========================================================================================================================
Path: #2199
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[21]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.389
Required time 500.000
Slack: 464.611
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[21] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_1 (RD2EX[21]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.389
=========================================================================================================================
Path: #2200
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[18]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.389
Required time 500.000
Slack: 464.611
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[18] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_2 (RD2EX[18]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.389
=========================================================================================================================
Path: #2201
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[19]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.389
Required time 500.000
Slack: 464.611
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[19] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_3 (RD2EX[19]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.389
=========================================================================================================================
Path: #2202
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[20]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.388
Required time 500.000
Slack: 464.612
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[20] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_0 (RD2EX[20]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.388
=========================================================================================================================
Path: #2203
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[19]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.382
Required time 500.000
Slack: 464.618
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[19] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_3 (RD1EX[19]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.382
=========================================================================================================================
Path: #2204
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[21]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.382
Required time 500.000
Slack: 464.618
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[21] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_1 (RD1EX[21]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.382
==========================================================================================================================
Path: #2205
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[18]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.382
Required time 500.000
Slack: 464.618
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[18] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_2 (RD1EX[18]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.382
=========================================================================================================================
Path: #2206
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[20]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.381
Required time 500.000
Slack: 464.619
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[20] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_0 (RD1EX[20]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.381
==========================================================================================================================
Path: #2207
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[24]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.374
Required time 500.000
Slack: 464.626
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[24] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_0 (RD2EX[24]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.374
=========================================================================================================================
Path: #2208
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[25]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.372
Required time 500.000
Slack: 464.628
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[25] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_1 (RD2EX[25]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.372
=========================================================================================================================
Path: #2209
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[24]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.367
Required time 500.000
Slack: 464.633
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[24] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_0 (RD1EX[24]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.367
==========================================================================================================================
Path: #2210
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[25]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.364
Required time 500.000
Slack: 464.636
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[25] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_1 (RD1EX[25]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.364
==========================================================================================================================
Path: #2211
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[23]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.363
Required time 500.000
Slack: 464.637
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[23] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_3 (RD2EX[23]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.363
=========================================================================================================================
Path: #2212
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[22]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.363
Required time 500.000
Slack: 464.637
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[22] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_2 (RD2EX[22]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.363
=========================================================================================================================
Path: #2213
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[22]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.355
Required time 500.000
Slack: 464.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[22] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_2 (RD1EX[22]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.355
==========================================================================================================================
Path: #2214
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[23]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.355
Required time 500.000
Slack: 464.645
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[23] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_3 (RD1EX[23]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.355
==========================================================================================================================
Path: #2215
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[27]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.353
Required time 500.000
Slack: 464.647
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[27] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_3 (RD2EX[27]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.353
=========================================================================================================================
Path: #2216
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[29]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.353
Required time 500.000
Slack: 464.647
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[29] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_1 (RD2EX[29]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.353
==========================================================================================================================
Path: #2217
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[26]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.353
Required time 500.000
Slack: 464.647
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[26] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_2 (RD2EX[26]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.353
=========================================================================================================================
Path: #2218
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[28]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.352
Required time 500.000
Slack: 464.648
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[28] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_0 (RD2EX[28]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.352
==========================================================================================================================
Path: #2219
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[27]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.345
Required time 500.000
Slack: 464.655
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[27] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_3 (RD1EX[27]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.345
==========================================================================================================================
Path: #2220
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[29]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.345
Required time 500.000
Slack: 464.655
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[29] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_1 (RD1EX[29]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.345
=========================================================================================================================
Path: #2221
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[26]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.345
Required time 500.000
Slack: 464.655
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[26] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_2 (RD1EX[26]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.345
==========================================================================================================================
Path: #2222
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[28]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.344
Required time 500.000
Slack: 464.656
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[28] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_0 (RD1EX[28]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.344
=========================================================================================================================
Path: #2223
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[32]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.338
Required time 500.000
Slack: 464.662
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[32] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_0 (RD2EX[32]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.338
==========================================================================================================================
Path: #2224
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[33]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.335
Required time 500.000
Slack: 464.665
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[33] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_1 (RD2EX[33]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.335
==========================================================================================================================
Path: #2225
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[32]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.330
Required time 500.000
Slack: 464.670
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[32] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_0 (RD1EX[32]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.330
=========================================================================================================================
Path: #2226
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[33]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.328
Required time 500.000
Slack: 464.672
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[33] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_1 (RD1EX[33]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.328
=========================================================================================================================
Path: #2227
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[31]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.326
Required time 500.000
Slack: 464.674
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[31] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_3 (RD2EX[31]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.326
==========================================================================================================================
Path: #2228
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[30]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.326
Required time 500.000
Slack: 464.674
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[30] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_2 (RD2EX[30]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.326
==========================================================================================================================
Path: #2229
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[31]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.319
Required time 500.000
Slack: 464.681
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[31] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_3 (RD1EX[31]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.319
=========================================================================================================================
Path: #2230
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[30]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.319
Required time 500.000
Slack: 464.681
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[30] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_2 (RD1EX[30]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.319
=========================================================================================================================
Path: #2231
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[34]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.316
Required time 500.000
Slack: 464.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[34] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_2 (RD2EX[34]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.316
==========================================================================================================================
Path: #2232
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[35]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.316
Required time 500.000
Slack: 464.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[35] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_3 (RD2EX[35]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.316
==========================================================================================================================
Path: #2233
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[37]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.316
Required time 500.000
Slack: 464.684
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[37] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_1 (RD2EX[37]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.316
==========================================================================================================================
Path: #2234
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[36]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.315
Required time 500.000
Slack: 464.685
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[36] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_0 (RD2EX[36]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.315
==========================================================================================================================
Path: #2235
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[34]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.309
Required time 500.000
Slack: 464.691
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[34] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_2 (RD1EX[34]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.309
=========================================================================================================================
Path: #2236
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[35]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.309
Required time 500.000
Slack: 464.691
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[35] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_3 (RD1EX[35]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.309
=========================================================================================================================
Path: #2237
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[37]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.309
Required time 500.000
Slack: 464.691
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[37] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_1 (RD1EX[37]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.309
=========================================================================================================================
Path: #2238
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[36]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.307
Required time 500.000
Slack: 464.693
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[36] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_0 (RD1EX[36]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.307
=========================================================================================================================
Path: #2239
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[40]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.301
Required time 500.000
Slack: 464.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[40] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_0 (RD2EX[40]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.301
==========================================================================================================================
Path: #2240
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[41]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.299
Required time 500.000
Slack: 464.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[41] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_1 (RD2EX[41]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.299
==========================================================================================================================
Path: #2241
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[40]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.294
Required time 500.000
Slack: 464.706
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[40] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_0 (RD1EX[40]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.294
=========================================================================================================================
Path: #2242
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[41]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.291
Required time 500.000
Slack: 464.709
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[41] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_1 (RD1EX[41]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.291
=========================================================================================================================
Path: #2243
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[38]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.290
Required time 500.000
Slack: 464.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[38] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_2 (RD2EX[38]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.290
==========================================================================================================================
Path: #2244
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[39]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.290
Required time 500.000
Slack: 464.710
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[39] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_3 (RD2EX[39]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.290
==========================================================================================================================
Path: #2245
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[38]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.282
Required time 500.000
Slack: 464.718
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[38] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_2 (RD1EX[38]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.282
=========================================================================================================================
Path: #2246
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[39]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.282
Required time 500.000
Slack: 464.718
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[39] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_3 (RD1EX[39]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.282
=========================================================================================================================
Path: #2247
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[42]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.280
Required time 500.000
Slack: 464.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[42] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_2 (RD2EX[42]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.280
==========================================================================================================================
Path: #2248
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[43]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.280
Required time 500.000
Slack: 464.720
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[43] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_3 (RD2EX[43]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.280
==========================================================================================================================
Path: #2249
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[45]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.280
Required time 500.000
Slack: 464.720
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[45] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_1 (RD2EX[45]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.280
=========================================================================================================================
Path: #2250
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[44]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.278
Required time 500.000
Slack: 464.722
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[44] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_0 (RD2EX[44]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.278
=========================================================================================================================
Path: #2251
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[43]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.272
Required time 500.000
Slack: 464.728
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[43] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_3 (RD1EX[43]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.272
=========================================================================================================================
Path: #2252
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[42]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.272
Required time 500.000
Slack: 464.728
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[42] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_2 (RD1EX[42]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.272
=========================================================================================================================
Path: #2253
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[45]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.272
Required time 500.000
Slack: 464.728
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[45] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_1 (RD1EX[45]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.272
=========================================================================================================================
Path: #2254
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[44]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.271
Required time 500.000
Slack: 464.729
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[44] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_0 (RD1EX[44]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.271
=========================================================================================================================
Path: #2255
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[47]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.253
Required time 500.000
Slack: 464.747
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[47] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_3 (RD2EX[47]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.253
=========================================================================================================================
Path: #2256
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[46]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.253
Required time 500.000
Slack: 464.747
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[46] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_2 (RD2EX[46]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.253
=========================================================================================================================
Path: #2257
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[46]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.246
Required time 500.000
Slack: 464.754
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[46] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_2 (RD1EX[46]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.246
=========================================================================================================================
Path: #2258
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[47]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.246
Required time 500.000
Slack: 464.754
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[47] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_3 (RD1EX[47]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.246
=========================================================================================================================
Path: #2259
Starting point: FB1.uA/dut_inst.ifid1.out_pc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.047
Required time 500.803
Slack: 464.756
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[0] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_0 (PCID[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.ADDOUTID_obuf[0] O OBUF FB1_uB 31.184
ADDOUTID[0] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[0] I IBUF FB1_uA 34.937
FB1.uA/dut_inst.pc1.PC[0] D FDCE FB1_uA 36.047
====================================================================================================================
Path: #2260
Starting point: FB1.uB/dut_inst.idex1.func7_out[6]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.244
Required time 500.000
Slack: 464.756
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_1 (FUNC7EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.244
==========================================================================================================================
Path: #2261
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[48]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.232
Required time 500.000
Slack: 464.768
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[48] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_0 (RD2EX[48]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.232
=========================================================================================================================
Path: #2262
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[49]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.229
Required time 500.000
Slack: 464.771
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[49] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_1 (RD2EX[49]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.229
=========================================================================================================================
Path: #2263
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[48]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.224
Required time 500.000
Slack: 464.776
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[48] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_0 (RD1EX[48]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.224
=========================================================================================================================
Path: #2264
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[49]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.222
Required time 500.000
Slack: 464.778
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[49] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_1 (RD1EX[49]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.222
=========================================================================================================================
Path: #2265
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[51]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.210
Required time 500.000
Slack: 464.790
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[51] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_3 (RD2EX[51]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.210
=========================================================================================================================
Path: #2266
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[53]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.210
Required time 500.000
Slack: 464.790
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[53] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_1 (RD2EX[53]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.210
=========================================================================================================================
Path: #2267
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[50]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.210
Required time 500.000
Slack: 464.790
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[50] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_2 (RD2EX[50]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.210
=========================================================================================================================
Path: #2268
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[52]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.209
Required time 500.000
Slack: 464.791
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[52] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_0 (RD2EX[52]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.209
=========================================================================================================================
Path: #2269
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[53]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.202
Required time 500.000
Slack: 464.798
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[53] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_1 (RD1EX[53]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.202
=========================================================================================================================
Path: #2270
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[51]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.202
Required time 500.000
Slack: 464.798
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[51] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_3 (RD1EX[51]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.202
=========================================================================================================================
Path: #2271
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[50]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.202
Required time 500.000
Slack: 464.798
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[50] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_2 (RD1EX[50]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.202
=========================================================================================================================
Path: #2272
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[52]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.201
Required time 500.000
Slack: 464.799
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[52] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_0 (RD1EX[52]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.201
=========================================================================================================================
Path: #2273
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[54]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.184
Required time 500.000
Slack: 464.816
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[54] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_2 (RD2EX[54]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.184
=========================================================================================================================
Path: #2274
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[55]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.184
Required time 500.000
Slack: 464.816
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[55] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_3 (RD2EX[55]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.184
=========================================================================================================================
Path: #2275
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[54]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.176
Required time 500.000
Slack: 464.824
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[54] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_2 (RD1EX[54]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.176
=========================================================================================================================
Path: #2276
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[55]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.176
Required time 500.000
Slack: 464.824
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[55] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_3 (RD1EX[55]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.176
=========================================================================================================================
Path: #2277
Starting point: FB1.uB/dut_inst.idex1.imm_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.126
Required time 500.000
Slack: 464.874
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_2 (IMMEX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.126
========================================================================================================================
Path: #2278
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[56]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.126
Required time 500.000
Slack: 464.874
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[56] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_0 (RD2EX[56]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.126
=========================================================================================================================
Path: #2279
Starting point: FB1.uB/dut_inst.idex1.imm_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.124
Required time 500.000
Slack: 464.876
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_3 (IMMEX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.124
========================================================================================================================
Path: #2280
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[57]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.124
Required time 500.000
Slack: 464.876
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[57] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_1 (RD2EX[57]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.124
=========================================================================================================================
Path: #2281
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[56]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.118
Required time 500.000
Slack: 464.882
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[56] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_0 (RD1EX[56]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.118
=========================================================================================================================
Path: #2282
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.882
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2283
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[57]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.116
Required time 500.000
Slack: 464.884
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[57] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_1 (RD1EX[57]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.116
=========================================================================================================================
Path: #2284
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.886
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2285
Starting point: FB1.uB/dut_inst.idex1.imm_out[11]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.114
Required time 500.000
Slack: 464.886
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.135
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.135
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_1 (IMMEX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.174
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.174
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.114
==========================================================================================================================
Path: #2286
Starting point: FB1.uB/dut_inst.idex1.imm_out[11]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.112
Required time 500.000
Slack: 464.888
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.135
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.135
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_2 (IMMEX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.174
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.174
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.112
==========================================================================================================================
Path: #2287
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.891
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=====================================================================================================================
Path: #2288
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.895
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=====================================================================================================================
Path: #2289
Starting point: FB1.uB/dut_inst.idex1.imm_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.105
Required time 500.000
Slack: 464.895
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_1 (IMMEX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.105
========================================================================================================================
Path: #2290
Starting point: FB1.uB/dut_inst.idex1.imm_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.105
Required time 500.000
Slack: 464.895
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_0 (IMMEX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.105
========================================================================================================================
Path: #2291
Starting point: FB1.uB/dut_inst.idex1.imm_out[5]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.105
Required time 500.000
Slack: 464.895
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_3 (IMMEX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.105
========================================================================================================================
Path: #2292
Starting point: FB1.uB/dut_inst.idex1.imm_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.104
Required time 500.000
Slack: 464.897
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_2 (IMMEX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.104
========================================================================================================================
Path: #2293
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.898
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=====================================================================================================================
Path: #2294
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[58]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.100
Required time 500.000
Slack: 464.900
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[58] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_2 (RD2EX[58]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.100
=========================================================================================================================
Path: #2295
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.901
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=====================================================================================================================
Path: #2296
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.901
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2297
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.903
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2298
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.905
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2299
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.905
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2300
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.906
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2301
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.908
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2302
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[58]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.092
Required time 500.000
Slack: 464.908
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[58] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_2 (RD1EX[58]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.092
=========================================================================================================================
Path: #2303
Starting point: FB1.uB/dut_inst.idex1.imm_out[8]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.090
Required time 500.000
Slack: 464.910
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_2 (IMMEX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.090
========================================================================================================================
Path: #2304
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.912
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=====================================================================================================================
Path: #2305
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[59]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.088
Required time 500.000
Slack: 464.912
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[59] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_3 (RD2EX[59]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.088
=========================================================================================================================
Path: #2306
Starting point: FB1.uB/dut_inst.idex1.imm_out[9]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.087
Required time 500.000
Slack: 464.913
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_3 (IMMEX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.087
========================================================================================================================
Path: #2307
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.914
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=====================================================================================================================
Path: #2308
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.915
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=====================================================================================================================
Path: #2309
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.917
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=====================================================================================================================
Path: #2310
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=====================================================================================================================
Path: #2311
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[59]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.080
Required time 500.000
Slack: 464.920
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[59] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_3 (RD1EX[59]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.080
=========================================================================================================================
Path: #2312
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.921
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=====================================================================================================================
Path: #2313
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.921
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=====================================================================================================================
Path: #2314
Starting point: FB1.uB/dut_inst.idex1.imm_out[6]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.078
Required time 500.000
Slack: 464.922
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_0 (IMMEX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.078
========================================================================================================================
Path: #2315
Starting point: FB1.uB/dut_inst.idex1.imm_out[7]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.078
Required time 500.000
Slack: 464.922
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_1 (IMMEX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.078
========================================================================================================================
Path: #2316
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.922
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2317
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.922
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2318
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.923
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=====================================================================================================================
Path: #2319
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.924
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2320
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.925
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2321
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.927
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2322
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 464.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=====================================================================================================================
Path: #2323
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.931
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=====================================================================================================================
Path: #2324
Starting point: FB1.uB/dut_inst.idex1.imm_out[10]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.068
Required time 500.000
Slack: 464.932
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_0 (IMMEX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[62] Port top 35.068
==========================================================================================================================
Path: #2325
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.937
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=====================================================================================================================
Path: #2326
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 464.941
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2327
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 464.951
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2328
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[61]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.049
Required time 500.000
Slack: 464.951
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[61] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_1 (RD2EX[61]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.049
=========================================================================================================================
Path: #2329
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[60]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.048
Required time 500.000
Slack: 464.952
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[60] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_0 (RD2EX[60]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.048
=========================================================================================================================
Path: #2330
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[61]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.042
Required time 500.000
Slack: 464.958
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[61] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_1 (RD1EX[61]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.042
=========================================================================================================================
Path: #2331
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[60]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.040
Required time 500.000
Slack: 464.960
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[60] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_0 (RD1EX[60]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.040
=========================================================================================================================
Path: #2332
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.965
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2333
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 464.966
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2334
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 464.966
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=====================================================================================================================
Path: #2335
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.968
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2336
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 464.970
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2337
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 464.974
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2338
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.985
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2339
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 464.986
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2340
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.988
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2341
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.988
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2342
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 464.989
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2343
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 464.989
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2344
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.990
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2345
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 464.991
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2346
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[62]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 35.001
Required time 500.000
Slack: 464.999
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[62] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_2 (RD2EX[62]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 35.001
=========================================================================================================================
Path: #2347
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 465.004
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2348
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 465.006
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2349
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[62]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.994
Required time 500.000
Slack: 465.006
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[62] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_2 (RD1EX[62]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 34.994
=========================================================================================================================
Path: #2350
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 465.047
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2351
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 465.080
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2352
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 465.267
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2353
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 465.271
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2354
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 465.287
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2355
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 465.290
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2356
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 465.290
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2357
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 465.292
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2358
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 465.293
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================================================
Path: #2359
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 465.297
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================================================
Path: #2360
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 465.307
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2361
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 465.314
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================================================
Path: #2362
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 465.316
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================================================
Path: #2363
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 465.317
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================================================
Path: #2364
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 465.319
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================================================
Path: #2365
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 465.333
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================================================
Path: #2366
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 465.382
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2367
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 465.416
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================================================
Path: #2368
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[63]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.483
Required time 500.000
Slack: 465.517
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[63] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_3 (RD2EX[63]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 34.483
=========================================================================================================================
Path: #2369
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[63]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.468
Required time 500.000
Slack: 465.532
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[63] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_3 (RD1EX[63]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
ALUOUTEX[63:0] ALUOUTEX[63] Port top 34.468
=========================================================================================================================
Path: #2370
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[62]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.017
Required time 500.000
Slack: 465.983
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[62] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_2 (ALUOUTMEM[62]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
equal equal Port top 34.017
=========================================================================================================================
Path: #2371
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[60]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.017
Required time 500.000
Slack: 465.983
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[60] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_0 (ALUOUTMEM[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
equal equal Port top 34.017
=========================================================================================================================
Path: #2372
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[61]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 34.017
Required time 500.000
Slack: 465.983
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[61] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_1 (ALUOUTMEM[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
equal equal Port top 34.017
=========================================================================================================================
Path: #2373
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[63]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.939
Required time 500.000
Slack: 466.061
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[63] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.196
FB1.uC/cpm_snd_HSTDM_4_FB1_B2_A_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.196
cpm_snd_HSTDM_4_FB1_B2_A_1_keep_3 (ALUOUTMEM[63]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.235
FB1.uB/cpm_rcv_HSTDM_4_FB1_B2_A_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.235
equal equal Port top 33.939
=========================================================================================================================
Path: #2374
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.598
Required time 500.785
Slack: 466.187
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_2 (REGRS1_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.598
========================================================================================================================
Path: #2375
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.598
Required time 500.785
Slack: 466.187
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_1 (REGRS1_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.598
========================================================================================================================
Path: #2376
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.598
Required time 500.785
Slack: 466.187
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_3 (REGRS1_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.598
========================================================================================================================
Path: #2377
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.598
Required time 500.785
Slack: 466.187
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_0 (REGRS1_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.598
========================================================================================================================
Path: #2378
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.590
Required time 500.785
Slack: 466.194
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_1 (REGRS2_EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.590
========================================================================================================================
Path: #2379
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.590
Required time 500.785
Slack: 466.194
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_3 (REGRS2_EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.590
========================================================================================================================
Path: #2380
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.590
Required time 500.785
Slack: 466.194
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_0 (REGRS2_EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.590
========================================================================================================================
Path: #2381
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.590
Required time 500.785
Slack: 466.194
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_2 (REGRS2_EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.590
========================================================================================================================
Path: #2382
Starting point: FB1.uB/dut_inst.idex1.regrs1_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.456
Required time 500.785
Slack: 466.329
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_0_keep_0 (REGRS1_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.456
========================================================================================================================
Path: #2383
Starting point: FB1.uB/dut_inst.idex1.regrs2_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 34.448
Required time 500.785
Slack: 466.337
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regrs2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_3_keep_1 (REGRS2_EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 34.448
========================================================================================================================
Path: #2384
Starting point: FB1.uA/dut_inst.ifid1.out_pc[1]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.659
Required time 500.000
Slack: 466.341
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[1] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_1 (PCID[1]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.659
========================================================================================================================
Path: #2385
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.620
Required time 500.000
Slack: 466.381
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.620
==============================================================================================================================
Path: #2386
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.611
Required time 500.000
Slack: 466.389
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.611
==============================================================================================================================
Path: #2387
Starting point: FB1.uA/dut_inst.ifid1.out_pc[2]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.580
Required time 500.000
Slack: 466.420
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[2] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_2 (PCID[2]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.580
========================================================================================================================
Path: #2388
Starting point: FB1.uA/dut_inst.ifid1.out_pc[4]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.561
Required time 500.000
Slack: 466.439
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[4] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_0 (PCID[4]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.561
========================================================================================================================
Path: #2389
Starting point: FB1.uA/dut_inst.ifid1.out_pc[6]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.561
Required time 500.000
Slack: 466.439
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[6] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_2 (PCID[6]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.561
========================================================================================================================
Path: #2390
Starting point: FB1.uA/dut_inst.ifid1.out_pc[3]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.561
Required time 500.000
Slack: 466.439
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[3] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_3 (PCID[3]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.561
========================================================================================================================
Path: #2391
Starting point: FB1.uA/dut_inst.ifid1.out_pc[5]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.560
Required time 500.000
Slack: 466.440
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[5] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_1 (PCID[5]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.560
========================================================================================================================
Path: #2392
Starting point: FB1.uA/dut_inst.ifid1.out_pc[7]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.553
Required time 500.000
Slack: 466.448
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[7] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_7_keep_3 (PCID[7]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[62] Port top 33.553
========================================================================================================================
Path: #2393
Starting point: FB1.uA/dut_inst.ifid1.out_pc[17]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.451
Required time 500.000
Slack: 466.549
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[17] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_1 (PCID[17]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.451
========================================================================================================================
Path: #2394
Starting point: FB1.uA/dut_inst.ifid1.out_pc[18]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.448
Required time 500.000
Slack: 466.552
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[18] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_2 (PCID[18]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.448
========================================================================================================================
Path: #2395
Starting point: FB1.uA/dut_inst.ifid1.out_pc[16]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.439
Required time 500.000
Slack: 466.561
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[16] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_0 (PCID[16]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.439
========================================================================================================================
Path: #2396
Starting point: FB1.uA/dut_inst.ifid1.out_pc[19]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.429
Required time 500.000
Slack: 466.571
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[19] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_1_keep_3 (PCID[19]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.429
========================================================================================================================
Path: #2397
Starting point: FB1.uA/dut_inst.ifid1.out_pc[22]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.429
Required time 500.000
Slack: 466.571
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[22] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_2 (PCID[22]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.429
========================================================================================================================
Path: #2398
Starting point: FB1.uA/dut_inst.ifid1.out_pc[20]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.429
Required time 500.000
Slack: 466.571
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[20] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_0 (PCID[20]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.429
========================================================================================================================
Path: #2399
Starting point: FB1.uA/dut_inst.ifid1.out_pc[21]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.428
Required time 500.000
Slack: 466.572
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[21] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_1 (PCID[21]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.428
========================================================================================================================
Path: #2400
Starting point: FB1.uA/dut_inst.ifid1.out_pc[25]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.414
Required time 500.000
Slack: 466.586
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[25] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_1 (PCID[25]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.414
========================================================================================================================
Path: #2401
Starting point: FB1.uA/dut_inst.ifid1.out_pc[26]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.412
Required time 500.000
Slack: 466.588
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[26] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_2 (PCID[26]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.412
========================================================================================================================
Path: #2402
Starting point: FB1.uA/dut_inst.ifid1.out_pc[24]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.403
Required time 500.000
Slack: 466.597
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[24] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_0 (PCID[24]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.403
========================================================================================================================
Path: #2403
Starting point: FB1.uA/dut_inst.ifid1.out_pc[23]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.403
Required time 500.000
Slack: 466.597
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[23] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_C_0_keep_3 (PCID[23]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.403
========================================================================================================================
Path: #2404
Starting point: FB1.uA/dut_inst.ifid1.out_pc[28]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.393
Required time 500.000
Slack: 466.607
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[28] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_0 (PCID[28]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.393
========================================================================================================================
Path: #2405
Starting point: FB1.uA/dut_inst.ifid1.out_pc[27]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.393
Required time 500.000
Slack: 466.607
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_3_keep_3 (PCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.393
========================================================================================================================
Path: #2406
Starting point: FB1.uA/dut_inst.ifid1.out_pc[30]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.393
Required time 500.000
Slack: 466.607
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_2 (PCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.393
========================================================================================================================
Path: #2407
Starting point: FB1.uA/dut_inst.ifid1.out_pc[29]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.391
Required time 500.000
Slack: 466.609
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[29] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_1 (PCID[29]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.391
========================================================================================================================
Path: #2408
Starting point: FB1.uA/dut_inst.ifid1.out_pc[33]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.378
Required time 500.000
Slack: 466.622
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[33] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_1 (PCID[33]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.378
========================================================================================================================
Path: #2409
Starting point: FB1.uA/dut_inst.ifid1.out_pc[34]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.375
Required time 500.000
Slack: 466.625
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[34] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_2 (PCID[34]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.375
========================================================================================================================
Path: #2410
Starting point: FB1.uA/dut_inst.ifid1.out_pc[31]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.366
Required time 500.000
Slack: 466.634
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[31] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A4_D_2_keep_3 (PCID[31]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A4_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.366
========================================================================================================================
Path: #2411
Starting point: FB1.uA/dut_inst.ifid1.out_pc[32]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.366
Required time 500.000
Slack: 466.634
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[32] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_0 (PCID[32]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.366
========================================================================================================================
Path: #2412
Starting point: FB1.uA/dut_inst.ifid1.out_pc[35]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.356
Required time 500.000
Slack: 466.644
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[35] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_1_keep_3 (PCID[35]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.356
========================================================================================================================
Path: #2413
Starting point: FB1.uA/dut_inst.ifid1.out_pc[36]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.356
Required time 500.000
Slack: 466.644
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[36] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_0 (PCID[36]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.356
========================================================================================================================
Path: #2414
Starting point: FB1.uA/dut_inst.ifid1.out_pc[38]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.356
Required time 500.000
Slack: 466.644
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[38] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_2 (PCID[38]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.356
========================================================================================================================
Path: #2415
Starting point: FB1.uA/dut_inst.ifid1.out_pc[37]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.355
Required time 500.000
Slack: 466.645
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[37] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_1 (PCID[37]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.355
========================================================================================================================
Path: #2416
Starting point: FB1.uA/dut_inst.ifid1.out_pc[41]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.341
Required time 500.000
Slack: 466.659
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[41] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_1 (PCID[41]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.341
========================================================================================================================
Path: #2417
Starting point: FB1.uA/dut_inst.ifid1.out_pc[42]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.339
Required time 500.000
Slack: 466.661
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[42] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_2 (PCID[42]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.339
========================================================================================================================
Path: #2418
Starting point: FB1.uA/dut_inst.ifid1.out_pc[40]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.330
Required time 500.000
Slack: 466.670
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[40] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_0 (PCID[40]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.330
========================================================================================================================
Path: #2419
Starting point: FB1.uA/dut_inst.ifid1.out_pc[39]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.330
Required time 500.000
Slack: 466.670
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[39] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_C_0_keep_3 (PCID[39]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.330
========================================================================================================================
Path: #2420
Starting point: FB1.uA/dut_inst.ifid1.out_pc[43]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.319
Required time 500.000
Slack: 466.681
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[43] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_3_keep_3 (PCID[43]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.319
========================================================================================================================
Path: #2421
Starting point: FB1.uA/dut_inst.ifid1.out_pc[46]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.319
Required time 500.000
Slack: 466.681
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[46] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_2 (PCID[46]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.319
========================================================================================================================
Path: #2422
Starting point: FB1.uA/dut_inst.ifid1.out_pc[44]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.319
Required time 500.000
Slack: 466.681
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[44] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_0 (PCID[44]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.319
========================================================================================================================
Path: #2423
Starting point: FB1.uA/dut_inst.ifid1.out_pc[45]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.318
Required time 500.000
Slack: 466.682
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[45] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_1 (PCID[45]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.318
========================================================================================================================
Path: #2424
Starting point: FB1.uA/dut_inst.ifid1.out_pc[49]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.304
Required time 500.000
Slack: 466.696
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[49] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_1 (PCID[49]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.304
========================================================================================================================
Path: #2425
Starting point: FB1.uA/dut_inst.ifid1.out_pc[50]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.302
Required time 500.000
Slack: 466.698
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[50] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_2 (PCID[50]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.302
========================================================================================================================
Path: #2426
Starting point: FB1.uA/dut_inst.ifid1.out_pc[47]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.293
Required time 500.000
Slack: 466.707
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[47] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A3_D_2_keep_3 (PCID[47]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A3_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.293
========================================================================================================================
Path: #2427
Starting point: FB1.uA/dut_inst.ifid1.out_pc[48]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.293
Required time 500.000
Slack: 466.707
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[48] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_0 (PCID[48]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.293
========================================================================================================================
Path: #2428
Starting point: FB1.uA/dut_inst.ifid1.out_pc[51]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.283
Required time 500.000
Slack: 466.717
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[51] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_1_keep_3 (PCID[51]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.283
========================================================================================================================
Path: #2429
Starting point: FB1.uA/dut_inst.ifid1.out_pc[54]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.283
Required time 500.000
Slack: 466.717
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[54] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_2 (PCID[54]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.283
========================================================================================================================
Path: #2430
Starting point: FB1.uA/dut_inst.ifid1.out_pc[52]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.283
Required time 500.000
Slack: 466.717
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[52] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_0 (PCID[52]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.283
========================================================================================================================
Path: #2431
Starting point: FB1.uA/dut_inst.ifid1.out_pc[53]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.282
Required time 500.000
Slack: 466.718
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[53] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_1 (PCID[53]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.282
========================================================================================================================
Path: #2432
Starting point: FB1.uA/dut_inst.ifid1.out_pc[56]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.256
Required time 500.000
Slack: 466.744
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[56] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_0 (PCID[56]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.256
========================================================================================================================
Path: #2433
Starting point: FB1.uA/dut_inst.ifid1.out_pc[55]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.256
Required time 500.000
Slack: 466.744
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[55] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_C_0_keep_3 (PCID[55]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.256
========================================================================================================================
Path: #2434
Starting point: FB1.uA/dut_inst.ifid1.out_pc[57]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.235
Required time 500.000
Slack: 466.765
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[57] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_1 (PCID[57]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.235
========================================================================================================================
Path: #2435
Starting point: FB1.uA/dut_inst.ifid1.out_pc[58]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.233
Required time 500.000
Slack: 466.767
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[58] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_2 (PCID[58]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.233
========================================================================================================================
Path: #2436
Starting point: FB1.uA/dut_inst.ifid1.out_pc[59]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.209
Required time 500.000
Slack: 466.791
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[59] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_3_keep_3 (PCID[59]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.209
========================================================================================================================
Path: #2437
Starting point: FB1.uA/dut_inst.ifid1.out_pc[60]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.199
Required time 500.000
Slack: 466.801
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[60] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_0 (PCID[60]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[62] Port top 33.199
========================================================================================================================
Path: #2438
Starting point: FB1.uA/dut_inst.ifid1.out_pc[62]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.163
Required time 500.000
Slack: 466.837
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[62] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_2 (PCID[62]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[63] Port top 33.163
========================================================================================================================
Path: #2439
Starting point: FB1.uA/dut_inst.ifid1.out_pc[61]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.162
Required time 500.000
Slack: 466.838
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[61] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_1 (PCID[61]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[63] Port top 33.162
========================================================================================================================
Path: #2440
Starting point: FB1.uA/dut_inst.ifid1.out_pc[63]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 33.115
Required time 500.000
Slack: 466.885
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[63] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_A2_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_A2_D_2_keep_3 (PCID[63]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 18.129
FB1.uB/cpm_rcv_HSTDM_4_FB1_A2_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 28.129
ADDOUTID[63:0] ADDOUTID[63] Port top 33.115
========================================================================================================================
Path: #2441
Starting point: FB1.uA/dut_inst.ifid1.out_pc[10]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.565
Required time 500.000
Slack: 467.436
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[10] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_2 (PCID[10]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.565
==========================================================================================================================
Path: #2442
Starting point: FB1.uA/dut_inst.ifid1.out_pc[8]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.556
Required time 500.000
Slack: 467.445
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[8] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_0 (PCID[8]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.556
=========================================================================================================================
Path: #2443
Starting point: FB1.uA/dut_inst.ifid1.out_pc[9]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.549
Required time 500.000
Slack: 467.451
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[9] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_1 (PCID[9]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.549
=========================================================================================================================
Path: #2444
Starting point: FB1.uA/dut_inst.ifid1.out_pc[11]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.545
Required time 500.000
Slack: 467.455
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[11] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_N_18_keep_3 (PCID[11]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.545
==========================================================================================================================
Path: #2445
Starting point: FB1.uB/dut_inst.idex1.aluop2_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.310
Required time 500.785
Slack: 467.475
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop2_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_1 (ALUOP2EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.310
====================================================================================================================
Path: #2446
Starting point: FB1.uB/dut_inst.idex1.aluop3_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.310
Required time 500.785
Slack: 467.475
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop3_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_2 (ALUOP3EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.310
====================================================================================================================
Path: #2447
Starting point: FB1.uB/dut_inst.idex1.func3_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.297
Required time 500.785
Slack: 467.488
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_2 (FUNC3EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.297
======================================================================================================================
Path: #2448
Starting point: FB1.uB/dut_inst.idex1.func3_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.297
Required time 500.785
Slack: 467.488
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_1 (FUNC3EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.297
======================================================================================================================
Path: #2449
Starting point: FB1.uB/dut_inst.idex1.func3_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.297
Required time 500.785
Slack: 467.488
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func3_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_0 (FUNC3EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.297
======================================================================================================================
Path: #2450
Starting point: FB1.uB/dut_inst.idex1.func7_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.294
Required time 500.785
Slack: 467.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_3 (FUNC7EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.294
======================================================================================================================
Path: #2451
Starting point: FB1.uB/dut_inst.idex1.func7_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.294
Required time 500.785
Slack: 467.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_8_keep_3 (FUNC7EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.294
======================================================================================================================
Path: #2452
Starting point: FB1.uB/dut_inst.idex1.func7_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.294
Required time 500.785
Slack: 467.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_1 (FUNC7EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.294
======================================================================================================================
Path: #2453
Starting point: FB1.uB/dut_inst.idex1.func7_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.294
Required time 500.785
Slack: 467.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_0 (FUNC7EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.294
======================================================================================================================
Path: #2454
Starting point: FB1.uB/dut_inst.idex1.func7_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.294
Required time 500.785
Slack: 467.490
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_7_keep_2 (FUNC7EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.294
======================================================================================================================
Path: #2455
Starting point: FB1.uA/dut_inst.ifid1.out_pc[0]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[0]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.508
Required time 500.000
Slack: 467.492
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[0] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_7_keep_0 (PCID[0]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
ADDOUTID[63:0] ADDOUTID[0] Port top 32.508
=======================================================================================================================
Path: #2456
Starting point: FB1.uB/dut_inst.idex1.aluop1_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.284
Required time 500.785
Slack: 467.501
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.aluop1_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_0 (ALUOP1EX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.284
====================================================================================================================
Path: #2457
Starting point: FB1.uA/dut_inst.ifid1.out_pc[12]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.482
Required time 500.000
Slack: 467.518
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_0 (PCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.482
==========================================================================================================================
Path: #2458
Starting point: FB1.uA/dut_inst.ifid1.out_pc[13]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.481
Required time 500.000
Slack: 467.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_1 (PCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.481
==========================================================================================================================
Path: #2459
Starting point: FB1.uB/dut_inst.idex1.func7_out[5]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.264
Required time 500.785
Slack: 467.520
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_0 (FUNC7EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.264
======================================================================================================================
Path: #2460
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.134
Required time 500.785
Slack: 467.651
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_0 (RD1EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.134
=====================================================================================================================
Path: #2461
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.132
Required time 500.785
Slack: 467.653
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_1 (RD1EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.132
=====================================================================================================================
Path: #2462
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.127
Required time 500.785
Slack: 467.658
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_0 (RD2EX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.127
====================================================================================================================
Path: #2463
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.124
Required time 500.785
Slack: 467.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_1 (RD2EX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.124
====================================================================================================================
Path: #2464
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.113
Required time 500.785
Slack: 467.672
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_2 (RD1EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.113
=====================================================================================================================
Path: #2465
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.113
Required time 500.785
Slack: 467.672
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_10_keep_3 (RD1EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.113
=====================================================================================================================
Path: #2466
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[5]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.113
Required time 500.785
Slack: 467.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_1 (RD1EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.113
====================================================================================================================
Path: #2467
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.111
Required time 500.785
Slack: 467.673
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_0 (RD1EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.111
====================================================================================================================
Path: #2468
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.105
Required time 500.785
Slack: 467.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_3 (RD2EX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.105
====================================================================================================================
Path: #2469
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[5]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.105
Required time 500.785
Slack: 467.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_1 (RD2EX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.105
====================================================================================================================
Path: #2470
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.105
Required time 500.785
Slack: 467.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_2_keep_2 (RD2EX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.105
====================================================================================================================
Path: #2471
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.104
Required time 500.785
Slack: 467.681
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_0 (RD2EX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.104
====================================================================================================================
Path: #2472
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[8]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.098
Required time 500.785
Slack: 467.687
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_0 (RD1EX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.098
====================================================================================================================
Path: #2473
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[9]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.095
Required time 500.785
Slack: 467.690
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_1 (RD1EX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.095
====================================================================================================================
Path: #2474
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[8]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.090
Required time 500.785
Slack: 467.695
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_0 (RD2EX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.090
====================================================================================================================
Path: #2475
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[9]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.088
Required time 500.785
Slack: 467.697
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_1 (RD2EX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.088
====================================================================================================================
Path: #2476
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[7]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.086
Required time 500.785
Slack: 467.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_3 (RD1EX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.086
====================================================================================================================
Path: #2477
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[6]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.086
Required time 500.785
Slack: 467.699
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_9_keep_2 (RD1EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.086
====================================================================================================================
Path: #2478
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[7]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.079
Required time 500.785
Slack: 467.706
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_3 (RD2EX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.079
====================================================================================================================
Path: #2479
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[6]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.079
Required time 500.785
Slack: 467.706
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_3_keep_2 (RD2EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.079
====================================================================================================================
Path: #2480
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[13]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.076
Required time 500.785
Slack: 467.709
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[13] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_1 (RD2EX[13]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.076
=====================================================================================================================
Path: #2481
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[10]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.076
Required time 500.785
Slack: 467.709
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_2 (RD1EX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.076
=====================================================================================================================
Path: #2482
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[11]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.076
Required time 500.785
Slack: 467.709
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_8_keep_3 (RD1EX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.076
=====================================================================================================================
Path: #2483
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[12]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.075
Required time 500.785
Slack: 467.710
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[12] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_0 (RD1EX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.075
=====================================================================================================================
Path: #2484
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[10]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.068
Required time 500.785
Slack: 467.716
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_2 (RD2EX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.068
=====================================================================================================================
Path: #2485
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[13]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.068
Required time 500.785
Slack: 467.716
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[13] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_1 (RD1EX[13]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.068
=====================================================================================================================
Path: #2486
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[11]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.068
Required time 500.785
Slack: 467.716
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_2_keep_3 (RD2EX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.068
=====================================================================================================================
Path: #2487
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[12]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.067
Required time 500.785
Slack: 467.718
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[12] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_0 (RD2EX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.067
=====================================================================================================================
Path: #2488
Starting point: FB1.uB/dut_inst.idex1.alusrc_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.063
Required time 500.785
Slack: 467.722
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.alusrc_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_9_keep_3 (ALUSRCEX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.063
====================================================================================================================
Path: #2489
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[16]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.061
Required time 500.785
Slack: 467.724
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[16] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_0 (RD2EX[16]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.061
=====================================================================================================================
Path: #2490
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[17]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.059
Required time 500.785
Slack: 467.726
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[17] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_1 (RD2EX[17]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.059
=====================================================================================================================
Path: #2491
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[16]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.053
Required time 500.785
Slack: 467.731
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[16] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_0 (RD1EX[16]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.053
=====================================================================================================================
Path: #2492
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[17]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.051
Required time 500.785
Slack: 467.734
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[17] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_1 (RD1EX[17]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.051
=====================================================================================================================
Path: #2493
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[15]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.050
Required time 500.785
Slack: 467.735
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[15] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_3 (RD2EX[15]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.050
=====================================================================================================================
Path: #2494
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[14]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.050
Required time 500.785
Slack: 467.735
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[14] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_7_keep_2 (RD2EX[14]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.050
=====================================================================================================================
Path: #2495
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[15]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.042
Required time 500.785
Slack: 467.743
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[15] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_3 (RD1EX[15]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.042
=====================================================================================================================
Path: #2496
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[14]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.042
Required time 500.785
Slack: 467.743
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[14] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_9_keep_2 (RD1EX[14]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.042
=====================================================================================================================
Path: #2497
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[19]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.039
Required time 500.785
Slack: 467.745
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[19] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_3 (RD2EX[19]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.039
=====================================================================================================================
Path: #2498
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[21]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.039
Required time 500.785
Slack: 467.745
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[21] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_1 (RD2EX[21]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.039
=====================================================================================================================
Path: #2499
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[18]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.039
Required time 500.785
Slack: 467.745
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[18] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_6_keep_2 (RD2EX[18]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.039
=====================================================================================================================
Path: #2500
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[20]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.038
Required time 500.785
Slack: 467.747
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[20] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_0 (RD2EX[20]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.038
=====================================================================================================================
Path: #2501
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[18]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.032
Required time 500.785
Slack: 467.753
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[18] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_2 (RD1EX[18]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.032
=====================================================================================================================
Path: #2502
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[21]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.032
Required time 500.785
Slack: 467.753
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[21] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_1 (RD1EX[21]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.032
======================================================================================================================
Path: #2503
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[19]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.032
Required time 500.785
Slack: 467.753
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[19] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_8_keep_3 (RD1EX[19]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.032
=====================================================================================================================
Path: #2504
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[20]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.031
Required time 500.785
Slack: 467.754
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[20] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_0 (RD1EX[20]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.031
======================================================================================================================
Path: #2505
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[24]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.024
Required time 500.785
Slack: 467.760
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[24] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_0 (RD2EX[24]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.024
=====================================================================================================================
Path: #2506
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[25]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.022
Required time 500.785
Slack: 467.763
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[25] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_1 (RD2EX[25]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.022
=====================================================================================================================
Path: #2507
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[24]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.017
Required time 500.785
Slack: 467.768
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[24] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_0 (RD1EX[24]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.017
======================================================================================================================
Path: #2508
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[25]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.014
Required time 500.785
Slack: 467.770
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[25] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_1 (RD1EX[25]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.014
======================================================================================================================
Path: #2509
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[23]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.013
Required time 500.785
Slack: 467.772
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[23] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_3 (RD2EX[23]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.013
=====================================================================================================================
Path: #2510
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[22]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.013
Required time 500.785
Slack: 467.772
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[22] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_5_keep_2 (RD2EX[22]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.013
=====================================================================================================================
Path: #2511
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[23]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.005
Required time 500.785
Slack: 467.779
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[23] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_3 (RD1EX[23]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.005
======================================================================================================================
Path: #2512
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[22]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.005
Required time 500.785
Slack: 467.779
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[22] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_11_keep_2 (RD1EX[22]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.005
======================================================================================================================
Path: #2513
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[26]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.003
Required time 500.785
Slack: 467.782
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[26] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_2 (RD2EX[26]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.003
=====================================================================================================================
Path: #2514
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[29]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.003
Required time 500.785
Slack: 467.782
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[29] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_1 (RD2EX[29]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.003
======================================================================================================================
Path: #2515
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[27]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.003
Required time 500.785
Slack: 467.782
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[27] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_4_keep_3 (RD2EX[27]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.003
=====================================================================================================================
Path: #2516
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[28]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 33.002
Required time 500.785
Slack: 467.783
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[28] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_0 (RD2EX[28]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 33.002
======================================================================================================================
Path: #2517
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[29]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.995
Required time 500.785
Slack: 467.790
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[29] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_1 (RD1EX[29]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.995
=====================================================================================================================
Path: #2518
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[27]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.995
Required time 500.785
Slack: 467.790
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[27] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_3 (RD1EX[27]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.995
======================================================================================================================
Path: #2519
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[26]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.995
Required time 500.785
Slack: 467.790
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[26] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_10_keep_2 (RD1EX[26]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.995
======================================================================================================================
Path: #2520
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[28]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.994
Required time 500.785
Slack: 467.791
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[28] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_0 (RD1EX[28]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.994
=====================================================================================================================
Path: #2521
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[32]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.988
Required time 500.785
Slack: 467.797
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[32] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_0 (RD2EX[32]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.988
======================================================================================================================
Path: #2522
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[33]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.985
Required time 500.785
Slack: 467.799
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[33] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_1 (RD2EX[33]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.985
======================================================================================================================
Path: #2523
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[32]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.980
Required time 500.785
Slack: 467.805
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[32] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_0 (RD1EX[32]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.980
=====================================================================================================================
Path: #2524
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[33]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.978
Required time 500.785
Slack: 467.807
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[33] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_1 (RD1EX[33]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.978
=====================================================================================================================
Path: #2525
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[30]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.976
Required time 500.785
Slack: 467.808
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[30] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_2 (RD2EX[30]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.976
======================================================================================================================
Path: #2526
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[31]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.976
Required time 500.785
Slack: 467.808
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[31] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_11_keep_3 (RD2EX[31]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.976
======================================================================================================================
Path: #2527
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[30]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.969
Required time 500.785
Slack: 467.816
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[30] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_2 (RD1EX[30]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.969
=====================================================================================================================
Path: #2528
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[31]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.969
Required time 500.785
Slack: 467.816
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[31] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_5_keep_3 (RD1EX[31]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.969
=====================================================================================================================
Path: #2529
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[34]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.966
Required time 500.785
Slack: 467.819
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[34] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_2 (RD2EX[34]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.966
======================================================================================================================
Path: #2530
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[35]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.966
Required time 500.785
Slack: 467.819
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[35] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_10_keep_3 (RD2EX[35]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.966
======================================================================================================================
Path: #2531
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[37]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.966
Required time 500.785
Slack: 467.819
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[37] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_1 (RD2EX[37]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.966
======================================================================================================================
Path: #2532
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[36]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.965
Required time 500.785
Slack: 467.820
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[36] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_0 (RD2EX[36]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.965
======================================================================================================================
Path: #2533
Starting point: FB1.uA/dut_inst.ifid1.out_pc[14]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.180
Required time 500.000
Slack: 467.820
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_2 (PCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.180
==========================================================================================================================
Path: #2534
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[37]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.959
Required time 500.785
Slack: 467.826
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[37] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_1 (RD1EX[37]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.959
=====================================================================================================================
Path: #2535
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[34]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.959
Required time 500.785
Slack: 467.826
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[34] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_2 (RD1EX[34]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.959
=====================================================================================================================
Path: #2536
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[35]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.959
Required time 500.785
Slack: 467.826
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[35] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_4_keep_3 (RD1EX[35]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.959
=====================================================================================================================
Path: #2537
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[36]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.957
Required time 500.785
Slack: 467.827
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[36] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_0 (RD1EX[36]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.957
=====================================================================================================================
Path: #2538
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[40]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.951
Required time 500.785
Slack: 467.834
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[40] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_0 (RD2EX[40]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.951
======================================================================================================================
Path: #2539
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[41]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.949
Required time 500.785
Slack: 467.836
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[41] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_1 (RD2EX[41]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.949
======================================================================================================================
Path: #2540
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[40]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.944
Required time 500.785
Slack: 467.841
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[40] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_0 (RD1EX[40]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.944
=====================================================================================================================
Path: #2541
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[41]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.941
Required time 500.785
Slack: 467.844
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[41] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_1 (RD1EX[41]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.941
=====================================================================================================================
Path: #2542
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[38]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.940
Required time 500.785
Slack: 467.845
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[38] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_2 (RD2EX[38]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.940
======================================================================================================================
Path: #2543
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[39]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.940
Required time 500.785
Slack: 467.845
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[39] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_11_keep_3 (RD2EX[39]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.940
======================================================================================================================
Path: #2544
Starting point: FB1.uA/dut_inst.ifid1.out_pc[15]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 32.153
Required time 500.000
Slack: 467.847
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_pc[15] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_AI1_P_18_keep_3 (PCID[15]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 16.843
FB1.uB/cpm_rcv_HSTDM_4_FB1_AI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 26.843
ADDOUTID[63:0] ADDOUTID[62] Port top 32.153
==========================================================================================================================
Path: #2545
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[38]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.932
Required time 500.785
Slack: 467.853
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[38] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_2 (RD1EX[38]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.932
=====================================================================================================================
Path: #2546
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[39]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.932
Required time 500.785
Slack: 467.853
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[39] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_7_keep_3 (RD1EX[39]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.932
=====================================================================================================================
Path: #2547
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[45]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.930
Required time 500.785
Slack: 467.855
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[45] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_1 (RD2EX[45]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.930
=====================================================================================================================
Path: #2548
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[43]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.930
Required time 500.785
Slack: 467.855
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[43] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_3 (RD2EX[43]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.930
======================================================================================================================
Path: #2549
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[42]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.930
Required time 500.785
Slack: 467.855
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[42] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_10_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_10_keep_2 (RD2EX[42]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_10_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.930
======================================================================================================================
Path: #2550
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[44]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.928
Required time 500.785
Slack: 467.856
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[44] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_0 (RD2EX[44]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.928
=====================================================================================================================
Path: #2551
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[43]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.922
Required time 500.785
Slack: 467.863
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[43] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_3 (RD1EX[43]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.922
=====================================================================================================================
Path: #2552
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[42]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.922
Required time 500.785
Slack: 467.863
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[42] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_6_keep_2 (RD1EX[42]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.922
=====================================================================================================================
Path: #2553
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[45]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.922
Required time 500.785
Slack: 467.863
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[45] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_1 (RD1EX[45]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.922
=====================================================================================================================
Path: #2554
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[44]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.921
Required time 500.785
Slack: 467.864
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[44] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_0 (RD1EX[44]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.921
=====================================================================================================================
Path: #2555
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[46]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.903
Required time 500.785
Slack: 467.882
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[46] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_2 (RD2EX[46]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.903
=====================================================================================================================
Path: #2556
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[47]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.903
Required time 500.785
Slack: 467.882
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[47] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_5_keep_3 (RD2EX[47]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.903
=====================================================================================================================
Path: #2557
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[46]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.896
Required time 500.785
Slack: 467.889
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[46] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_2 (RD1EX[46]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.896
=====================================================================================================================
Path: #2558
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[47]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.896
Required time 500.785
Slack: 467.889
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[47] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_1_keep_3 (RD1EX[47]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.896
=====================================================================================================================
Path: #2559
Starting point: FB1.uB/dut_inst.idex1.func7_out[6]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.894
Required time 500.785
Slack: 467.891
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.func7_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_1 (FUNC7EX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.894
======================================================================================================================
Path: #2560
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[48]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.882
Required time 500.785
Slack: 467.903
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[48] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_0 (RD2EX[48]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.882
=====================================================================================================================
Path: #2561
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[49]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.879
Required time 500.785
Slack: 467.906
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[49] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_1 (RD2EX[49]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.879
=====================================================================================================================
Path: #2562
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[48]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.874
Required time 500.785
Slack: 467.911
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[48] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_0 (RD1EX[48]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.874
=====================================================================================================================
Path: #2563
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[49]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.872
Required time 500.785
Slack: 467.913
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[49] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_1 (RD1EX[49]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.872
=====================================================================================================================
Path: #2564
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[53]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.860
Required time 500.785
Slack: 467.925
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[53] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_1 (RD2EX[53]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.860
=====================================================================================================================
Path: #2565
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[51]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.860
Required time 500.785
Slack: 467.925
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[51] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_3 (RD2EX[51]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.860
=====================================================================================================================
Path: #2566
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[50]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.860
Required time 500.785
Slack: 467.925
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[50] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_4_keep_2 (RD2EX[50]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.860
=====================================================================================================================
Path: #2567
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[52]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.859
Required time 500.785
Slack: 467.926
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[52] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_0 (RD2EX[52]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.859
=====================================================================================================================
Path: #2568
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[50]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.852
Required time 500.785
Slack: 467.932
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[50] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_2 (RD1EX[50]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.852
=====================================================================================================================
Path: #2569
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[53]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.852
Required time 500.785
Slack: 467.932
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[53] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_1 (RD1EX[53]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.852
=====================================================================================================================
Path: #2570
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[51]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.852
Required time 500.785
Slack: 467.932
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[51] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_0_keep_3 (RD1EX[51]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.852
=====================================================================================================================
Path: #2571
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[52]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.851
Required time 500.785
Slack: 467.934
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[52] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_0 (RD1EX[52]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.851
=====================================================================================================================
Path: #2572
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[54]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.834
Required time 500.785
Slack: 467.951
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[54] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_2 (RD2EX[54]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.834
=====================================================================================================================
Path: #2573
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[55]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.834
Required time 500.785
Slack: 467.951
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[55] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_7_keep_3 (RD2EX[55]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.834
=====================================================================================================================
Path: #2574
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[54]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.826
Required time 500.785
Slack: 467.959
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[54] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_2 (RD1EX[54]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.826
=====================================================================================================================
Path: #2575
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[55]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.826
Required time 500.785
Slack: 467.959
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[55] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_9_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_9_keep_3 (RD1EX[55]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_9_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.826
=====================================================================================================================
Path: #2576
Starting point: FB1.uB/dut_inst.idex1.imm_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.776
Required time 500.785
Slack: 468.009
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[0] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_2 (IMMEX[0]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.776
====================================================================================================================
Path: #2577
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[56]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.776
Required time 500.785
Slack: 468.009
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[56] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_0 (RD2EX[56]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.776
=====================================================================================================================
Path: #2578
Starting point: FB1.uB/dut_inst.idex1.imm_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.774
Required time 500.785
Slack: 468.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[1] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_6_keep_3 (IMMEX[1]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.774
====================================================================================================================
Path: #2579
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[57]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.774
Required time 500.785
Slack: 468.011
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[57] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_1 (RD2EX[57]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.774
=====================================================================================================================
Path: #2580
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[56]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.768
Required time 500.785
Slack: 468.016
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[56] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_0 (RD1EX[56]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.768
=====================================================================================================================
Path: #2581
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[57]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.766
Required time 500.785
Slack: 468.019
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[57] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_1 (RD1EX[57]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.766
=====================================================================================================================
Path: #2582
Starting point: FB1.uB/dut_inst.idex1.imm_out[11]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.764
Required time 500.785
Slack: 468.021
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.135
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.135
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_1 (IMMEX[11]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.174
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.174
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.764
======================================================================================================================
Path: #2583
Starting point: FB1.uB/dut_inst.idex1.imm_out[11]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.762
Required time 500.785
Slack: 468.022
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[11] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.135
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.135
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_2 (IMMEX[12]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.174
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.174
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.762
======================================================================================================================
Path: #2584
Starting point: FB1.uB/dut_inst.idex1.imm_out[5]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.755
Required time 500.785
Slack: 468.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[5] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_3 (IMMEX[5]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.755
====================================================================================================================
Path: #2585
Starting point: FB1.uB/dut_inst.idex1.imm_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.755
Required time 500.785
Slack: 468.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[3] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_1 (IMMEX[3]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.755
====================================================================================================================
Path: #2586
Starting point: FB1.uB/dut_inst.idex1.imm_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.755
Required time 500.785
Slack: 468.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[2] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_0 (IMMEX[2]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.755
====================================================================================================================
Path: #2587
Starting point: FB1.uB/dut_inst.idex1.imm_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.754
Required time 500.785
Slack: 468.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_5_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_5_keep_2 (IMMEX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_5_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.754
====================================================================================================================
Path: #2588
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[58]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.750
Required time 500.785
Slack: 468.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[58] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_2 (RD2EX[58]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.750
=====================================================================================================================
Path: #2589
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[58]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.742
Required time 500.785
Slack: 468.043
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[58] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_2 (RD1EX[58]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.742
=====================================================================================================================
Path: #2590
Starting point: FB1.uB/dut_inst.idex1.imm_out[8]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.740
Required time 500.785
Slack: 468.045
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[8] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_2 (IMMEX[8]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.740
====================================================================================================================
Path: #2591
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[59]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.738
Required time 500.785
Slack: 468.047
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[59] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_6_keep_3 (RD2EX[59]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.738
=====================================================================================================================
Path: #2592
Starting point: FB1.uB/dut_inst.idex1.imm_out[9]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.737
Required time 500.785
Slack: 468.048
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[9] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_3 (IMMEX[9]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.737
====================================================================================================================
Path: #2593
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[59]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.730
Required time 500.785
Slack: 468.055
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[59] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_8_keep_3 (RD1EX[59]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.730
=====================================================================================================================
Path: #2594
Starting point: FB1.uB/dut_inst.idex1.imm_out[6]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.728
Required time 500.785
Slack: 468.057
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[6] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_0 (IMMEX[6]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.728
====================================================================================================================
Path: #2595
Starting point: FB1.uB/dut_inst.idex1.imm_out[7]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.728
Required time 500.785
Slack: 468.057
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[7] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_4_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_4_keep_1 (IMMEX[7]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_4_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.728
====================================================================================================================
Path: #2596
Starting point: FB1.uB/dut_inst.idex1.imm_out[10]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.718
Required time 500.785
Slack: 468.067
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.imm_out[10] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_0 (IMMEX[10]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 32.718
======================================================================================================================
Path: #2597
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[61]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.699
Required time 500.785
Slack: 468.086
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[61] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_1 (RD2EX[61]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.699
=====================================================================================================================
Path: #2598
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[60]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.698
Required time 500.785
Slack: 468.087
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[60] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_0 (RD2EX[60]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.698
=====================================================================================================================
Path: #2599
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[61]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.692
Required time 500.785
Slack: 468.093
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[61] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_1 (RD1EX[61]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.692
=====================================================================================================================
Path: #2600
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[60]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.690
Required time 500.785
Slack: 468.094
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[60] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_0 (RD1EX[60]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.690
=====================================================================================================================
Path: #2601
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[62]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.651
Required time 500.785
Slack: 468.134
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[62] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_2 (RD2EX[62]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.651
=====================================================================================================================
Path: #2602
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[62]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.644
Required time 500.785
Slack: 468.141
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[62] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_2 (RD1EX[62]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.644
=====================================================================================================================
Path: #2603
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[7]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.522
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[7] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[7] O OBUF FB1_uC 2.192
ALUOUTMEM[7] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[7] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[7] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[7] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[7] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[7] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[7] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[7] I IBUF FB1_uB 21.390
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2604
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[10]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.522
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[10] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[10] O OBUF FB1_uC 2.192
ALUOUTMEM[10] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[10] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[10] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[10] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[10] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[10] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[10] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[10] I IBUF FB1_uB 21.390
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2605
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[8]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.522
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[8] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[8] O OBUF FB1_uC 2.192
ALUOUTMEM[8] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[8] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[8] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[8] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[8] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[8] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[8] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[8] I IBUF FB1_uB 21.390
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2606
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[6]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.522
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[6] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[6] O OBUF FB1_uC 2.192
ALUOUTMEM[6] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[6] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[6] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[6] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[6] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[6] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[6] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[6] I IBUF FB1_uB 21.390
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2607
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[9]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.522
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[9] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[9] O OBUF FB1_uC 2.192
ALUOUTMEM[9] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[9] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[9] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[9] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[9] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[9] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[9] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[9] I IBUF FB1_uB 21.390
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2608
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.530
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[2] O OBUF FB1_uC 2.222
WRMEM[2] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[2] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[2] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2609
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.530
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[3] O OBUF FB1_uC 2.222
WRMEM[3] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[3] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[3] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2610
Starting point: FB1.uB/dut_inst.idex1.readdata2_out[63]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.133
Required time 500.785
Slack: 468.651
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata2_out[63] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_C_1_keep_3 (RD2EX[63]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.133
=====================================================================================================================
Path: #2611
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.655
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[1] O OBUF FB1_uC 2.222
WRMEM[1] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[1] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[1] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2612
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.655
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[0] O OBUF FB1_uC 2.222
WRMEM[0] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[0] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[0] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2613
Starting point: FB1.uB/dut_inst.idex1.readdata1_out[63]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 32.118
Required time 500.785
Slack: 468.667
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.readdata1_out[63] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_B_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_B_3_keep_3 (RD1EX[63]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_B_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 32.118
=====================================================================================================================
Path: #2614
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.693
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/MEMREADMEM_aptn_ft_obuf O OBUF FB1_uD 9.691
MEMREADMEM_aptn_ft - Net - -
FB1.uA/MEMREADMEM_aptn_ft_ibuf I IBUF FB1_uA 14.739
FB1.uA/MEMREADMEM_aptn_ft_0_obuf O OBUF FB1_uA 16.828
MEMREADMEM_aptn_ft_0 - Net - -
FB1.uB/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uB 21.867
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2615
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 468.862
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[4] O OBUF FB1_uC 2.222
WRMEM[4] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[4] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[4] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2616
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.144
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[2] O OBUF FB1_uC 2.222
WRMEM[2] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[2] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[2] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=============================================================================================
Path: #2617
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.144
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[3] O OBUF FB1_uC 2.222
WRMEM[3] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[3] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[3] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=============================================================================================
Path: #2618
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.269
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[1] O OBUF FB1_uC 2.222
WRMEM[1] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[1] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[1] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=============================================================================================
Path: #2619
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.269
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[0] O OBUF FB1_uC 2.222
WRMEM[0] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[0] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[0] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=============================================================================================
Path: #2620
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.307
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/MEMREADMEM_aptn_ft_obuf O OBUF FB1_uD 9.691
MEMREADMEM_aptn_ft - Net - -
FB1.uA/MEMREADMEM_aptn_ft_ibuf I IBUF FB1_uA 14.739
FB1.uA/MEMREADMEM_aptn_ft_0_obuf O OBUF FB1_uA 16.828
MEMREADMEM_aptn_ft_0 - Net - -
FB1.uB/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uB 21.867
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #2621
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 469.476
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[4] O OBUF FB1_uC 2.222
WRMEM[4] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[4] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[4] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=============================================================================================
Path: #2622
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 469.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[0] O OBUF FB1_uC 2.192
ALUOUTMEM[0] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[0] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[0] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uB 20.027
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2623
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 469.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[1] O OBUF FB1_uC 2.192
ALUOUTMEM[1] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[1] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[1] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uB 20.027
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2624
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[30]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.582
Required time 500.785
Slack: 470.203
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[30] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_3 (INSTRUCID[30]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.idex1.imm_out[9] D FDC FB1_uB 30.582
==========================================================================================================================
Path: #2625
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[27]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.582
Required time 500.785
Slack: 470.203
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[27] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_2 (INSTRUCID[27]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.idex1.imm_out[6] D FDC FB1_uB 30.582
==========================================================================================================================
Path: #2626
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.447
Required time 500.785
Slack: 470.338
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[4] Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.135
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.135
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_3 (WREX[4]) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.174
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.174
FB1.uC/dut_inst.exmem1.writeregister_out[4] D FDC FB1_uC 30.447
===================================================================================================================
Path: #2627
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[52]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[52] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_0_keep_2 (RD2MEM[52]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[52] D FD FB1_uD 30.402
======================================================================================================================
Path: #2628
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[50]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[50] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_0_keep_0 (RD2MEM[50]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[50] D FD FB1_uD 30.402
======================================================================================================================
Path: #2629
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[48]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[48] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_1_keep_3 (RD2MEM[48]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[48] D FD FB1_uD 30.402
======================================================================================================================
Path: #2630
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[53]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[53] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_0_keep_3 (RD2MEM[53]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[53] D FD FB1_uD 30.402
======================================================================================================================
Path: #2631
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[51]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[51] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_0_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_0_keep_1 (RD2MEM[51]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_0_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[51] D FD FB1_uD 30.402
======================================================================================================================
Path: #2632
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[55]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[55] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_3_keep_1 (RD2MEM[55]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[55] D FD FB1_uD 30.402
======================================================================================================================
Path: #2633
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[56]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[56] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_3_keep_2 (RD2MEM[56]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[56] D FD FB1_uD 30.402
======================================================================================================================
Path: #2634
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[45]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[45] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_1_keep_1 (RD2MEM[45]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[45] D FD FB1_uD 30.402
======================================================================================================================
Path: #2635
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[46]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[46] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_1_keep_2 (RD2MEM[46]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[46] D FD FB1_uD 30.402
======================================================================================================================
Path: #2636
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[41]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[41] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_6_keep_1 (RD2MEM[41]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[41] D FD FB1_uD 30.402
======================================================================================================================
Path: #2637
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[44]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[44] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_1_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_1_keep_0 (RD2MEM[44]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_1_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[44] D FD FB1_uD 30.402
======================================================================================================================
Path: #2638
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[54]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[54] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_3_keep_0 (RD2MEM[54]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[54] D FD FB1_uD 30.402
======================================================================================================================
Path: #2639
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[61]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[61] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_2_keep_2 (RD2MEM[61]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[61] D FD FB1_uD 30.402
======================================================================================================================
Path: #2640
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[59]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[59] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_2_keep_1 (RD2MEM[59]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[59] D FD FB1_uD 30.402
======================================================================================================================
Path: #2641
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[43]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[43] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_6_keep_3 (RD2MEM[43]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[43] D FD FB1_uD 30.402
======================================================================================================================
Path: #2642
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[57]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[57] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_3_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_3_keep_3 (RD2MEM[57]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_3_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[57] D FD FB1_uD 30.402
======================================================================================================================
Path: #2643
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[62]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[62] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_2_keep_3 (RD2MEM[62]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[62] D FD FB1_uD 30.402
======================================================================================================================
Path: #2644
Starting point: FB1.uB/dut_inst.idex1.regwrite_out/Q
Ending point: FB1.uC/dut_inst.exmem1.regwrite_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.regwrite_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_D_2_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_D_2_keep_2 (REGWRITEEX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_D_2_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.regwrite_out D FDC FB1_uC 30.402
======================================================================================================================
Path: #2645
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[42]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[42] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_6_keep_2 (RD2MEM[42]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[42] D FD FB1_uD 30.402
======================================================================================================================
Path: #2646
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[39]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[39] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_C_6_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_C_6_keep_0 (RD2MEM[39]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_C_6_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[39] D FD FB1_uD 30.402
======================================================================================================================
Path: #2647
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[58]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[58] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_C2_D_2_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_C2_D_2_keep_0 (RD2MEM[58]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 18.129
FB1.uD/cpm_rcv_HSTDM_4_FB1_C2_D_2_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 28.129
FB1.uD/dut_inst.dm1.memory[58] D FD FB1_uD 30.402
======================================================================================================================
Path: #2648
Starting point: FB1.uB/dut_inst.idex1.memwrite_out/Q
Ending point: FB1.uC/dut_inst.exmem1.memwrite_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.402
Required time 500.785
Slack: 470.383
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.memwrite_out Q FDC FB1_uB 0.817
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 3.090
FB1.uB/cpm_snd_HSTDM_4_FB1_B2_A_11_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uB 13.090
cpm_snd_HSTDM_4_FB1_B2_A_11_keep_3 (MEMWRITEEX) - Net - -
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 18.129
FB1.uC/cpm_rcv_HSTDM_4_FB1_B2_A_11_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uC 28.129
FB1.uC/dut_inst.exmem1.memwrite_out D FDC FB1_uC 30.402
=======================================================================================================================
Path: #2649
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[0]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[0] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_0 (RD2MEM[0]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[0] D FD FB1_uD 30.113
======================================================================================================================
Path: #2650
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[14]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[14] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_3 (RD2MEM[14]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[14] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2651
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[13]/Q
Ending point: FB1.uB/dut_inst.idex1.func3_out[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[13] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_0 (INSTRUCID[13]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.idex1.func3_out[1] D FDC FB1_uB 30.113
==========================================================================================================================
Path: #2652
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[1]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[1] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_1 (RD2MEM[1]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[1] D FD FB1_uD 30.113
======================================================================================================================
Path: #2653
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[10]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[10] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_0 (RD2MEM[10]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[10] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2654
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[11]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[11] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_1 (RD2MEM[11]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[11] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2655
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[13]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[13] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_7_keep_2 (RD2MEM[13]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[13] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2656
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[14]/Q
Ending point: FB1.uB/dut_inst.idex1.func3_out[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[14] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_P_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_P_8_keep_1 (INSTRUCID[14]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_P_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.idex1.func3_out[2] D FDC FB1_uB 30.113
==========================================================================================================================
Path: #2657
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[12]/Q
Ending point: FB1.uB/dut_inst.idex1.func3_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[12] Q FDCE FB1_uA 0.817
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 3.090
FB1.uA/cpm_snd_HSTDM_4_FB1_BI3_N_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uA 13.090
cpm_snd_HSTDM_4_FB1_BI3_N_8_keep_0 (INSTRUCID[12]) - Net - -
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 17.840
FB1.uB/cpm_rcv_HSTDM_4_FB1_BI3_N_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uB 27.840
FB1.uB/dut_inst.idex1.func3_out[0] D FDC FB1_uB 30.113
==========================================================================================================================
Path: #2658
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[16]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[16] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_0 (RD2MEM[16]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[16] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2659
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[19]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[19] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_3 (RD2MEM[19]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[19] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2660
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[9]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[9] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_3 (RD2MEM[9]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[9] D FD FB1_uD 30.113
======================================================================================================================
Path: #2661
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[4]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[4] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_3 (RD2MEM[4]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[4] D FD FB1_uD 30.113
======================================================================================================================
Path: #2662
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[8]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[8] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_2 (RD2MEM[8]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[8] D FD FB1_uD 30.113
======================================================================================================================
Path: #2663
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[17]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[17] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_1 (RD2MEM[17]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[17] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2664
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[6]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[6] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_0 (RD2MEM[6]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[6] D FD FB1_uD 30.113
======================================================================================================================
Path: #2665
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[2]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[2] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_N_8_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_N_8_keep_2 (RD2MEM[2]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_N_8_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[2] D FD FB1_uD 30.113
======================================================================================================================
Path: #2666
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[7]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[7] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_8_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_8_keep_1 (RD2MEM[7]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_8_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[7] D FD FB1_uD 30.113
======================================================================================================================
Path: #2667
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[18]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 30.113
Required time 500.785
Slack: 470.672
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[18] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_DI3_P_7_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_DI3_P_7_keep_2 (RD2MEM[18]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 17.840
FB1.uD/cpm_rcv_HSTDM_4_FB1_DI3_P_7_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 27.840
FB1.uD/dut_inst.dm1.memory[18] D FD FB1_uD 30.113
=======================================================================================================================
Path: #2668
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 470.860
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[2] O OBUF FB1_uC 2.192
ALUOUTMEM[2] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[2] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[2] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uB 19.030
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2669
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 470.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[3] O OBUF FB1_uC 2.192
ALUOUTMEM[3] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[3] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[3] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uB 19.030
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2670
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[5]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 470.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[5] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[5] O OBUF FB1_uC 2.192
ALUOUTMEM[5] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[5] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[5] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[5] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[5] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[5] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uB 19.030
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2671
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 470.863
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[4] O OBUF FB1_uC 2.192
ALUOUTMEM[4] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[4] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[4] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uB 19.030
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2672
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[22]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[22] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_2 (RD2MEM[22]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[22] D FD FB1_uD 29.116
========================================================================================================================
Path: #2673
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[38]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[38] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_3 (RD2MEM[38]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[38] D FD FB1_uD 29.116
========================================================================================================================
Path: #2674
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[31]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[31] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_1 (RD2MEM[31]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[31] D FD FB1_uD 29.116
========================================================================================================================
Path: #2675
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[24]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[24] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_0 (RD2MEM[24]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[24] D FD FB1_uD 29.116
========================================================================================================================
Path: #2676
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[36]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[36] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_1 (RD2MEM[36]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[36] D FD FB1_uD 29.116
========================================================================================================================
Path: #2677
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[34]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[34] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_0 (RD2MEM[34]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[34] D FD FB1_uD 29.116
========================================================================================================================
Path: #2678
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[33]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[33] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_3 (RD2MEM[33]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[33] D FD FB1_uD 29.116
========================================================================================================================
Path: #2679
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[26]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[26] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_1 (RD2MEM[26]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[26] D FD FB1_uD 29.116
========================================================================================================================
Path: #2680
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[32]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[32] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_2 (RD2MEM[32]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[32] D FD FB1_uD 29.116
========================================================================================================================
Path: #2681
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[28]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[28] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_2 (RD2MEM[28]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[28] D FD FB1_uD 29.116
========================================================================================================================
Path: #2682
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[23]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[23] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_3 (RD2MEM[23]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[23] D FD FB1_uD 29.116
========================================================================================================================
Path: #2683
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[37]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[37] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_2 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_18_buf_2 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_18_keep_2 (RD2MEM[37]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_2 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_18_buf_2 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[37] D FD FB1_uD 29.116
========================================================================================================================
Path: #2684
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[21]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[21] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_1 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_1 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_1 (RD2MEM[21]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_1 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_1 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[21] D FD FB1_uD 29.116
========================================================================================================================
Path: #2685
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[30]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[30] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_18_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_18_keep_0 (RD2MEM[30]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_18_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[30] D FD FB1_uD 29.116
========================================================================================================================
Path: #2686
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[20]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[20] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_0 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_N_17_buf_0 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_N_17_keep_0 (RD2MEM[20]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_0 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_N_17_buf_0 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[20] D FD FB1_uD 29.116
========================================================================================================================
Path: #2687
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[29]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 29.116
Required time 500.785
Slack: 471.669
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[29] Q FDC FB1_uC 0.817
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_3 I HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 3.090
FB1.uC/cpm_snd_HSTDM_4_FB1_CI1_P_17_buf_3 O HSTDM_4_Tx_b4f9t9t0r0b1200 FB1_uC 13.090
cpm_snd_HSTDM_4_FB1_CI1_P_17_keep_3 (RD2MEM[29]) - Net - -
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_3 I HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 16.843
FB1.uD/cpm_rcv_HSTDM_4_FB1_CI1_P_17_buf_3 O HSTDM_4_Rx_b4f9t9t0r0b1200 FB1_uD 26.843
FB1.uD/dut_inst.dm1.memory[29] D FD FB1_uD 29.116
========================================================================================================================
Path: #2688
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[8]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.115
Required time 500.000
Slack: 473.885
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[8] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[8] O OBUF FB1_uC 2.192
ALUOUTMEM[8] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[8] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[8] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[8] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[8] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[8] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[8] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[8] I IBUF FB1_uB 21.390
equal equal Port top 26.115
======================================================================================
Path: #2689
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[6]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.115
Required time 500.000
Slack: 473.885
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[6] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[6] O OBUF FB1_uC 2.192
ALUOUTMEM[6] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[6] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[6] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[6] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[6] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[6] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[6] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[6] I IBUF FB1_uB 21.390
equal equal Port top 26.115
======================================================================================
Path: #2690
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[7]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.115
Required time 500.000
Slack: 473.885
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[7] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[7] O OBUF FB1_uC 2.192
ALUOUTMEM[7] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[7] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[7] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[7] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[7] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[7] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[7] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[7] I IBUF FB1_uB 21.390
equal equal Port top 26.115
======================================================================================
Path: #2691
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[9]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.115
Required time 500.000
Slack: 473.885
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[9] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[9] O OBUF FB1_uC 2.192
ALUOUTMEM[9] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[9] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[9] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[9] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[9] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[9] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[9] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[9] I IBUF FB1_uB 21.390
equal equal Port top 26.115
======================================================================================
Path: #2692
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[10]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.115
Required time 500.000
Slack: 473.885
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[10] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[10] O OBUF FB1_uC 2.192
ALUOUTMEM[10] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[10] I IBUF FB1_uD 7.338
FB1.uD/ALUOUTMEM_aptn_ft_obuf[10] O OBUF FB1_uD 9.503
ALUOUTMEM_aptn_ft[10] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[10] I IBUF FB1_uA 14.551
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[10] O OBUF FB1_uA 16.640
ALUOUTMEM_aptn_ft_0[10] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[10] I IBUF FB1_uB 21.390
equal equal Port top 26.115
=======================================================================================
Path: #2693
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.089
Required time 500.000
Slack: 473.911
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[3] O OBUF FB1_uC 2.222
WRMEM[3] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[3] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[3] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uB 21.679
stall stall Port top 26.089
=============================================================================================
Path: #2694
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 26.089
Required time 500.000
Slack: 473.911
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[2] O OBUF FB1_uC 2.222
WRMEM[2] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[2] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[2] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uB 21.679
stall stall Port top 26.089
=============================================================================================
Path: #2695
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 25.964
Required time 500.000
Slack: 474.036
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[1] O OBUF FB1_uC 2.222
WRMEM[1] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[1] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[1] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uB 21.679
stall stall Port top 25.964
=============================================================================================
Path: #2696
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 25.964
Required time 500.000
Slack: 474.036
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[0] O OBUF FB1_uC 2.222
WRMEM[0] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[0] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[0] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uB 21.679
stall stall Port top 25.964
=============================================================================================
Path: #2697
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 25.926
Required time 500.000
Slack: 474.074
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/MEMREADMEM_aptn_ft_obuf O OBUF FB1_uD 9.691
MEMREADMEM_aptn_ft - Net - -
FB1.uA/MEMREADMEM_aptn_ft_ibuf I IBUF FB1_uA 14.739
FB1.uA/MEMREADMEM_aptn_ft_0_obuf O OBUF FB1_uA 16.828
MEMREADMEM_aptn_ft_0 - Net - -
FB1.uB/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uB 21.867
stall stall Port top 25.926
====================================================================================
Path: #2698
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/Q
Ending point: stall/stall
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 25.757
Required time 500.000
Slack: 474.243
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[4] O OBUF FB1_uC 2.222
WRMEM[4] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[4] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[4] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uB 21.679
stall stall Port top 25.757
=============================================================================================
Path: #2699
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[1] O OBUF FB1_uD 2.161
WRWB[1] - Net - -
FB1.uA/WRWB_ibuf[1] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.298
WRWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[1] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2700
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[2] O OBUF FB1_uD 2.161
WRWB[2] - Net - -
FB1.uA/WRWB_ibuf[2] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.298
WRWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[2] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2701
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[3] O OBUF FB1_uD 2.161
WRWB[3] - Net - -
FB1.uA/WRWB_ibuf[3] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.298
WRWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[3] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2702
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[0] O OBUF FB1_uD 2.161
WRWB[0] - Net - -
FB1.uA/WRWB_ibuf[0] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.298
WRWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[0] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2703
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.321
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[4] O OBUF FB1_uD 2.804
WRITEDATAWB[4] - Net - -
FB1.uA/WRITEDATAWB_ibuf[4] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[4] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2704
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.321
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[3] O OBUF FB1_uD 2.804
WRITEDATAWB[3] - Net - -
FB1.uA/WRITEDATAWB_ibuf[3] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[3] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2705
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.321
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[5] O OBUF FB1_uD 2.804
WRITEDATAWB[5] - Net - -
FB1.uA/WRITEDATAWB_ibuf[5] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[5] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[5] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[5] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2706
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[7] O OBUF FB1_uD 2.804
WRITEDATAWB[7] - Net - -
FB1.uA/WRITEDATAWB_ibuf[7] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[7] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[7] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[7] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2707
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[9] O OBUF FB1_uD 2.804
WRITEDATAWB[9] - Net - -
FB1.uA/WRITEDATAWB_ibuf[9] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[9] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[9] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[9] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2708
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[10] O OBUF FB1_uD 2.804
WRITEDATAWB[10] - Net - -
FB1.uA/WRITEDATAWB_ibuf[10] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[10] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[10] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[10] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2709
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[8] O OBUF FB1_uD 2.804
WRITEDATAWB[8] - Net - -
FB1.uA/WRITEDATAWB_ibuf[8] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[8] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[8] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[8] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2710
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.340
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[6] O OBUF FB1_uD 2.804
WRITEDATAWB[6] - Net - -
FB1.uA/WRITEDATAWB_ibuf[6] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[6] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[6] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[6] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2711
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.349
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[15] O OBUF FB1_uD 2.804
WRITEDATAWB[15] - Net - -
FB1.uA/WRITEDATAWB_ibuf[15] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[15] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[15] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[15] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2712
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.349
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[11] O OBUF FB1_uD 2.804
WRITEDATAWB[11] - Net - -
FB1.uA/WRITEDATAWB_ibuf[11] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[11] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[11] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[11] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2713
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.349
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[17] O OBUF FB1_uD 2.804
WRITEDATAWB[17] - Net - -
FB1.uA/WRITEDATAWB_ibuf[17] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[17] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[17] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[17] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2714
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.349
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[16] O OBUF FB1_uD 2.804
WRITEDATAWB[16] - Net - -
FB1.uA/WRITEDATAWB_ibuf[16] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[16] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[16] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[16] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2715
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.350
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[13] O OBUF FB1_uD 2.804
WRITEDATAWB[13] - Net - -
FB1.uA/WRITEDATAWB_ibuf[13] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[13] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[13] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[13] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2716
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.350
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[14] O OBUF FB1_uD 2.804
WRITEDATAWB[14] - Net - -
FB1.uA/WRITEDATAWB_ibuf[14] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[14] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[14] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[14] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2717
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.350
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[12] O OBUF FB1_uD 2.804
WRITEDATAWB[12] - Net - -
FB1.uA/WRITEDATAWB_ibuf[12] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[12] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[12] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[12] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2718
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.364
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[24] O OBUF FB1_uD 2.804
WRITEDATAWB[24] - Net - -
FB1.uA/WRITEDATAWB_ibuf[24] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[24] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[24] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[24] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2719
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.364
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[25] O OBUF FB1_uD 2.804
WRITEDATAWB[25] - Net - -
FB1.uA/WRITEDATAWB_ibuf[25] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[25] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[25] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[25] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2720
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.364
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[26] O OBUF FB1_uD 2.804
WRITEDATAWB[26] - Net - -
FB1.uA/WRITEDATAWB_ibuf[26] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[26] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[26] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[26] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2721
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.366
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[27] O OBUF FB1_uD 2.804
WRITEDATAWB[27] - Net - -
FB1.uA/WRITEDATAWB_ibuf[27] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[27] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[27] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[27] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2722
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.366
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[28] O OBUF FB1_uD 2.804
WRITEDATAWB[28] - Net - -
FB1.uA/WRITEDATAWB_ibuf[28] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[28] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[28] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[28] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2723
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.366
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[29] O OBUF FB1_uD 2.804
WRITEDATAWB[29] - Net - -
FB1.uA/WRITEDATAWB_ibuf[29] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[29] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[29] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[29] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2724
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[19] O OBUF FB1_uD 2.804
WRITEDATAWB[19] - Net - -
FB1.uA/WRITEDATAWB_ibuf[19] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[19] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[19] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[19] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2725
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[23] O OBUF FB1_uD 2.804
WRITEDATAWB[23] - Net - -
FB1.uA/WRITEDATAWB_ibuf[23] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[23] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[23] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[23] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2726
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[18] O OBUF FB1_uD 2.804
WRITEDATAWB[18] - Net - -
FB1.uA/WRITEDATAWB_ibuf[18] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[18] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[18] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[18] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2727
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[22] O OBUF FB1_uD 2.804
WRITEDATAWB[22] - Net - -
FB1.uA/WRITEDATAWB_ibuf[22] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[22] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[22] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[22] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2728
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[21] O OBUF FB1_uD 2.804
WRITEDATAWB[21] - Net - -
FB1.uA/WRITEDATAWB_ibuf[21] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[21] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[21] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[21] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2729
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.375
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[20] O OBUF FB1_uD 2.804
WRITEDATAWB[20] - Net - -
FB1.uA/WRITEDATAWB_ibuf[20] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[20] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[20] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[20] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2730
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[34] O OBUF FB1_uD 2.804
WRITEDATAWB[34] - Net - -
FB1.uA/WRITEDATAWB_ibuf[34] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[34] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[34] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[34] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2731
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[33] O OBUF FB1_uD 2.804
WRITEDATAWB[33] - Net - -
FB1.uA/WRITEDATAWB_ibuf[33] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[33] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[33] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[33] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2732
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[32] O OBUF FB1_uD 2.804
WRITEDATAWB[32] - Net - -
FB1.uA/WRITEDATAWB_ibuf[32] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[32] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[32] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[32] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2733
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[35] O OBUF FB1_uD 2.804
WRITEDATAWB[35] - Net - -
FB1.uA/WRITEDATAWB_ibuf[35] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[35] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[35] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[35] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2734
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[30] O OBUF FB1_uD 2.804
WRITEDATAWB[30] - Net - -
FB1.uA/WRITEDATAWB_ibuf[30] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[30] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[30] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[30] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2735
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.386
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[31] O OBUF FB1_uD 2.804
WRITEDATAWB[31] - Net - -
FB1.uA/WRITEDATAWB_ibuf[31] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[31] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[31] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[31] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2736
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.387
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[36] O OBUF FB1_uD 2.804
WRITEDATAWB[36] - Net - -
FB1.uA/WRITEDATAWB_ibuf[36] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[36] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[36] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[36] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2737
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[40] O OBUF FB1_uD 2.804
WRITEDATAWB[40] - Net - -
FB1.uA/WRITEDATAWB_ibuf[40] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[40] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[40] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[40] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2738
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[41] O OBUF FB1_uD 2.804
WRITEDATAWB[41] - Net - -
FB1.uA/WRITEDATAWB_ibuf[41] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[41] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[41] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[41] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2739
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.493
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[39] O OBUF FB1_uD 2.804
WRITEDATAWB[39] - Net - -
FB1.uA/WRITEDATAWB_ibuf[39] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[39] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[39] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[39] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2740
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[38] O OBUF FB1_uD 2.804
WRITEDATAWB[38] - Net - -
FB1.uA/WRITEDATAWB_ibuf[38] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[38] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[38] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[38] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2741
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.494
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[37] O OBUF FB1_uD 2.804
WRITEDATAWB[37] - Net - -
FB1.uA/WRITEDATAWB_ibuf[37] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[37] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[37] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[37] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2742
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[43] O OBUF FB1_uD 2.804
WRITEDATAWB[43] - Net - -
FB1.uA/WRITEDATAWB_ibuf[43] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[43] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[43] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[43] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2743
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[46] O OBUF FB1_uD 2.804
WRITEDATAWB[46] - Net - -
FB1.uA/WRITEDATAWB_ibuf[46] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[46] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[46] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[46] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2744
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[45] O OBUF FB1_uD 2.804
WRITEDATAWB[45] - Net - -
FB1.uA/WRITEDATAWB_ibuf[45] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[45] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[45] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[45] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2745
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[47] O OBUF FB1_uD 2.804
WRITEDATAWB[47] - Net - -
FB1.uA/WRITEDATAWB_ibuf[47] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[47] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[47] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[47] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2746
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[44] O OBUF FB1_uD 2.804
WRITEDATAWB[44] - Net - -
FB1.uA/WRITEDATAWB_ibuf[44] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[44] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[44] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[44] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2747
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[42] O OBUF FB1_uD 2.804
WRITEDATAWB[42] - Net - -
FB1.uA/WRITEDATAWB_ibuf[42] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[42] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[42] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[42] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2748
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[50] O OBUF FB1_uD 2.804
WRITEDATAWB[50] - Net - -
FB1.uA/WRITEDATAWB_ibuf[50] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[50] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[50] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[50] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2749
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[48] O OBUF FB1_uD 2.804
WRITEDATAWB[48] - Net - -
FB1.uA/WRITEDATAWB_ibuf[48] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[48] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[48] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[48] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2750
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[49] O OBUF FB1_uD 2.804
WRITEDATAWB[49] - Net - -
FB1.uA/WRITEDATAWB_ibuf[49] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[49] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[49] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[49] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2751
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.542
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[51] O OBUF FB1_uD 2.804
WRITEDATAWB[51] - Net - -
FB1.uA/WRITEDATAWB_ibuf[51] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[51] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[51] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[51] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2752
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.542
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[53] O OBUF FB1_uD 2.804
WRITEDATAWB[53] - Net - -
FB1.uA/WRITEDATAWB_ibuf[53] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[53] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[53] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[53] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2753
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.542
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[52] O OBUF FB1_uD 2.804
WRITEDATAWB[52] - Net - -
FB1.uA/WRITEDATAWB_ibuf[52] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[52] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[52] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[52] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2754
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[54] O OBUF FB1_uD 2.804
WRITEDATAWB[54] - Net - -
FB1.uA/WRITEDATAWB_ibuf[54] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[54] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[54] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[54] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2755
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[56] O OBUF FB1_uD 2.804
WRITEDATAWB[56] - Net - -
FB1.uA/WRITEDATAWB_ibuf[56] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[56] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[56] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[56] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2756
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.566
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[55] O OBUF FB1_uD 2.804
WRITEDATAWB[55] - Net - -
FB1.uA/WRITEDATAWB_ibuf[55] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[55] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[55] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[55] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2757
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[57] O OBUF FB1_uD 2.804
WRITEDATAWB[57] - Net - -
FB1.uA/WRITEDATAWB_ibuf[57] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[57] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[57] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[57] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2758
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[59] O OBUF FB1_uD 2.804
WRITEDATAWB[59] - Net - -
FB1.uA/WRITEDATAWB_ibuf[59] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[59] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[59] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[59] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2759
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[58] O OBUF FB1_uD 2.804
WRITEDATAWB[58] - Net - -
FB1.uA/WRITEDATAWB_ibuf[58] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[58] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[58] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[58] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2760
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[61] O OBUF FB1_uD 2.804
WRITEDATAWB[61] - Net - -
FB1.uA/WRITEDATAWB_ibuf[61] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[61] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[61] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[61] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2761
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[62] O OBUF FB1_uD 2.804
WRITEDATAWB[62] - Net - -
FB1.uA/WRITEDATAWB_ibuf[62] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[62] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[62] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[62] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2762
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.599
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[60] O OBUF FB1_uD 2.804
WRITEDATAWB[60] - Net - -
FB1.uA/WRITEDATAWB_ibuf[60] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[60] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[60] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[60] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2763
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.678
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[63] O OBUF FB1_uD 2.804
WRITEDATAWB[63] - Net - -
FB1.uA/WRITEDATAWB_ibuf[63] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[63] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[63] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[63] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2764
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 474.709
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[4] O OBUF FB1_uD 2.161
WRWB[4] - Net - -
FB1.uA/WRWB_ibuf[4] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.298
WRWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[4] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=============================================================================================
Path: #2765
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 24.774
Required time 500.000
Slack: 475.226
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[0] O OBUF FB1_uC 2.192
ALUOUTMEM[0] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[0] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[0] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uB 20.027
equal equal Port top 24.774
======================================================================================
Path: #2766
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 24.774
Required time 500.000
Slack: 475.226
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[1] O OBUF FB1_uC 2.192
ALUOUTMEM[1] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[1] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[1] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uB 20.027
equal equal Port top 24.774
======================================================================================
Path: #2767
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[39]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[39] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[39] O OBUF FB1_uD 2.161
DMOUTWB[39] - Net - -
FB1.uA/DMOUTWB_ibuf[39] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[39] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[39] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[39] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2768
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[34]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[34] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[34] O OBUF FB1_uD 2.161
DMOUTWB[34] - Net - -
FB1.uA/DMOUTWB_ibuf[34] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[34] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[34] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[34] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2769
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[35]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[35] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[35] O OBUF FB1_uD 2.161
DMOUTWB[35] - Net - -
FB1.uA/DMOUTWB_ibuf[35] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[35] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[35] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[35] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2770
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[40]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[40] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[40] O OBUF FB1_uD 2.161
DMOUTWB[40] - Net - -
FB1.uA/DMOUTWB_ibuf[40] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[40] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[40] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[40] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2771
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[33]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[33] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[33] O OBUF FB1_uD 2.161
DMOUTWB[33] - Net - -
FB1.uA/DMOUTWB_ibuf[33] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[33] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[33] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[33] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2772
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[41]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.602
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[41] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[41] O OBUF FB1_uD 2.161
DMOUTWB[41] - Net - -
FB1.uA/DMOUTWB_ibuf[41] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[41] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[41] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[41] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2773
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[37]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[37] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[37] O OBUF FB1_uD 2.161
DMOUTWB[37] - Net - -
FB1.uA/DMOUTWB_ibuf[37] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[37] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[37] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[37] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2774
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[38]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[38] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[38] O OBUF FB1_uD 2.161
DMOUTWB[38] - Net - -
FB1.uA/DMOUTWB_ibuf[38] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[38] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[38] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[38] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2775
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[36]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.603
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[36] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[36] O OBUF FB1_uD 2.161
DMOUTWB[36] - Net - -
FB1.uA/DMOUTWB_ibuf[36] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[36] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[36] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[36] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2776
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[47]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[47] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[47] O OBUF FB1_uD 2.161
DMOUTWB[47] - Net - -
FB1.uA/DMOUTWB_ibuf[47] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[47] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[47] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[47] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2777
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[45]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[45] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[45] O OBUF FB1_uD 2.161
DMOUTWB[45] - Net - -
FB1.uA/DMOUTWB_ibuf[45] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[45] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[45] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[45] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2778
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[46]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[46] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[46] O OBUF FB1_uD 2.161
DMOUTWB[46] - Net - -
FB1.uA/DMOUTWB_ibuf[46] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[46] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[46] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[46] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2779
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[44]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[44] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[44] O OBUF FB1_uD 2.161
DMOUTWB[44] - Net - -
FB1.uA/DMOUTWB_ibuf[44] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[44] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[44] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[44] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2780
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[43]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[43] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[43] O OBUF FB1_uD 2.161
DMOUTWB[43] - Net - -
FB1.uA/DMOUTWB_ibuf[43] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[43] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[43] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[43] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2781
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[42]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[42] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[42] O OBUF FB1_uD 2.161
DMOUTWB[42] - Net - -
FB1.uA/DMOUTWB_ibuf[42] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[42] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[42] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[42] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2782
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[50]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.650
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[50] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[50] O OBUF FB1_uD 2.161
DMOUTWB[50] - Net - -
FB1.uA/DMOUTWB_ibuf[50] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[50] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[50] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[50] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2783
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[49]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.650
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[49] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[49] O OBUF FB1_uD 2.161
DMOUTWB[49] - Net - -
FB1.uA/DMOUTWB_ibuf[49] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[49] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[49] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[49] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2784
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[48]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.650
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[48] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[48] O OBUF FB1_uD 2.161
DMOUTWB[48] - Net - -
FB1.uA/DMOUTWB_ibuf[48] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[48] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[48] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[48] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2785
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[52]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[52] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[52] O OBUF FB1_uD 2.161
DMOUTWB[52] - Net - -
FB1.uA/DMOUTWB_ibuf[52] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[52] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[52] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[52] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2786
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[51]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[51] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[51] O OBUF FB1_uD 2.161
DMOUTWB[51] - Net - -
FB1.uA/DMOUTWB_ibuf[51] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[51] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[51] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[51] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2787
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[53]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[53] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[53] O OBUF FB1_uD 2.161
DMOUTWB[53] - Net - -
FB1.uA/DMOUTWB_ibuf[53] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[53] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[53] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[53] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2788
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[56]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[56] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[56] O OBUF FB1_uD 2.161
DMOUTWB[56] - Net - -
FB1.uA/DMOUTWB_ibuf[56] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[56] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[56] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[56] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2789
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[54]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[54] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[54] O OBUF FB1_uD 2.161
DMOUTWB[54] - Net - -
FB1.uA/DMOUTWB_ibuf[54] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[54] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[54] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[54] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2790
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[55]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[55] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[55] O OBUF FB1_uD 2.161
DMOUTWB[55] - Net - -
FB1.uA/DMOUTWB_ibuf[55] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[55] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[55] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[55] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2791
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[58]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.686
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[58] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[58] O OBUF FB1_uD 2.161
DMOUTWB[58] - Net - -
FB1.uA/DMOUTWB_ibuf[58] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[58] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[58] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[58] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2792
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[57]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.686
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[57] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[57] O OBUF FB1_uD 2.161
DMOUTWB[57] - Net - -
FB1.uA/DMOUTWB_ibuf[57] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[57] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[57] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[57] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2793
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[59]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.686
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[59] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[59] O OBUF FB1_uD 2.161
DMOUTWB[59] - Net - -
FB1.uA/DMOUTWB_ibuf[59] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[59] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[59] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[59] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2794
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[62]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[62] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[62] O OBUF FB1_uD 2.161
DMOUTWB[62] - Net - -
FB1.uA/DMOUTWB_ibuf[62] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[62] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[62] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[62] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2795
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[61]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[61] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[61] O OBUF FB1_uD 2.161
DMOUTWB[61] - Net - -
FB1.uA/DMOUTWB_ibuf[61] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[61] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[61] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[61] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2796
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[60]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.701
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[60] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[60] O OBUF FB1_uD 2.161
DMOUTWB[60] - Net - -
FB1.uA/DMOUTWB_ibuf[60] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[60] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[60] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[60] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2797
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[1] O OBUF FB1_uD 2.804
WRITEDATAWB[1] - Net - -
FB1.uA/WRITEDATAWB_ibuf[1] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[1] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2798
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[2] O OBUF FB1_uD 2.804
WRITEDATAWB[2] - Net - -
FB1.uA/WRITEDATAWB_ibuf[2] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[2] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2799
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[0] O OBUF FB1_uD 2.804
WRITEDATAWB[0] - Net - -
FB1.uA/WRITEDATAWB_ibuf[0] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[0] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2800
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[63]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.779
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[63] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[63] O OBUF FB1_uD 2.161
DMOUTWB[63] - Net - -
FB1.uA/DMOUTWB_ibuf[63] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[63] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[63] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[63] I IBUF FB1_uB 14.337
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2801
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[0] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[0] O OBUF FB1_uD 2.161
DMOUTWB[0] - Net - -
FB1.uA/DMOUTWB_ibuf[0] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[0] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2802
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[1] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[1] O OBUF FB1_uD 2.161
DMOUTWB[1] - Net - -
FB1.uA/DMOUTWB_ibuf[1] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[1] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2803
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.816
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[2] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[2] O OBUF FB1_uD 2.161
DMOUTWB[2] - Net - -
FB1.uA/DMOUTWB_ibuf[2] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[2] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2804
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.818
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[3] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[3] O OBUF FB1_uD 2.161
DMOUTWB[3] - Net - -
FB1.uA/DMOUTWB_ibuf[3] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[3] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2805
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[5]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.818
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[5] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[5] O OBUF FB1_uD 2.161
DMOUTWB[5] - Net - -
FB1.uA/DMOUTWB_ibuf[5] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[5] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[5] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[5] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2806
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[7]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[7] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[7] O OBUF FB1_uD 2.161
DMOUTWB[7] - Net - -
FB1.uA/DMOUTWB_ibuf[7] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[7] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[7] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[7] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2807
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[9]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[9] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[9] O OBUF FB1_uD 2.161
DMOUTWB[9] - Net - -
FB1.uA/DMOUTWB_ibuf[9] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[9] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[9] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[9] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2808
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[6]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[6] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[6] O OBUF FB1_uD 2.161
DMOUTWB[6] - Net - -
FB1.uA/DMOUTWB_ibuf[6] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[6] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[6] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[6] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2809
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[8]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[8] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[8] O OBUF FB1_uD 2.161
DMOUTWB[8] - Net - -
FB1.uA/DMOUTWB_ibuf[8] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[8] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[8] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[8] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2810
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[10]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[10] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[10] O OBUF FB1_uD 2.161
DMOUTWB[10] - Net - -
FB1.uA/DMOUTWB_ibuf[10] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[10] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[10] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[10] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2811
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[11]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.855
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[11] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[11] O OBUF FB1_uD 2.161
DMOUTWB[11] - Net - -
FB1.uA/DMOUTWB_ibuf[11] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[11] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[11] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[11] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2812
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[13]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.856
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[13] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[13] O OBUF FB1_uD 2.161
DMOUTWB[13] - Net - -
FB1.uA/DMOUTWB_ibuf[13] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[13] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[13] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[13] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2813
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[12]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 475.856
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[12] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[12] O OBUF FB1_uD 2.161
DMOUTWB[12] - Net - -
FB1.uA/DMOUTWB_ibuf[12] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[12] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[12] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[12] I IBUF FB1_uB 14.048
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2814
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 23.777
Required time 500.000
Slack: 476.223
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[2] O OBUF FB1_uC 2.192
ALUOUTMEM[2] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[2] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[2] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uB 19.030
equal equal Port top 23.777
======================================================================================
Path: #2815
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 23.774
Required time 500.000
Slack: 476.226
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[4] O OBUF FB1_uC 2.192
ALUOUTMEM[4] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[4] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[4] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uB 19.030
equal equal Port top 23.774
======================================================================================
Path: #2816
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[5]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 23.774
Required time 500.000
Slack: 476.226
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[5] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[5] O OBUF FB1_uC 2.192
ALUOUTMEM[5] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[5] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[5] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[5] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[5] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[5] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uB 19.030
equal equal Port top 23.774
======================================================================================
Path: #2817
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 23.774
Required time 500.000
Slack: 476.226
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[3] O OBUF FB1_uC 2.192
ALUOUTMEM[3] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uD 5.945
FB1.uD/ALUOUTMEM_aptn_ft_obuf[3] O OBUF FB1_uD 8.140
ALUOUTMEM_aptn_ft[3] - Net - -
FB1.uA/ALUOUTMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 13.188
FB1.uA/ALUOUTMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 15.277
ALUOUTMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uB 19.030
equal equal Port top 23.774
======================================================================================
Path: #2818
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.815
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[4] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[4] O OBUF FB1_uD 2.161
DMOUTWB[4] - Net - -
FB1.uA/DMOUTWB_ibuf[4] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[4] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2819
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[17]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.852
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[17] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[17] O OBUF FB1_uD 2.161
DMOUTWB[17] - Net - -
FB1.uA/DMOUTWB_ibuf[17] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[17] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[17] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[17] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2820
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[16]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.852
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[16] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[16] O OBUF FB1_uD 2.161
DMOUTWB[16] - Net - -
FB1.uA/DMOUTWB_ibuf[16] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[16] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[16] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[16] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2821
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[15]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.852
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[15] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[15] O OBUF FB1_uD 2.161
DMOUTWB[15] - Net - -
FB1.uA/DMOUTWB_ibuf[15] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[15] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[15] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[15] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2822
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[14]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.853
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[14] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[14] O OBUF FB1_uD 2.161
DMOUTWB[14] - Net - -
FB1.uA/DMOUTWB_ibuf[14] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[14] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[14] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[14] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2823
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[26]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.867
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[26] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[26] O OBUF FB1_uD 2.161
DMOUTWB[26] - Net - -
FB1.uA/DMOUTWB_ibuf[26] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[26] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[26] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[26] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2824
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[24]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.867
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[24] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[24] O OBUF FB1_uD 2.161
DMOUTWB[24] - Net - -
FB1.uA/DMOUTWB_ibuf[24] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[24] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[24] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[24] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2825
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[25]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.867
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[25] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[25] O OBUF FB1_uD 2.161
DMOUTWB[25] - Net - -
FB1.uA/DMOUTWB_ibuf[25] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[25] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[25] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[25] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2826
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[27]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.869
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[27] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[27] O OBUF FB1_uD 2.161
DMOUTWB[27] - Net - -
FB1.uA/DMOUTWB_ibuf[27] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[27] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[27] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[27] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2827
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[29]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.869
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[29] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[29] O OBUF FB1_uD 2.161
DMOUTWB[29] - Net - -
FB1.uA/DMOUTWB_ibuf[29] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[29] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[29] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[29] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2828
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[28]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.869
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[28] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[28] O OBUF FB1_uD 2.161
DMOUTWB[28] - Net - -
FB1.uA/DMOUTWB_ibuf[28] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[28] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[28] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[28] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2829
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[23]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[23] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[23] O OBUF FB1_uD 2.161
DMOUTWB[23] - Net - -
FB1.uA/DMOUTWB_ibuf[23] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[23] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[23] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[23] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2830
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[19]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[19] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[19] O OBUF FB1_uD 2.161
DMOUTWB[19] - Net - -
FB1.uA/DMOUTWB_ibuf[19] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[19] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[19] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[19] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2831
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[22]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[22] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[22] O OBUF FB1_uD 2.161
DMOUTWB[22] - Net - -
FB1.uA/DMOUTWB_ibuf[22] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[22] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[22] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[22] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2832
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[21]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[21] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[21] O OBUF FB1_uD 2.161
DMOUTWB[21] - Net - -
FB1.uA/DMOUTWB_ibuf[21] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[21] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[21] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[21] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2833
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[18]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[18] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[18] O OBUF FB1_uD 2.161
DMOUTWB[18] - Net - -
FB1.uA/DMOUTWB_ibuf[18] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[18] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[18] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[18] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2834
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[20]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.878
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[20] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[20] O OBUF FB1_uD 2.161
DMOUTWB[20] - Net - -
FB1.uA/DMOUTWB_ibuf[20] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[20] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[20] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[20] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2835
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[31]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.888
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[31] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[31] O OBUF FB1_uD 2.161
DMOUTWB[31] - Net - -
FB1.uA/DMOUTWB_ibuf[31] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[31] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[31] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[31] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2836
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[32]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.888
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[32] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[32] O OBUF FB1_uD 2.161
DMOUTWB[32] - Net - -
FB1.uA/DMOUTWB_ibuf[32] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[32] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[32] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[32] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2837
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[30]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 476.888
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[30] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[30] O OBUF FB1_uD 2.161
DMOUTWB[30] - Net - -
FB1.uA/DMOUTWB_ibuf[30] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[30] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[30] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[30] I IBUF FB1_uB 13.051
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #2838
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.768
Required time 500.803
Slack: 477.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[2] O OBUF FB1_uC 2.222
WRMEM[2] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[2] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[2] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[2] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[2] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[2] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.768
=============================================================================================
Path: #2839
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.768
Required time 500.803
Slack: 477.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[3] O OBUF FB1_uC 2.222
WRMEM[3] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[3] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[3] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[3] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[3] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[3] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.768
=============================================================================================
Path: #2840
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.643
Required time 500.803
Slack: 477.159
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[0] O OBUF FB1_uC 2.222
WRMEM[0] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[0] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[0] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[0] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[0] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[0] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.643
=============================================================================================
Path: #2841
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.643
Required time 500.803
Slack: 477.159
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[1] O OBUF FB1_uC 2.222
WRMEM[1] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[1] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[1] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[1] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[1] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[1] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.643
=============================================================================================
Path: #2842
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.605
Required time 500.803
Slack: 477.197
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/MEMREADMEM_aptn_ft_obuf O OBUF FB1_uD 9.691
MEMREADMEM_aptn_ft - Net - -
FB1.uA/MEMREADMEM_aptn_ft_ibuf I IBUF FB1_uA 14.739
FB1.uA/MEMREADMEM_aptn_ft_0_obuf O OBUF FB1_uA 16.828
MEMREADMEM_aptn_ft_0 - Net - -
FB1.uB/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uB 21.867
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.605
====================================================================================
Path: #2843
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 23.436
Required time 500.803
Slack: 477.367
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[4] O OBUF FB1_uC 2.222
WRMEM[4] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uD 7.368
FB1.uD/WRMEM_aptn_ft_obuf[4] O OBUF FB1_uD 9.503
WRMEM_aptn_ft[4] - Net - -
FB1.uA/WRMEM_aptn_ft_ibuf[4] I IBUF FB1_uA 14.551
FB1.uA/WRMEM_aptn_ft_0_obuf[4] O OBUF FB1_uA 16.640
WRMEM_aptn_ft_0[4] - Net - -
FB1.uB/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uB 21.679
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 23.436
=============================================================================================
Path: #2844
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 22.666
Required time 500.785
Slack: 478.119
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[0] Q FDC FB1_uB 0.817
FB1.uB/dut_inst.WREX_obuf[0] O OBUF FB1_uB 2.192
WREX[0] - Net - -
FB1.uA/WREX_ibuf[0] I IBUF FB1_uA 7.231
FB1.uA/WREX_aptn_ft_obuf[0] O OBUF FB1_uA 9.320
WREX_aptn_ft[0] - Net - -
FB1.uD/WREX_aptn_ft_ibuf[0] I IBUF FB1_uD 14.368
FB1.uD/WREX_aptn_ft_0_obuf[0] O OBUF FB1_uD 16.457
WREX_aptn_ft_0[0] - Net - -
FB1.uC/dut_inst.WREX_ibuf[0] I IBUF FB1_uC 21.603
FB1.uC/dut_inst.exmem1.writeregister_out[0] D FDC FB1_uC 22.666
=============================================================================================
Path: #2845
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 22.666
Required time 500.785
Slack: 478.119
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[1] Q FDC FB1_uB 0.817
FB1.uB/dut_inst.WREX_obuf[1] O OBUF FB1_uB 2.192
WREX[1] - Net - -
FB1.uA/WREX_ibuf[1] I IBUF FB1_uA 7.231
FB1.uA/WREX_aptn_ft_obuf[1] O OBUF FB1_uA 9.320
WREX_aptn_ft[1] - Net - -
FB1.uD/WREX_aptn_ft_ibuf[1] I IBUF FB1_uD 14.368
FB1.uD/WREX_aptn_ft_0_obuf[1] O OBUF FB1_uD 16.457
WREX_aptn_ft_0[1] - Net - -
FB1.uC/dut_inst.WREX_ibuf[1] I IBUF FB1_uC 21.603
FB1.uC/dut_inst.exmem1.writeregister_out[1] D FDC FB1_uC 22.666
=============================================================================================
Path: #2846
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 22.666
Required time 500.785
Slack: 478.119
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[2] Q FDC FB1_uB 0.817
FB1.uB/dut_inst.WREX_obuf[2] O OBUF FB1_uB 2.192
WREX[2] - Net - -
FB1.uA/WREX_ibuf[2] I IBUF FB1_uA 7.231
FB1.uA/WREX_aptn_ft_obuf[2] O OBUF FB1_uA 9.320
WREX_aptn_ft[2] - Net - -
FB1.uD/WREX_aptn_ft_ibuf[2] I IBUF FB1_uD 14.368
FB1.uD/WREX_aptn_ft_0_obuf[2] O OBUF FB1_uD 16.457
WREX_aptn_ft_0[2] - Net - -
FB1.uC/dut_inst.WREX_ibuf[2] I IBUF FB1_uC 21.603
FB1.uC/dut_inst.exmem1.writeregister_out[2] D FDC FB1_uC 22.666
=============================================================================================
Path: #2847
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 22.666
Required time 500.785
Slack: 478.119
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[3] Q FDC FB1_uB 0.817
FB1.uB/dut_inst.WREX_obuf[3] O OBUF FB1_uB 2.192
WREX[3] - Net - -
FB1.uA/WREX_ibuf[3] I IBUF FB1_uA 7.231
FB1.uA/WREX_aptn_ft_obuf[3] O OBUF FB1_uA 9.320
WREX_aptn_ft[3] - Net - -
FB1.uD/WREX_aptn_ft_ibuf[3] I IBUF FB1_uD 14.368
FB1.uD/WREX_aptn_ft_0_obuf[3] O OBUF FB1_uD 16.457
WREX_aptn_ft_0[3] - Net - -
FB1.uC/dut_inst.WREX_ibuf[3] I IBUF FB1_uC 21.603
FB1.uC/dut_inst.exmem1.writeregister_out[3] D FDC FB1_uC 22.666
=============================================================================================
Path: #2848
Starting point: FB1.uB/dut_inst.idex1.memread_out/Q
Ending point: FB1.uC/dut_inst.exmem1.memread_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 21.350
Required time 500.785
Slack: 479.435
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.memread_out Q FDC FB1_uB 0.817
FB1.uB/dut_inst.MEMREADEX_obuf O OBUF FB1_uB 2.161
MEMREADEX - Net - -
FB1.uA/MEMREADEX_ibuf I IBUF FB1_uA 7.307
FB1.uA/MEMREADEX_aptn_ft_obuf O OBUF FB1_uA 9.396
MEMREADEX_aptn_ft - Net - -
FB1.uD/MEMREADEX_aptn_ft_ibuf I IBUF FB1_uD 14.444
FB1.uD/MEMREADEX_aptn_ft_0_obuf O OBUF FB1_uD 16.533
MEMREADEX_aptn_ft_0 - Net - -
FB1.uC/dut_inst.MEMREADEX_ibuf I IBUF FB1_uC 20.286
FB1.uC/dut_inst.exmem1.memread_out D FDC FB1_uC 21.350
====================================================================================
Path: #2849
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.325
Required time 500.000
Slack: 479.675
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[0] O OBUF FB1_uD 2.161
WRWB[0] - Net - -
FB1.uA/WRWB_ibuf[0] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.298
WRWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[0] I IBUF FB1_uB 14.444
equal equal Port top 20.325
=============================================================================================
Path: #2850
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.325
Required time 500.000
Slack: 479.675
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[3] O OBUF FB1_uD 2.161
WRWB[3] - Net - -
FB1.uA/WRWB_ibuf[3] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.298
WRWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[3] I IBUF FB1_uB 14.444
equal equal Port top 20.325
=============================================================================================
Path: #2851
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.325
Required time 500.000
Slack: 479.675
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[1] O OBUF FB1_uD 2.161
WRWB[1] - Net - -
FB1.uA/WRWB_ibuf[1] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.298
WRWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[1] I IBUF FB1_uB 14.444
equal equal Port top 20.325
=============================================================================================
Path: #2852
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.325
Required time 500.000
Slack: 479.675
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[2] O OBUF FB1_uD 2.161
WRWB[2] - Net - -
FB1.uA/WRWB_ibuf[2] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.298
WRWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[2] I IBUF FB1_uB 14.444
equal equal Port top 20.325
=============================================================================================
Path: #2853
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.316
Required time 500.000
Slack: 479.684
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[5] O OBUF FB1_uD 2.804
WRITEDATAWB[5] - Net - -
FB1.uA/WRITEDATAWB_ibuf[5] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[5] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[5] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[5] I IBUF FB1_uB 15.087
equal equal Port top 20.316
=====================================================================================
Path: #2854
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.316
Required time 500.000
Slack: 479.684
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[4] O OBUF FB1_uD 2.804
WRITEDATAWB[4] - Net - -
FB1.uA/WRITEDATAWB_ibuf[4] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[4] I IBUF FB1_uB 15.087
equal equal Port top 20.316
=====================================================================================
Path: #2855
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.316
Required time 500.000
Slack: 479.684
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[3] O OBUF FB1_uD 2.804
WRITEDATAWB[3] - Net - -
FB1.uA/WRITEDATAWB_ibuf[3] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[3] I IBUF FB1_uB 15.087
equal equal Port top 20.316
=====================================================================================
Path: #2856
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.297
Required time 500.000
Slack: 479.703
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[9] O OBUF FB1_uD 2.804
WRITEDATAWB[9] - Net - -
FB1.uA/WRITEDATAWB_ibuf[9] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[9] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[9] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[9] I IBUF FB1_uB 15.087
equal equal Port top 20.297
=====================================================================================
Path: #2857
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.297
Required time 500.000
Slack: 479.703
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[6] O OBUF FB1_uD 2.804
WRITEDATAWB[6] - Net - -
FB1.uA/WRITEDATAWB_ibuf[6] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[6] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[6] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[6] I IBUF FB1_uB 15.087
equal equal Port top 20.297
=====================================================================================
Path: #2858
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.297
Required time 500.000
Slack: 479.703
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[8] O OBUF FB1_uD 2.804
WRITEDATAWB[8] - Net - -
FB1.uA/WRITEDATAWB_ibuf[8] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[8] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[8] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[8] I IBUF FB1_uB 15.087
equal equal Port top 20.297
=====================================================================================
Path: #2859
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.297
Required time 500.000
Slack: 479.703
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[7] O OBUF FB1_uD 2.804
WRITEDATAWB[7] - Net - -
FB1.uA/WRITEDATAWB_ibuf[7] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[7] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[7] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[7] I IBUF FB1_uB 15.087
equal equal Port top 20.297
=====================================================================================
Path: #2860
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.297
Required time 500.000
Slack: 479.703
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[10] O OBUF FB1_uD 2.804
WRITEDATAWB[10] - Net - -
FB1.uA/WRITEDATAWB_ibuf[10] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[10] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[10] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[10] I IBUF FB1_uB 15.087
equal equal Port top 20.297
======================================================================================
Path: #2861
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.288
Required time 500.000
Slack: 479.712
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[17] O OBUF FB1_uD 2.804
WRITEDATAWB[17] - Net - -
FB1.uA/WRITEDATAWB_ibuf[17] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[17] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[17] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[17] I IBUF FB1_uB 15.087
equal equal Port top 20.288
======================================================================================
Path: #2862
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.288
Required time 500.000
Slack: 479.712
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[16] O OBUF FB1_uD 2.804
WRITEDATAWB[16] - Net - -
FB1.uA/WRITEDATAWB_ibuf[16] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[16] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[16] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[16] I IBUF FB1_uB 15.087
equal equal Port top 20.288
======================================================================================
Path: #2863
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.288
Required time 500.000
Slack: 479.712
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[11] O OBUF FB1_uD 2.804
WRITEDATAWB[11] - Net - -
FB1.uA/WRITEDATAWB_ibuf[11] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[11] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[11] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[11] I IBUF FB1_uB 15.087
equal equal Port top 20.288
======================================================================================
Path: #2864
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.288
Required time 500.000
Slack: 479.712
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[15] O OBUF FB1_uD 2.804
WRITEDATAWB[15] - Net - -
FB1.uA/WRITEDATAWB_ibuf[15] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[15] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[15] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[15] I IBUF FB1_uB 15.087
equal equal Port top 20.288
======================================================================================
Path: #2865
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.287
Required time 500.000
Slack: 479.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[14] O OBUF FB1_uD 2.804
WRITEDATAWB[14] - Net - -
FB1.uA/WRITEDATAWB_ibuf[14] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[14] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[14] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[14] I IBUF FB1_uB 15.087
equal equal Port top 20.287
======================================================================================
Path: #2866
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.287
Required time 500.000
Slack: 479.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[12] O OBUF FB1_uD 2.804
WRITEDATAWB[12] - Net - -
FB1.uA/WRITEDATAWB_ibuf[12] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[12] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[12] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[12] I IBUF FB1_uB 15.087
equal equal Port top 20.287
======================================================================================
Path: #2867
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.287
Required time 500.000
Slack: 479.713
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[13] O OBUF FB1_uD 2.804
WRITEDATAWB[13] - Net - -
FB1.uA/WRITEDATAWB_ibuf[13] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[13] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[13] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[13] I IBUF FB1_uB 15.087
equal equal Port top 20.287
======================================================================================
Path: #2868
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.273
Required time 500.000
Slack: 479.727
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[26] O OBUF FB1_uD 2.804
WRITEDATAWB[26] - Net - -
FB1.uA/WRITEDATAWB_ibuf[26] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[26] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[26] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[26] I IBUF FB1_uB 15.087
equal equal Port top 20.273
======================================================================================
Path: #2869
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.273
Required time 500.000
Slack: 479.727
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[24] O OBUF FB1_uD 2.804
WRITEDATAWB[24] - Net - -
FB1.uA/WRITEDATAWB_ibuf[24] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[24] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[24] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[24] I IBUF FB1_uB 15.087
equal equal Port top 20.273
======================================================================================
Path: #2870
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.273
Required time 500.000
Slack: 479.727
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[25] O OBUF FB1_uD 2.804
WRITEDATAWB[25] - Net - -
FB1.uA/WRITEDATAWB_ibuf[25] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[25] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[25] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[25] I IBUF FB1_uB 15.087
equal equal Port top 20.273
======================================================================================
Path: #2871
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.270
Required time 500.000
Slack: 479.730
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[27] O OBUF FB1_uD 2.804
WRITEDATAWB[27] - Net - -
FB1.uA/WRITEDATAWB_ibuf[27] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[27] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[27] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[27] I IBUF FB1_uB 15.087
equal equal Port top 20.270
======================================================================================
Path: #2872
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.270
Required time 500.000
Slack: 479.730
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[29] O OBUF FB1_uD 2.804
WRITEDATAWB[29] - Net - -
FB1.uA/WRITEDATAWB_ibuf[29] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[29] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[29] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[29] I IBUF FB1_uB 15.087
equal equal Port top 20.270
======================================================================================
Path: #2873
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.270
Required time 500.000
Slack: 479.730
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[28] O OBUF FB1_uD 2.804
WRITEDATAWB[28] - Net - -
FB1.uA/WRITEDATAWB_ibuf[28] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[28] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[28] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[28] I IBUF FB1_uB 15.087
equal equal Port top 20.270
======================================================================================
Path: #2874
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[19] O OBUF FB1_uD 2.804
WRITEDATAWB[19] - Net - -
FB1.uA/WRITEDATAWB_ibuf[19] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[19] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[19] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[19] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2875
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[18] O OBUF FB1_uD 2.804
WRITEDATAWB[18] - Net - -
FB1.uA/WRITEDATAWB_ibuf[18] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[18] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[18] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[18] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2876
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[21] O OBUF FB1_uD 2.804
WRITEDATAWB[21] - Net - -
FB1.uA/WRITEDATAWB_ibuf[21] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[21] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[21] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[21] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2877
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[23] O OBUF FB1_uD 2.804
WRITEDATAWB[23] - Net - -
FB1.uA/WRITEDATAWB_ibuf[23] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[23] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[23] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[23] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2878
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[20] O OBUF FB1_uD 2.804
WRITEDATAWB[20] - Net - -
FB1.uA/WRITEDATAWB_ibuf[20] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[20] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[20] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[20] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2879
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.261
Required time 500.000
Slack: 479.739
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[22] O OBUF FB1_uD 2.804
WRITEDATAWB[22] - Net - -
FB1.uA/WRITEDATAWB_ibuf[22] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[22] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[22] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[22] I IBUF FB1_uB 15.087
equal equal Port top 20.261
======================================================================================
Path: #2880
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[34] O OBUF FB1_uD 2.804
WRITEDATAWB[34] - Net - -
FB1.uA/WRITEDATAWB_ibuf[34] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[34] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[34] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[34] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2881
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[35] O OBUF FB1_uD 2.804
WRITEDATAWB[35] - Net - -
FB1.uA/WRITEDATAWB_ibuf[35] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[35] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[35] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[35] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2882
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[31] O OBUF FB1_uD 2.804
WRITEDATAWB[31] - Net - -
FB1.uA/WRITEDATAWB_ibuf[31] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[31] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[31] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[31] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2883
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[33] O OBUF FB1_uD 2.804
WRITEDATAWB[33] - Net - -
FB1.uA/WRITEDATAWB_ibuf[33] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[33] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[33] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[33] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2884
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[30] O OBUF FB1_uD 2.804
WRITEDATAWB[30] - Net - -
FB1.uA/WRITEDATAWB_ibuf[30] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[30] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[30] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[30] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2885
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.251
Required time 500.000
Slack: 479.749
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[32] O OBUF FB1_uD 2.804
WRITEDATAWB[32] - Net - -
FB1.uA/WRITEDATAWB_ibuf[32] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[32] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[32] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[32] I IBUF FB1_uB 15.087
equal equal Port top 20.251
======================================================================================
Path: #2886
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.250
Required time 500.000
Slack: 479.750
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[36] O OBUF FB1_uD 2.804
WRITEDATAWB[36] - Net - -
FB1.uA/WRITEDATAWB_ibuf[36] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[36] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[36] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[36] I IBUF FB1_uB 15.087
equal equal Port top 20.250
======================================================================================
Path: #2887
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.144
Required time 500.000
Slack: 479.856
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[40] O OBUF FB1_uD 2.804
WRITEDATAWB[40] - Net - -
FB1.uA/WRITEDATAWB_ibuf[40] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[40] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[40] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[40] I IBUF FB1_uB 14.980
equal equal Port top 20.144
======================================================================================
Path: #2888
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.144
Required time 500.000
Slack: 479.856
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[39] O OBUF FB1_uD 2.804
WRITEDATAWB[39] - Net - -
FB1.uA/WRITEDATAWB_ibuf[39] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[39] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[39] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[39] I IBUF FB1_uB 14.980
equal equal Port top 20.144
======================================================================================
Path: #2889
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.144
Required time 500.000
Slack: 479.856
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[41] O OBUF FB1_uD 2.804
WRITEDATAWB[41] - Net - -
FB1.uA/WRITEDATAWB_ibuf[41] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[41] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[41] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[41] I IBUF FB1_uB 14.980
equal equal Port top 20.144
======================================================================================
Path: #2890
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.143
Required time 500.000
Slack: 479.857
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[37] O OBUF FB1_uD 2.804
WRITEDATAWB[37] - Net - -
FB1.uA/WRITEDATAWB_ibuf[37] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[37] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[37] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[37] I IBUF FB1_uB 14.980
equal equal Port top 20.143
======================================================================================
Path: #2891
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.143
Required time 500.000
Slack: 479.857
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[38] O OBUF FB1_uD 2.804
WRITEDATAWB[38] - Net - -
FB1.uA/WRITEDATAWB_ibuf[38] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[38] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[38] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[38] I IBUF FB1_uB 14.980
equal equal Port top 20.143
======================================================================================
Path: #2892
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[43] O OBUF FB1_uD 2.804
WRITEDATAWB[43] - Net - -
FB1.uA/WRITEDATAWB_ibuf[43] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[43] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[43] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[43] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2893
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[42] O OBUF FB1_uD 2.804
WRITEDATAWB[42] - Net - -
FB1.uA/WRITEDATAWB_ibuf[42] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[42] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[42] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[42] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2894
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[44] O OBUF FB1_uD 2.804
WRITEDATAWB[44] - Net - -
FB1.uA/WRITEDATAWB_ibuf[44] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[44] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[44] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[44] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2895
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[46] O OBUF FB1_uD 2.804
WRITEDATAWB[46] - Net - -
FB1.uA/WRITEDATAWB_ibuf[46] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[46] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[46] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[46] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2896
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[45] O OBUF FB1_uD 2.804
WRITEDATAWB[45] - Net - -
FB1.uA/WRITEDATAWB_ibuf[45] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[45] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[45] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[45] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2897
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.118
Required time 500.000
Slack: 479.882
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[47] O OBUF FB1_uD 2.804
WRITEDATAWB[47] - Net - -
FB1.uA/WRITEDATAWB_ibuf[47] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[47] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[47] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[47] I IBUF FB1_uB 14.980
equal equal Port top 20.118
======================================================================================
Path: #2898
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.097
Required time 500.000
Slack: 479.903
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[49] O OBUF FB1_uD 2.804
WRITEDATAWB[49] - Net - -
FB1.uA/WRITEDATAWB_ibuf[49] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[49] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[49] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[49] I IBUF FB1_uB 14.980
equal equal Port top 20.097
======================================================================================
Path: #2899
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.097
Required time 500.000
Slack: 479.903
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[48] O OBUF FB1_uD 2.804
WRITEDATAWB[48] - Net - -
FB1.uA/WRITEDATAWB_ibuf[48] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[48] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[48] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[48] I IBUF FB1_uB 14.980
equal equal Port top 20.097
======================================================================================
Path: #2900
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.097
Required time 500.000
Slack: 479.903
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[50] O OBUF FB1_uD 2.804
WRITEDATAWB[50] - Net - -
FB1.uA/WRITEDATAWB_ibuf[50] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[50] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[50] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[50] I IBUF FB1_uB 14.980
equal equal Port top 20.097
======================================================================================
Path: #2901
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.095
Required time 500.000
Slack: 479.905
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[52] O OBUF FB1_uD 2.804
WRITEDATAWB[52] - Net - -
FB1.uA/WRITEDATAWB_ibuf[52] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[52] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[52] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[52] I IBUF FB1_uB 14.980
equal equal Port top 20.095
======================================================================================
Path: #2902
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.095
Required time 500.000
Slack: 479.905
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[51] O OBUF FB1_uD 2.804
WRITEDATAWB[51] - Net - -
FB1.uA/WRITEDATAWB_ibuf[51] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[51] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[51] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[51] I IBUF FB1_uB 14.980
equal equal Port top 20.095
======================================================================================
Path: #2903
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.095
Required time 500.000
Slack: 479.905
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[53] O OBUF FB1_uD 2.804
WRITEDATAWB[53] - Net - -
FB1.uA/WRITEDATAWB_ibuf[53] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[53] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[53] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[53] I IBUF FB1_uB 14.980
equal equal Port top 20.095
======================================================================================
Path: #2904
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.071
Required time 500.000
Slack: 479.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[54] O OBUF FB1_uD 2.804
WRITEDATAWB[54] - Net - -
FB1.uA/WRITEDATAWB_ibuf[54] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[54] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[54] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[54] I IBUF FB1_uB 14.980
equal equal Port top 20.071
======================================================================================
Path: #2905
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.071
Required time 500.000
Slack: 479.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[56] O OBUF FB1_uD 2.804
WRITEDATAWB[56] - Net - -
FB1.uA/WRITEDATAWB_ibuf[56] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[56] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[56] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[56] I IBUF FB1_uB 14.980
equal equal Port top 20.071
======================================================================================
Path: #2906
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.071
Required time 500.000
Slack: 479.929
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[55] O OBUF FB1_uD 2.804
WRITEDATAWB[55] - Net - -
FB1.uA/WRITEDATAWB_ibuf[55] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[55] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[55] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[55] I IBUF FB1_uB 14.980
equal equal Port top 20.071
======================================================================================
Path: #2907
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.061
Required time 500.000
Slack: 479.939
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[57] O OBUF FB1_uD 2.804
WRITEDATAWB[57] - Net - -
FB1.uA/WRITEDATAWB_ibuf[57] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[57] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[57] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[57] I IBUF FB1_uB 14.980
equal equal Port top 20.061
======================================================================================
Path: #2908
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.061
Required time 500.000
Slack: 479.939
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[58] O OBUF FB1_uD 2.804
WRITEDATAWB[58] - Net - -
FB1.uA/WRITEDATAWB_ibuf[58] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[58] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[58] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[58] I IBUF FB1_uB 14.980
equal equal Port top 20.061
======================================================================================
Path: #2909
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.061
Required time 500.000
Slack: 479.939
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[59] O OBUF FB1_uD 2.804
WRITEDATAWB[59] - Net - -
FB1.uA/WRITEDATAWB_ibuf[59] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[59] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[59] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[59] I IBUF FB1_uB 14.980
equal equal Port top 20.061
======================================================================================
Path: #2910
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.037
Required time 500.000
Slack: 479.963
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[61] O OBUF FB1_uD 2.804
WRITEDATAWB[61] - Net - -
FB1.uA/WRITEDATAWB_ibuf[61] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[61] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[61] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[61] I IBUF FB1_uB 14.980
equal equal Port top 20.037
======================================================================================
Path: #2911
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.037
Required time 500.000
Slack: 479.963
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[62] O OBUF FB1_uD 2.804
WRITEDATAWB[62] - Net - -
FB1.uA/WRITEDATAWB_ibuf[62] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[62] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[62] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[62] I IBUF FB1_uB 14.980
equal equal Port top 20.037
======================================================================================
Path: #2912
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 20.037
Required time 500.000
Slack: 479.963
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[60] O OBUF FB1_uD 2.804
WRITEDATAWB[60] - Net - -
FB1.uA/WRITEDATAWB_ibuf[60] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[60] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[60] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[60] I IBUF FB1_uB 14.980
equal equal Port top 20.037
======================================================================================
Path: #2913
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.959
Required time 500.000
Slack: 480.041
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[63] O OBUF FB1_uD 2.804
WRITEDATAWB[63] - Net - -
FB1.uA/WRITEDATAWB_ibuf[63] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[63] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[63] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[63] I IBUF FB1_uB 14.980
equal equal Port top 19.959
======================================================================================
Path: #2914
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.928
Required time 500.000
Slack: 480.072
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[4] O OBUF FB1_uD 2.161
WRWB[4] - Net - -
FB1.uA/WRWB_ibuf[4] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.298
WRWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[4] I IBUF FB1_uB 14.444
equal equal Port top 19.928
=============================================================================================
Path: #2915
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 480.894
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2916
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 480.894
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2917
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[34]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[34] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[34] O OBUF FB1_uD 2.161
DMOUTWB[34] - Net - -
FB1.uA/DMOUTWB_ibuf[34] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[34] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[34] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[34] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2918
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[41]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[41] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[41] O OBUF FB1_uD 2.161
DMOUTWB[41] - Net - -
FB1.uA/DMOUTWB_ibuf[41] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[41] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[41] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[41] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2919
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[39]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[39] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[39] O OBUF FB1_uD 2.161
DMOUTWB[39] - Net - -
FB1.uA/DMOUTWB_ibuf[39] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[39] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[39] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[39] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2920
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[40]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[40] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[40] O OBUF FB1_uD 2.161
DMOUTWB[40] - Net - -
FB1.uA/DMOUTWB_ibuf[40] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[40] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[40] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[40] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2921
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[35]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[35] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[35] O OBUF FB1_uD 2.161
DMOUTWB[35] - Net - -
FB1.uA/DMOUTWB_ibuf[35] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[35] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[35] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[35] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2922
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[33]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.035
Required time 500.000
Slack: 480.965
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[33] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[33] O OBUF FB1_uD 2.161
DMOUTWB[33] - Net - -
FB1.uA/DMOUTWB_ibuf[33] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[33] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[33] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[33] I IBUF FB1_uB 14.337
equal equal Port top 19.035
======================================================================================
Path: #2923
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[36]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.033
Required time 500.000
Slack: 480.967
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[36] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[36] O OBUF FB1_uD 2.161
DMOUTWB[36] - Net - -
FB1.uA/DMOUTWB_ibuf[36] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[36] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[36] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[36] I IBUF FB1_uB 14.337
equal equal Port top 19.033
======================================================================================
Path: #2924
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[38]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.033
Required time 500.000
Slack: 480.967
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[38] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[38] O OBUF FB1_uD 2.161
DMOUTWB[38] - Net - -
FB1.uA/DMOUTWB_ibuf[38] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[38] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[38] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[38] I IBUF FB1_uB 14.337
equal equal Port top 19.033
======================================================================================
Path: #2925
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[37]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.033
Required time 500.000
Slack: 480.967
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[37] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[37] O OBUF FB1_uD 2.161
DMOUTWB[37] - Net - -
FB1.uA/DMOUTWB_ibuf[37] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[37] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[37] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[37] I IBUF FB1_uB 14.337
equal equal Port top 19.033
======================================================================================
Path: #2926
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[46]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[46] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[46] O OBUF FB1_uD 2.161
DMOUTWB[46] - Net - -
FB1.uA/DMOUTWB_ibuf[46] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[46] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[46] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[46] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2927
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[42]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[42] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[42] O OBUF FB1_uD 2.161
DMOUTWB[42] - Net - -
FB1.uA/DMOUTWB_ibuf[42] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[42] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[42] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[42] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2928
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[45]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[45] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[45] O OBUF FB1_uD 2.161
DMOUTWB[45] - Net - -
FB1.uA/DMOUTWB_ibuf[45] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[45] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[45] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[45] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2929
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[43]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[43] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[43] O OBUF FB1_uD 2.161
DMOUTWB[43] - Net - -
FB1.uA/DMOUTWB_ibuf[43] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[43] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[43] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[43] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2930
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[47]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[47] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[47] O OBUF FB1_uD 2.161
DMOUTWB[47] - Net - -
FB1.uA/DMOUTWB_ibuf[47] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[47] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[47] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[47] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2931
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[44]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.008
Required time 500.000
Slack: 480.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[44] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[44] O OBUF FB1_uD 2.161
DMOUTWB[44] - Net - -
FB1.uA/DMOUTWB_ibuf[44] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[44] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[44] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[44] I IBUF FB1_uB 14.337
equal equal Port top 19.008
======================================================================================
Path: #2932
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[50]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.987
Required time 500.000
Slack: 481.013
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[50] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[50] O OBUF FB1_uD 2.161
DMOUTWB[50] - Net - -
FB1.uA/DMOUTWB_ibuf[50] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[50] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[50] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[50] I IBUF FB1_uB 14.337
equal equal Port top 18.987
======================================================================================
Path: #2933
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[48]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.987
Required time 500.000
Slack: 481.013
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[48] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[48] O OBUF FB1_uD 2.161
DMOUTWB[48] - Net - -
FB1.uA/DMOUTWB_ibuf[48] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[48] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[48] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[48] I IBUF FB1_uB 14.337
equal equal Port top 18.987
======================================================================================
Path: #2934
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[49]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.987
Required time 500.000
Slack: 481.013
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[49] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[49] O OBUF FB1_uD 2.161
DMOUTWB[49] - Net - -
FB1.uA/DMOUTWB_ibuf[49] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[49] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[49] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[49] I IBUF FB1_uB 14.337
equal equal Port top 18.987
======================================================================================
Path: #2935
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[53]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.985
Required time 500.000
Slack: 481.015
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[53] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[53] O OBUF FB1_uD 2.161
DMOUTWB[53] - Net - -
FB1.uA/DMOUTWB_ibuf[53] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[53] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[53] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[53] I IBUF FB1_uB 14.337
equal equal Port top 18.985
======================================================================================
Path: #2936
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[52]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.985
Required time 500.000
Slack: 481.015
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[52] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[52] O OBUF FB1_uD 2.161
DMOUTWB[52] - Net - -
FB1.uA/DMOUTWB_ibuf[52] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[52] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[52] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[52] I IBUF FB1_uB 14.337
equal equal Port top 18.985
======================================================================================
Path: #2937
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[51]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.985
Required time 500.000
Slack: 481.015
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[51] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[51] O OBUF FB1_uD 2.161
DMOUTWB[51] - Net - -
FB1.uA/DMOUTWB_ibuf[51] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[51] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[51] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[51] I IBUF FB1_uB 14.337
equal equal Port top 18.985
======================================================================================
Path: #2938
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[54]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.961
Required time 500.000
Slack: 481.039
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[54] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[54] O OBUF FB1_uD 2.161
DMOUTWB[54] - Net - -
FB1.uA/DMOUTWB_ibuf[54] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[54] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[54] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[54] I IBUF FB1_uB 14.337
equal equal Port top 18.961
======================================================================================
Path: #2939
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[56]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.961
Required time 500.000
Slack: 481.039
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[56] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[56] O OBUF FB1_uD 2.161
DMOUTWB[56] - Net - -
FB1.uA/DMOUTWB_ibuf[56] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[56] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[56] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[56] I IBUF FB1_uB 14.337
equal equal Port top 18.961
======================================================================================
Path: #2940
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[55]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.961
Required time 500.000
Slack: 481.039
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[55] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[55] O OBUF FB1_uD 2.161
DMOUTWB[55] - Net - -
FB1.uA/DMOUTWB_ibuf[55] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[55] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[55] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[55] I IBUF FB1_uB 14.337
equal equal Port top 18.961
======================================================================================
Path: #2941
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[58]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.951
Required time 500.000
Slack: 481.049
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[58] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[58] O OBUF FB1_uD 2.161
DMOUTWB[58] - Net - -
FB1.uA/DMOUTWB_ibuf[58] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[58] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[58] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[58] I IBUF FB1_uB 14.337
equal equal Port top 18.951
======================================================================================
Path: #2942
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[57]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.951
Required time 500.000
Slack: 481.049
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[57] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[57] O OBUF FB1_uD 2.161
DMOUTWB[57] - Net - -
FB1.uA/DMOUTWB_ibuf[57] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[57] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[57] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[57] I IBUF FB1_uB 14.337
equal equal Port top 18.951
======================================================================================
Path: #2943
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[59]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.951
Required time 500.000
Slack: 481.049
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[59] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[59] O OBUF FB1_uD 2.161
DMOUTWB[59] - Net - -
FB1.uA/DMOUTWB_ibuf[59] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[59] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[59] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[59] I IBUF FB1_uB 14.337
equal equal Port top 18.951
======================================================================================
Path: #2944
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[62]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.936
Required time 500.000
Slack: 481.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[62] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[62] O OBUF FB1_uD 2.161
DMOUTWB[62] - Net - -
FB1.uA/DMOUTWB_ibuf[62] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[62] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[62] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[62] I IBUF FB1_uB 14.337
equal equal Port top 18.936
======================================================================================
Path: #2945
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[61]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.936
Required time 500.000
Slack: 481.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[61] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[61] O OBUF FB1_uD 2.161
DMOUTWB[61] - Net - -
FB1.uA/DMOUTWB_ibuf[61] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[61] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[61] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[61] I IBUF FB1_uB 14.337
equal equal Port top 18.936
======================================================================================
Path: #2946
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[60]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.936
Required time 500.000
Slack: 481.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[60] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[60] O OBUF FB1_uD 2.161
DMOUTWB[60] - Net - -
FB1.uA/DMOUTWB_ibuf[60] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[60] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[60] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[60] I IBUF FB1_uB 14.337
equal equal Port top 18.936
======================================================================================
Path: #2947
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.934
Required time 500.000
Slack: 481.066
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[1] O OBUF FB1_uD 2.804
WRITEDATAWB[1] - Net - -
FB1.uA/WRITEDATAWB_ibuf[1] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[1] I IBUF FB1_uB 13.694
equal equal Port top 18.934
=====================================================================================
Path: #2948
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.934
Required time 500.000
Slack: 481.066
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[2] O OBUF FB1_uD 2.804
WRITEDATAWB[2] - Net - -
FB1.uA/WRITEDATAWB_ibuf[2] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[2] I IBUF FB1_uB 13.694
equal equal Port top 18.934
=====================================================================================
Path: #2949
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.934
Required time 500.000
Slack: 481.066
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[0] O OBUF FB1_uD 2.804
WRITEDATAWB[0] - Net - -
FB1.uA/WRITEDATAWB_ibuf[0] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[0] I IBUF FB1_uB 13.694
equal equal Port top 18.934
=====================================================================================
Path: #2950
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.120
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2951
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[63]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.858
Required time 500.000
Slack: 481.142
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[63] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[63] O OBUF FB1_uD 2.161
DMOUTWB[63] - Net - -
FB1.uA/DMOUTWB_ibuf[63] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[63] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[63] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[63] I IBUF FB1_uB 14.337
equal equal Port top 18.858
======================================================================================
Path: #2952
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[2]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.821
Required time 500.000
Slack: 481.179
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[2] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[2] O OBUF FB1_uD 2.161
DMOUTWB[2] - Net - -
FB1.uA/DMOUTWB_ibuf[2] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[2] I IBUF FB1_uB 14.048
equal equal Port top 18.821
=====================================================================================
Path: #2953
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[1]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.821
Required time 500.000
Slack: 481.179
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[1] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[1] O OBUF FB1_uD 2.161
DMOUTWB[1] - Net - -
FB1.uA/DMOUTWB_ibuf[1] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[1] I IBUF FB1_uB 14.048
equal equal Port top 18.821
=====================================================================================
Path: #2954
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[0]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.821
Required time 500.000
Slack: 481.179
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[0] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[0] O OBUF FB1_uD 2.161
DMOUTWB[0] - Net - -
FB1.uA/DMOUTWB_ibuf[0] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[0] I IBUF FB1_uB 14.048
equal equal Port top 18.821
=====================================================================================
Path: #2955
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.181
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2956
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[3]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.819
Required time 500.000
Slack: 481.182
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[3] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[3] O OBUF FB1_uD 2.161
DMOUTWB[3] - Net - -
FB1.uA/DMOUTWB_ibuf[3] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[3] I IBUF FB1_uB 14.048
equal equal Port top 18.819
=====================================================================================
Path: #2957
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[5]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.819
Required time 500.000
Slack: 481.182
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[5] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[5] O OBUF FB1_uD 2.161
DMOUTWB[5] - Net - -
FB1.uA/DMOUTWB_ibuf[5] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[5] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[5] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[5] I IBUF FB1_uB 14.048
equal equal Port top 18.819
=====================================================================================
Path: #2958
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[7]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.799
Required time 500.000
Slack: 481.201
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[7] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[7] O OBUF FB1_uD 2.161
DMOUTWB[7] - Net - -
FB1.uA/DMOUTWB_ibuf[7] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[7] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[7] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[7] I IBUF FB1_uB 14.048
equal equal Port top 18.799
=====================================================================================
Path: #2959
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[10]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.799
Required time 500.000
Slack: 481.201
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[10] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[10] O OBUF FB1_uD 2.161
DMOUTWB[10] - Net - -
FB1.uA/DMOUTWB_ibuf[10] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[10] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[10] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[10] I IBUF FB1_uB 14.048
equal equal Port top 18.799
======================================================================================
Path: #2960
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[6]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.799
Required time 500.000
Slack: 481.201
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[6] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[6] O OBUF FB1_uD 2.161
DMOUTWB[6] - Net - -
FB1.uA/DMOUTWB_ibuf[6] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[6] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[6] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[6] I IBUF FB1_uB 14.048
equal equal Port top 18.799
=====================================================================================
Path: #2961
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[8]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.799
Required time 500.000
Slack: 481.201
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[8] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[8] O OBUF FB1_uD 2.161
DMOUTWB[8] - Net - -
FB1.uA/DMOUTWB_ibuf[8] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[8] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[8] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[8] I IBUF FB1_uB 14.048
equal equal Port top 18.799
=====================================================================================
Path: #2962
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[9]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.799
Required time 500.000
Slack: 481.201
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[9] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[9] O OBUF FB1_uD 2.161
DMOUTWB[9] - Net - -
FB1.uA/DMOUTWB_ibuf[9] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[9] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[9] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[9] I IBUF FB1_uB 14.048
equal equal Port top 18.799
=====================================================================================
Path: #2963
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.204
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2964
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.204
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2965
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.204
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
=======================================================================================
Path: #2966
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[11]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.782
Required time 500.000
Slack: 481.218
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[11] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[11] O OBUF FB1_uD 2.161
DMOUTWB[11] - Net - -
FB1.uA/DMOUTWB_ibuf[11] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[11] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[11] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[11] I IBUF FB1_uB 14.048
equal equal Port top 18.782
======================================================================================
Path: #2967
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[12]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.781
Required time 500.000
Slack: 481.219
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[12] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[12] O OBUF FB1_uD 2.161
DMOUTWB[12] - Net - -
FB1.uA/DMOUTWB_ibuf[12] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[12] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[12] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[12] I IBUF FB1_uB 14.048
equal equal Port top 18.781
======================================================================================
Path: #2968
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[13]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 18.781
Required time 500.000
Slack: 481.219
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[13] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[13] O OBUF FB1_uD 2.161
DMOUTWB[13] - Net - -
FB1.uA/DMOUTWB_ibuf[13] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[13] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[13] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[13] I IBUF FB1_uB 14.048
equal equal Port top 18.781
======================================================================================
Path: #2969
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.338
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2970
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.338
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2971
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.338
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2972
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.338
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2973
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[17]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[17] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[17] O OBUF FB1_uA 2.116
INSTRUCID[17] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[17] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2974
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[18]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[18] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[18] O OBUF FB1_uA 2.116
INSTRUCID[18] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[18] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2975
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[15]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[15] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[15] O OBUF FB1_uA 2.116
INSTRUCID[15] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[15] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2976
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[16]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[16] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[16] O OBUF FB1_uA 2.116
INSTRUCID[16] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[16] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2977
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: IMMID[63:0]/IMMID[12]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 19.106
Required time 500.000
Slack: 481.726
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.N_1_obuf O OBUF FB1_uB 9.776
N_1 - Net - -
FB1.uA/dut_inst.N_1_ibuf I IBUF FB1_uA 15.647
IMMID[63:0] IMMID[12] Port top 19.106
========================================================================================
Path: #2978
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.777
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2979
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[19]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 481.777
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[19] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[19] O OBUF FB1_uA 2.116
INSTRUCID[19] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[19] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #2980
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[4]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.822
Required time 500.000
Slack: 482.179
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[4] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[4] O OBUF FB1_uD 2.161
DMOUTWB[4] - Net - -
FB1.uA/DMOUTWB_ibuf[4] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[4] I IBUF FB1_uB 13.051
equal equal Port top 17.822
=====================================================================================
Path: #2981
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[16]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.785
Required time 500.000
Slack: 482.215
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[16] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[16] O OBUF FB1_uD 2.161
DMOUTWB[16] - Net - -
FB1.uA/DMOUTWB_ibuf[16] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[16] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[16] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[16] I IBUF FB1_uB 13.051
equal equal Port top 17.785
======================================================================================
Path: #2982
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[17]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.785
Required time 500.000
Slack: 482.215
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[17] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[17] O OBUF FB1_uD 2.161
DMOUTWB[17] - Net - -
FB1.uA/DMOUTWB_ibuf[17] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[17] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[17] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[17] I IBUF FB1_uB 13.051
equal equal Port top 17.785
======================================================================================
Path: #2983
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[15]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.785
Required time 500.000
Slack: 482.215
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[15] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[15] O OBUF FB1_uD 2.161
DMOUTWB[15] - Net - -
FB1.uA/DMOUTWB_ibuf[15] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[15] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[15] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[15] I IBUF FB1_uB 13.051
equal equal Port top 17.785
======================================================================================
Path: #2984
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[14]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.784
Required time 500.000
Slack: 482.216
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[14] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[14] O OBUF FB1_uD 2.161
DMOUTWB[14] - Net - -
FB1.uA/DMOUTWB_ibuf[14] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[14] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[14] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[14] I IBUF FB1_uB 13.051
equal equal Port top 17.784
======================================================================================
Path: #2985
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[25]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.770
Required time 500.000
Slack: 482.230
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[25] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[25] O OBUF FB1_uD 2.161
DMOUTWB[25] - Net - -
FB1.uA/DMOUTWB_ibuf[25] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[25] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[25] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[25] I IBUF FB1_uB 13.051
equal equal Port top 17.770
======================================================================================
Path: #2986
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[26]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.770
Required time 500.000
Slack: 482.230
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[26] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[26] O OBUF FB1_uD 2.161
DMOUTWB[26] - Net - -
FB1.uA/DMOUTWB_ibuf[26] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[26] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[26] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[26] I IBUF FB1_uB 13.051
equal equal Port top 17.770
======================================================================================
Path: #2987
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[24]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.770
Required time 500.000
Slack: 482.230
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[24] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[24] O OBUF FB1_uD 2.161
DMOUTWB[24] - Net - -
FB1.uA/DMOUTWB_ibuf[24] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[24] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[24] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[24] I IBUF FB1_uB 13.051
equal equal Port top 17.770
======================================================================================
Path: #2988
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[29]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.768
Required time 500.000
Slack: 482.232
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[29] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[29] O OBUF FB1_uD 2.161
DMOUTWB[29] - Net - -
FB1.uA/DMOUTWB_ibuf[29] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[29] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[29] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[29] I IBUF FB1_uB 13.051
equal equal Port top 17.768
======================================================================================
Path: #2989
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[28]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.768
Required time 500.000
Slack: 482.232
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[28] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[28] O OBUF FB1_uD 2.161
DMOUTWB[28] - Net - -
FB1.uA/DMOUTWB_ibuf[28] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[28] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[28] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[28] I IBUF FB1_uB 13.051
equal equal Port top 17.768
======================================================================================
Path: #2990
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[27]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.768
Required time 500.000
Slack: 482.232
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[27] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[27] O OBUF FB1_uD 2.161
DMOUTWB[27] - Net - -
FB1.uA/DMOUTWB_ibuf[27] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[27] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[27] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[27] I IBUF FB1_uB 13.051
equal equal Port top 17.768
======================================================================================
Path: #2991
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[22]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[22] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[22] O OBUF FB1_uD 2.161
DMOUTWB[22] - Net - -
FB1.uA/DMOUTWB_ibuf[22] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[22] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[22] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[22] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2992
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[20]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[20] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[20] O OBUF FB1_uD 2.161
DMOUTWB[20] - Net - -
FB1.uA/DMOUTWB_ibuf[20] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[20] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[20] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[20] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2993
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[21]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[21] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[21] O OBUF FB1_uD 2.161
DMOUTWB[21] - Net - -
FB1.uA/DMOUTWB_ibuf[21] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[21] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[21] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[21] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2994
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[18]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[18] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[18] O OBUF FB1_uD 2.161
DMOUTWB[18] - Net - -
FB1.uA/DMOUTWB_ibuf[18] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[18] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[18] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[18] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2995
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[19]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[19] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[19] O OBUF FB1_uD 2.161
DMOUTWB[19] - Net - -
FB1.uA/DMOUTWB_ibuf[19] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[19] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[19] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[19] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2996
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[23]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.759
Required time 500.000
Slack: 482.241
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[23] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[23] O OBUF FB1_uD 2.161
DMOUTWB[23] - Net - -
FB1.uA/DMOUTWB_ibuf[23] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[23] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[23] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[23] I IBUF FB1_uB 13.051
equal equal Port top 17.759
======================================================================================
Path: #2997
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[30]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.749
Required time 500.000
Slack: 482.251
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[30] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[30] O OBUF FB1_uD 2.161
DMOUTWB[30] - Net - -
FB1.uA/DMOUTWB_ibuf[30] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[30] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[30] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[30] I IBUF FB1_uB 13.051
equal equal Port top 17.749
======================================================================================
Path: #2998
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[32]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.749
Required time 500.000
Slack: 482.251
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[32] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[32] O OBUF FB1_uD 2.161
DMOUTWB[32] - Net - -
FB1.uA/DMOUTWB_ibuf[32] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[32] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[32] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[32] I IBUF FB1_uB 13.051
equal equal Port top 17.749
======================================================================================
Path: #2999
Starting point: FB1.uD/dut_inst.memwb1.dmout_out[31]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 17.749
Required time 500.000
Slack: 482.251
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.dmout_out[31] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.DMOUTWB_obuf[31] O OBUF FB1_uD 2.161
DMOUTWB[31] - Net - -
FB1.uA/DMOUTWB_ibuf[31] I IBUF FB1_uA 7.209
FB1.uA/DMOUTWB_aptn_ft_obuf[31] O OBUF FB1_uA 9.298
DMOUTWB_aptn_ft[31] - Net - -
FB1.uB/dut_inst.DMOUTWB_ibuf[31] I IBUF FB1_uB 13.051
equal equal Port top 17.749
======================================================================================
Path: #3000
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[15]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.518
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[15] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[15] O OBUF FB1_uC 2.222
ALUOUTMEM[15] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[15] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3001
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[17]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.518
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[17] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[17] O OBUF FB1_uC 2.222
ALUOUTMEM[17] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[17] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3002
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[16]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.518
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[16] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[16] O OBUF FB1_uC 2.222
ALUOUTMEM[16] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[16] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3003
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[14]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[14] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[14] O OBUF FB1_uC 2.222
ALUOUTMEM[14] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[14] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3004
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[13]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[13] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[13] O OBUF FB1_uC 2.222
ALUOUTMEM[13] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[13] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3005
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[24]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.533
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[24] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[24] O OBUF FB1_uC 2.222
ALUOUTMEM[24] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[24] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3006
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[26]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.533
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[26] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[26] O OBUF FB1_uC 2.222
ALUOUTMEM[26] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[26] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3007
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[25]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.533
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[25] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[25] O OBUF FB1_uC 2.222
ALUOUTMEM[25] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[25] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3008
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[28]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.535
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[28] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[28] O OBUF FB1_uC 2.222
ALUOUTMEM[28] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[28] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3009
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[27]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.535
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[27] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[27] O OBUF FB1_uC 2.222
ALUOUTMEM[27] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[27] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3010
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[29]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.535
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[29] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[29] O OBUF FB1_uC 2.222
ALUOUTMEM[29] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[29] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3011
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[20]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[20] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[20] O OBUF FB1_uC 2.222
ALUOUTMEM[20] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[20] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3012
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[23]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[23] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[23] O OBUF FB1_uC 2.222
ALUOUTMEM[23] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[23] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3013
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[21]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[21] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[21] O OBUF FB1_uC 2.222
ALUOUTMEM[21] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[21] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3014
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[22]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[22] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[22] O OBUF FB1_uC 2.222
ALUOUTMEM[22] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[22] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3015
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[19]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[19] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[19] O OBUF FB1_uC 2.222
ALUOUTMEM[19] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[19] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3016
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[18]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[18] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[18] O OBUF FB1_uC 2.222
ALUOUTMEM[18] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[18] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3017
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[31]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[31] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[31] O OBUF FB1_uC 2.222
ALUOUTMEM[31] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[31] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3018
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[32]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[32] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[32] O OBUF FB1_uC 2.222
ALUOUTMEM[32] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[32] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3019
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[39]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[39] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[39] O OBUF FB1_uC 2.222
ALUOUTMEM[39] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[39] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3020
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[33]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[33] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[33] O OBUF FB1_uC 2.222
ALUOUTMEM[33] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[33] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3021
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[40]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[40] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[40] O OBUF FB1_uC 2.222
ALUOUTMEM[40] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[40] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3022
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[41]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[41] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[41] O OBUF FB1_uC 2.222
ALUOUTMEM[41] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[41] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3023
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[30]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[30] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[30] O OBUF FB1_uC 2.222
ALUOUTMEM[30] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[30] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3024
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[34]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[34] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[34] O OBUF FB1_uC 2.222
ALUOUTMEM[34] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[34] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3025
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[35]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.554
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[35] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[35] O OBUF FB1_uC 2.222
ALUOUTMEM[35] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[35] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3026
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[38]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[38] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[38] O OBUF FB1_uC 2.222
ALUOUTMEM[38] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[38] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3027
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[37]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[37] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[37] O OBUF FB1_uC 2.222
ALUOUTMEM[37] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[37] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3028
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[36]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[36] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[36] O OBUF FB1_uC 2.222
ALUOUTMEM[36] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[36] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3029
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[45]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[45] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[45] O OBUF FB1_uC 2.222
ALUOUTMEM[45] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[45] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3030
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[43]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[43] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[43] O OBUF FB1_uC 2.222
ALUOUTMEM[43] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[43] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3031
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[46]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[46] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[46] O OBUF FB1_uC 2.222
ALUOUTMEM[46] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[46] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3032
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[44]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[44] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[44] O OBUF FB1_uC 2.222
ALUOUTMEM[44] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[44] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3033
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[47]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[47] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[47] O OBUF FB1_uC 2.222
ALUOUTMEM[47] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[47] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3034
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[42]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[42] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[42] O OBUF FB1_uC 2.222
ALUOUTMEM[42] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[42] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3035
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[49]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.602
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[49] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[49] O OBUF FB1_uC 2.222
ALUOUTMEM[49] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[49] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3036
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[50]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.602
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[50] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[50] O OBUF FB1_uC 2.222
ALUOUTMEM[50] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[50] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3037
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[48]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.602
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[48] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[48] O OBUF FB1_uC 2.222
ALUOUTMEM[48] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[48] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3038
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[52]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.604
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[52] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[52] O OBUF FB1_uC 2.222
ALUOUTMEM[52] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[52] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3039
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[53]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.604
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[53] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[53] O OBUF FB1_uC 2.222
ALUOUTMEM[53] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[53] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3040
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[51]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.604
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[51] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[51] O OBUF FB1_uC 2.222
ALUOUTMEM[51] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[51] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3041
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[11]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.625
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[11] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[11] O OBUF FB1_uC 2.222
ALUOUTMEM[11] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[11] I IBUF FB1_uB 7.261
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3042
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[12]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.626
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[12] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[12] O OBUF FB1_uC 2.222
ALUOUTMEM[12] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[12] I IBUF FB1_uB 7.261
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3043
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[55]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.628
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[55] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[55] O OBUF FB1_uC 2.222
ALUOUTMEM[55] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[55] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3044
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[56]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.628
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[56] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[56] O OBUF FB1_uC 2.222
ALUOUTMEM[56] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[56] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3045
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[54]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.628
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[54] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[54] O OBUF FB1_uC 2.222
ALUOUTMEM[54] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[54] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3046
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[59]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.638
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[59] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[59] O OBUF FB1_uC 2.222
ALUOUTMEM[59] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[59] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3047
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[57]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.638
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[57] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[57] O OBUF FB1_uC 2.222
ALUOUTMEM[57] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[57] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3048
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[58]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 482.638
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[58] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[58] O OBUF FB1_uC 2.222
ALUOUTMEM[58] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[58] I IBUF FB1_uB 7.368
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
=======================================================================================
Path: #3049
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3050
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3051
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3052
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3053
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.850
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3054
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.850
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3055
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.850
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3056
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3057
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3058
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.851
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3059
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 482.887
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3060
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 482.887
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3061
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 482.900
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3062
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 482.900
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3063
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 482.900
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3064
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 482.908
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3065
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 482.908
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3066
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 482.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3067
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 482.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3068
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 482.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3069
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 482.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3070
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 482.921
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3071
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 482.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3072
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 482.925
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3073
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 482.934
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3074
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 482.934
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3075
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 482.934
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3076
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 482.938
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3077
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 482.938
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3078
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 482.938
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3079
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 482.941
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3080
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 482.941
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3081
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 482.946
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3082
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 482.946
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3083
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 482.955
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3084
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 482.955
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3085
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 482.955
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3086
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 482.957
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3087
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 482.957
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3088
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 482.958
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3089
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 482.958
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3090
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 482.959
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3091
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 482.959
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3092
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 482.959
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3093
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 482.960
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3094
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 482.960
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3095
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 482.961
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3096
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 482.961
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3097
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 482.961
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3098
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 482.961
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3099
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 482.964
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3100
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 482.964
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3101
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 482.970
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3102
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 482.970
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3103
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 482.970
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3104
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 482.971
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3105
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 482.971
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3106
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 482.971
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3107
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 482.973
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3108
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 482.973
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3109
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 482.973
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3110
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3111
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3112
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3113
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3114
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3115
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 482.974
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3116
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 482.977
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3117
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 482.977
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3118
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 482.977
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3119
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 482.978
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3120
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 482.978
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3121
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 482.978
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3122
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 482.978
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3123
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.980
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3124
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.980
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3125
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.981
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3126
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.981
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3127
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 482.983
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3128
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 482.983
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3129
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 482.991
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3130
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 482.991
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3131
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 482.991
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3132
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3133
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3134
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3135
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3136
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3137
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3138
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3139
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 482.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3140
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 482.996
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3141
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 482.996
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3142
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 482.996
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3143
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 482.997
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3144
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 482.997
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3145
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 482.998
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3146
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 482.998
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3147
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.007
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3148
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.007
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3149
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.007
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3150
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.010
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3151
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.010
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3152
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.010
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3153
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3154
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3155
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3156
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.017
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3157
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.017
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3158
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.018
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3159
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.018
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3160
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.019
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3161
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.019
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3162
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.028
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3163
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3164
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3165
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3166
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3167
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.030
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3168
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3169
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3170
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3171
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3172
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3173
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3174
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3175
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.033
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3176
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3177
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3178
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3179
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3180
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.043
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3181
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.043
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3182
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.043
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3183
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.044
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3184
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.044
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3185
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.044
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3186
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3187
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3188
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3189
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.048
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3190
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.048
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3191
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.048
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3192
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.049
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3193
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.051
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3194
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.051
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3195
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.054
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3196
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.054
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3197
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.054
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3198
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.054
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3199
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.056
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3200
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.056
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3201
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.062
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3202
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.062
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3203
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.063
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3204
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3205
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3206
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.064
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3207
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.066
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3208
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3209
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3210
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3211
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3212
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3213
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3214
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3215
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.067
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3216
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.069
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3217
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.069
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3218
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.069
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3219
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.070
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3220
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.070
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3221
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.073
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3222
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.073
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3223
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3224
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3225
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3226
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.082
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3227
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.084
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3228
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.084
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3229
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.084
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3230
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.086
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3231
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.086
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3232
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.086
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3233
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.087
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3234
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.088
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3235
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.088
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3236
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.090
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3237
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.090
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3238
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.091
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3239
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.091
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3240
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.093
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3241
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.093
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3242
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.098
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3243
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.099
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3244
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.101
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3245
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.101
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3246
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.101
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3247
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.101
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3248
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.102
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3249
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.102
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3250
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.103
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3251
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.103
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3252
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.103
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3253
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.103
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3254
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.103
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3255
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.104
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3256
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.104
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3257
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.104
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3258
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.105
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3259
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.106
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3260
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.106
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3261
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.106
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3262
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.107
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3263
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.107
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3264
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.113
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3265
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.117
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3266
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.117
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3267
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.117
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3268
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.119
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3269
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.120
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3270
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.120
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3271
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.120
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3272
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.121
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3273
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.122
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3274
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.124
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3275
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.133
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3276
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.135
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3277
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.138
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3278
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.139
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3279
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.147
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3280
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.148
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3281
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.150
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3282
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.158
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3283
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.159
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3284
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.160
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3285
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.167
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3286
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.171
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3287
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.171
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3288
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.172
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3289
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.172
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3290
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.175
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3291
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.175
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3292
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.183
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3293
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.183
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3294
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.185
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3295
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.186
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3296
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.186
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3297
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.187
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3298
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.190
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3299
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.190
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3300
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.190
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3301
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.192
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3302
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.195
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3303
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.195
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3304
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.197
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3305
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.204
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3306
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.206
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3307
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.207
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3308
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.208
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3309
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.208
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3310
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.211
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3311
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.214
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3312
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.219
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3313
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.221
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3314
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.221
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3315
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.222
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3316
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 483.222
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
======================================================================================
Path: #3317
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.223
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3318
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.223
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3319
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.229
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3320
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.231
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3321
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.232
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3322
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.234
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3323
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.234
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3324
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.234
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3325
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.234
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3326
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.243
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3327
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.243
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3328
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.244
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3329
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.245
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3330
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.248
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3331
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.256
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3332
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.256
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3333
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.259
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3334
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.260
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3335
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.277
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3336
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.279
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3337
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.280
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3338
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.282
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3339
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.293
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3340
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.296
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3341
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.299
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3342
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.313
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3343
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.316
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3344
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.316
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3345
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.318
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3346
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.329
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3347
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.333
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3348
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3349
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3350
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[17]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[17] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[17] O OBUF FB1_uA 2.116
INSTRUCID[17] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[17] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3351
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[18]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[18] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[18] O OBUF FB1_uA 2.116
INSTRUCID[18] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[18] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3352
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.338
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3353
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.416
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3354
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.416
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3355
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.430
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3356
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.430
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3357
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.433
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3358
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.433
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3359
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.435
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3360
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.435
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3361
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.436
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3362
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.436
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3363
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.436
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3364
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.437
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3365
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3366
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3367
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3368
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3369
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3370
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3371
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.446
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3372
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.450
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3373
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.450
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3374
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.452
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3375
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.452
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3376
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3377
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.453
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3378
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.455
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3379
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.455
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3380
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.457
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3381
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.458
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3382
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.460
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3383
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.460
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3384
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[15]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.460
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[15] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[15] O OBUF FB1_uA 2.116
INSTRUCID[15] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[15] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3385
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[16]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.460
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[16] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[16] O OBUF FB1_uA 2.116
INSTRUCID[16] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[16] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3386
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.463
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3387
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.463
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3388
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.463
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3389
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3390
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3391
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3392
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3393
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3394
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3395
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.466
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3396
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3397
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3398
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.468
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3399
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.472
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3400
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.472
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3401
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.476
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3402
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.476
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3403
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.477
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3404
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.477
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3405
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.485
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3406
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.485
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3407
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.487
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3408
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.487
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3409
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.498
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3410
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.498
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3411
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.499
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3412
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.499
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3413
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.500
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3414
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3415
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.502
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3416
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.504
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3417
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.506
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3418
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.506
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3419
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.507
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3420
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.507
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3421
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.511
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3422
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.511
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3423
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.511
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3424
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.512
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3425
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.512
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3426
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.512
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3427
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3428
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3429
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.515
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3430
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3431
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.519
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3432
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.520
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3433
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.520
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3434
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.520
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3435
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.520
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3436
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.522
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3437
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.523
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3438
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.523
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3439
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.524
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3440
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.525
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3441
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.526
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3442
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.526
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3443
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.528
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3444
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.533
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3445
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.533
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3446
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.533
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3447
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.536
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3448
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.537
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3449
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.539
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3450
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3451
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3452
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.540
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3453
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.540
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3454
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.541
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3455
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.541
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3456
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.543
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3457
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.543
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3458
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.544
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3459
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.544
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3460
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.545
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3461
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.546
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3462
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.547
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3463
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.547
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3464
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.555
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3465
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.555
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3466
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.556
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3467
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3468
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3469
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.556
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3470
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.557
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3471
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.557
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3472
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.558
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3473
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.558
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3474
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3475
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3476
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3477
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3478
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3479
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.559
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3480
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.560
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3481
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.560
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3482
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.560
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3483
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.560
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3484
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.560
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3485
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.561
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3486
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.562
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3487
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.562
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3488
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.562
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3489
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.562
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3490
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.563
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3491
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.564
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3492
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.564
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3493
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.566
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3494
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.571
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3495
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3496
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.572
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3497
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.573
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3498
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.574
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3499
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3500
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.576
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3501
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.576
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3502
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.576
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3503
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.577
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3504
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.577
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3505
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.577
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3506
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.577
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3507
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.577
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3508
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.578
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3509
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.579
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3510
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.579
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3511
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.579
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3512
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.579
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3513
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.580
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3514
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.580
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3515
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.580
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3516
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3517
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3518
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3519
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3520
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3521
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3522
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.581
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3523
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.582
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3524
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.584
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3525
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.586
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3526
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.586
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3527
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3528
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3529
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.586
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3530
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3531
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3532
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.590
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3533
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.591
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3534
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.592
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3535
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.592
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3536
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.592
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3537
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.593
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3538
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.593
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3539
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.593
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3540
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.594
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3541
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.595
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3542
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.595
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3543
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.595
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3544
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3545
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3546
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3547
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3548
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3549
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3550
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3551
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.596
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3552
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.597
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3553
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.597
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3554
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.597
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3555
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.597
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3556
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.597
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3557
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.598
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3558
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.598
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3559
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.599
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3560
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.599
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3561
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.599
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3562
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.600
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3563
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.600
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3564
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.601
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3565
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.601
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3566
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.601
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3567
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.601
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3568
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.602
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3569
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[19]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.602
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[19] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[19] O OBUF FB1_uA 2.116
INSTRUCID[19] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[19] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
=======================================================================================
Path: #3570
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.603
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3571
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.603
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3572
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.603
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3573
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.609
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3574
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.610
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3575
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.613
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3576
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.613
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3577
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.613
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3578
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.614
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3579
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3580
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.615
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3581
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.615
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3582
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.616
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3583
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.616
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3584
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.616
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3585
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.616
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3586
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.617
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3587
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.617
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3588
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.617
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3589
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.617
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3590
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.618
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3591
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.618
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3592
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.618
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3593
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.618
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3594
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.619
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3595
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.620
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3596
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.620
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3597
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.620
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3598
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.620
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3599
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.622
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3600
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.622
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3601
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.628
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3602
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.628
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3603
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.629
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3604
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.629
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3605
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.629
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3606
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.630
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3607
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.630
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3608
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.630
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3609
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.632
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3610
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.632
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3611
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.632
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3612
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3613
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3614
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3615
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3616
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3617
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3618
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3619
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.633
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3620
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.634
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3621
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.635
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3622
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3623
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3624
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3625
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3626
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3627
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.638
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3628
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3629
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.639
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3630
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3631
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.640
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
======================================================================================
Path: #3632
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.641
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
======================================================================================
Path: #3633
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.644
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3634
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.646
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3635
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.649
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3636
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.649
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3637
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.649
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3638
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.650
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3639
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.651
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3640
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.651
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3641
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3642
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3643
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3644
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3645
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3646
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.652
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3647
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.653
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3648
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.653
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3649
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.654
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3650
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.654
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3651
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.654
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3652
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.654
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3653
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.654
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3654
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.655
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3655
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 483.655
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3656
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.655
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3657
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.656
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3658
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.656
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3659
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.657
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3660
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.657
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3661
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 483.659
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3662
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.659
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3663
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.659
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3664
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.661
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3665
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.665
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3666
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.666
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3667
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.666
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3668
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.666
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3669
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.667
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3670
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.667
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3671
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.669
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3672
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3673
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.669
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3674
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.669
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3675
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.669
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3676
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3677
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3678
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3679
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3680
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3681
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3682
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.671
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3683
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.671
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3684
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.671
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3685
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.672
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3686
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.673
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3687
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.673
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3688
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.673
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3689
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.674
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3690
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.674
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3691
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.674
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3692
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.674
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3693
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 483.675
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3694
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.676
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3695
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.678
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3696
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 483.679
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3697
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 483.680
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3698
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.682
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3699
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.686
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3700
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.686
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3701
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.686
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3702
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.686
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3703
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.687
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3704
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.688
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3705
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.688
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3706
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.688
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3707
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.689
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3708
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.689
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3709
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.689
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3710
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.689
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3711
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.690
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3712
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.690
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3713
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3714
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3715
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3716
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
======================================================================================
Path: #3717
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3718
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3719
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3720
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.692
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3721
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.693
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3722
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.693
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3723
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.693
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3724
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.693
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3725
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3726
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3727
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3728
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.695
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3729
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.695
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3730
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3731
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.702
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3732
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3733
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.703
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3734
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3735
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.705
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3736
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.705
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3737
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.705
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3738
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.706
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3739
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.707
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3740
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.707
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3741
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.708
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3742
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.708
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3743
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.709
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3744
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.710
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3745
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.710
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3746
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.710
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3747
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.711
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3748
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.711
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
======================================================================================
Path: #3749
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.713
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3750
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.713
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3751
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.713
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3752
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.723
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3753
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 483.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3754
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.724
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3755
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 483.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3756
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.724
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
======================================================================================
Path: #3757
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.725
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3758
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.726
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3759
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.727
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3760
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.727
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3761
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.727
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3762
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.728
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3763
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 483.728
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3764
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.728
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
======================================================================================
Path: #3765
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.730
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3766
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.730
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3767
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.730
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3768
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.730
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3769
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.732
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3770
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.732
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3771
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.738
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3772
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.742
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3773
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.743
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3774
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.743
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3775
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.744
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3776
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.745
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
======================================================================================
Path: #3777
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 483.746
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3778
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.746
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3779
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.746
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3780
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.750
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
======================================================================================
Path: #3781
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.760
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
======================================================================================
Path: #3782
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.761
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
======================================================================================
Path: #3783
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.763
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3784
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.763
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
======================================================================================
Path: #3785
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.764
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
======================================================================================
Path: #3786
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.764
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3787
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.765
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
======================================================================================
Path: #3788
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.767
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
======================================================================================
Path: #3789
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.778
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3790
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.781
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3791
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.781
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
======================================================================================
Path: #3792
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.784
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
======================================================================================
Path: #3793
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.784
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
======================================================================================
Path: #3794
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.785
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3795
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.786
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
======================================================================================
Path: #3796
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 483.788
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3797
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 483.789
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3798
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.797
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
======================================================================================
Path: #3799
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 483.798
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #3800
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.798
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3801
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.800
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3802
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.800
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3803
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.801
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
======================================================================================
Path: #3804
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.801
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
======================================================================================
Path: #3805
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 483.802
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #3806
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.803
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3807
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.804
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3808
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.804
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3809
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.814
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3810
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.814
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3811
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.816
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3812
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.817
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3813
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.818
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3814
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.820
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
======================================================================================
Path: #3815
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.821
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3816
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.821
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
======================================================================================
Path: #3817
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.823
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
======================================================================================
Path: #3818
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.834
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
======================================================================================
Path: #3819
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.834
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
======================================================================================
Path: #3820
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.835
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3821
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.837
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3822
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.837
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
======================================================================================
Path: #3823
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.838
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3824
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.838
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
======================================================================================
Path: #3825
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 483.839
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #3826
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.839
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3827
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 483.841
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
=======================================================================================
Path: #3828
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.850
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3829
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.854
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3830
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.854
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3831
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.855
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
======================================================================================
Path: #3832
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.857
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
======================================================================================
Path: #3833
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.858
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
======================================================================================
Path: #3834
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 483.859
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #3835
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.859
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
======================================================================================
Path: #3836
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.871
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
======================================================================================
Path: #3837
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 483.872
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #3838
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.874
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3839
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.874
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
======================================================================================
Path: #3840
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.874
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3841
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.876
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3842
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 483.876
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #3843
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.877
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
======================================================================================
Path: #3844
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.887
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3845
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.887
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3846
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.890
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3847
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.891
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3848
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.891
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
======================================================================================
Path: #3849
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 483.893
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #3850
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.894
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
======================================================================================
Path: #3851
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.894
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
======================================================================================
Path: #3852
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.896
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
======================================================================================
Path: #3853
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 483.898
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #3854
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.907
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
======================================================================================
Path: #3855
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 483.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3856
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 483.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #3857
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 483.909
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #3858
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 483.910
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3859
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.910
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
======================================================================================
Path: #3860
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 483.911
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3861
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 483.911
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #3862
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 483.912
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #3863
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 483.913
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #3864
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 483.913
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3865
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.913
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3866
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 483.913
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
======================================================================================
Path: #3867
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 483.915
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #3868
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 483.924
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3869
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 483.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3870
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 483.929
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #3871
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 483.930
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3872
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.932
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3873
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 483.932
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #3874
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 483.934
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #3875
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 483.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3876
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 483.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #3877
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.947
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3878
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 483.947
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3879
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.949
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3880
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 483.949
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3881
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 483.949
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #3882
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 483.960
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3883
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 483.964
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3884
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 483.968
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #3885
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 483.969
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #3886
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 483.971
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #3887
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.982
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3888
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 483.982
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #3889
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 483.985
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #3890
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 483.986
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #3891
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 484.000
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3892
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 484.003
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #3893
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 484.005
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #3894
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 484.006
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #3895
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 484.007
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #3896
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.009
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3897
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.012
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3898
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 484.019
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #3899
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 484.022
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #3900
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 484.025
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #3901
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.028
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3902
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.028
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #3903
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.029
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3904
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.029
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3905
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.031
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3906
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3907
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.031
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #3908
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.032
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3909
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.033
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3910
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.034
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3911
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 484.039
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #3912
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.042
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3913
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.042
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #3914
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 484.044
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #3915
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.048
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #3916
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.048
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3917
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.049
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3918
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.050
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3919
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.051
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #3920
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.051
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3921
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.051
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #3922
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.051
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3923
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.052
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3924
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.052
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3925
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.053
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #3926
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.053
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3927
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.053
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3928
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.054
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3929
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 484.055
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #3930
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 484.058
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #3931
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.065
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3932
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.068
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3933
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.069
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3934
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.069
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #3935
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.070
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3936
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.073
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3937
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.073
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3938
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.073
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #3939
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.073
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3940
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.075
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3941
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.077
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3942
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.078
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3943
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 484.081
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3944
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 484.081
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3945
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3946
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.085
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3947
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.087
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3948
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 484.087
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
======================================================================================
Path: #3949
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.088
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3950
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 484.088
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3951
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 484.088
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #3952
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 484.089
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3953
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 484.089
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #3954
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.089
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3955
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.089
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #3956
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.090
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3957
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.092
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3958
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.092
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3959
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.092
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3960
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.092
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #3961
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.094
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3962
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.094
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #3963
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.099
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #3964
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.100
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #3965
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.102
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #3966
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.680
Required time 500.785
Slack: 484.105
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[0] O OBUF FB1_uD 2.161
WRWB[0] - Net - -
FB1.uA/WRWB_ibuf[0] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.298
WRWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[0] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 16.680
=============================================================================================
Path: #3967
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.680
Required time 500.785
Slack: 484.105
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[1] O OBUF FB1_uD 2.161
WRWB[1] - Net - -
FB1.uA/WRWB_ibuf[1] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.298
WRWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[1] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 16.680
=============================================================================================
Path: #3968
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.680
Required time 500.785
Slack: 484.105
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[2] O OBUF FB1_uD 2.161
WRWB[2] - Net - -
FB1.uA/WRWB_ibuf[2] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.298
WRWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[2] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 16.680
=============================================================================================
Path: #3969
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.680
Required time 500.785
Slack: 484.105
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[3] O OBUF FB1_uD 2.161
WRWB[3] - Net - -
FB1.uA/WRWB_ibuf[3] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.298
WRWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[3] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 16.680
=============================================================================================
Path: #3970
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.105
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #3971
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.110
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #3972
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.112
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #3973
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[6] O OBUF FB1_uD 2.804
WRITEDATAWB[6] - Net - -
FB1.uA/WRITEDATAWB_ibuf[6] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[6] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[6] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[6] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[6] D FDC FB1_uB 16.671
========================================================================================
Path: #3974
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[19] O OBUF FB1_uD 2.804
WRITEDATAWB[19] - Net - -
FB1.uA/WRITEDATAWB_ibuf[19] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[19] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[19] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[19] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[19] D FDC FB1_uB 16.671
=========================================================================================
Path: #3975
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[30] O OBUF FB1_uD 2.804
WRITEDATAWB[30] - Net - -
FB1.uA/WRITEDATAWB_ibuf[30] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[30] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[30] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[30] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[30] D FDC FB1_uB 16.671
=========================================================================================
Path: #3976
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[13] O OBUF FB1_uD 2.804
WRITEDATAWB[13] - Net - -
FB1.uA/WRITEDATAWB_ibuf[13] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[13] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[13] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[13] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[13] D FDC FB1_uB 16.671
=========================================================================================
Path: #3977
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[22] O OBUF FB1_uD 2.804
WRITEDATAWB[22] - Net - -
FB1.uA/WRITEDATAWB_ibuf[22] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[22] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[22] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[22] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 16.671
=========================================================================================
Path: #3978
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[7] O OBUF FB1_uD 2.804
WRITEDATAWB[7] - Net - -
FB1.uA/WRITEDATAWB_ibuf[7] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[7] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[7] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[7] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[7] D FDC FB1_uB 16.671
========================================================================================
Path: #3979
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[21] O OBUF FB1_uD 2.804
WRITEDATAWB[21] - Net - -
FB1.uA/WRITEDATAWB_ibuf[21] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[21] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[21] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[21] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[21] D FDC FB1_uB 16.671
=========================================================================================
Path: #3980
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[14] O OBUF FB1_uD 2.804
WRITEDATAWB[14] - Net - -
FB1.uA/WRITEDATAWB_ibuf[14] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[14] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[14] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[14] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[14] D FDC FB1_uB 16.671
=========================================================================================
Path: #3981
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[34] O OBUF FB1_uD 2.804
WRITEDATAWB[34] - Net - -
FB1.uA/WRITEDATAWB_ibuf[34] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[34] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[34] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[34] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[34] D FDC FB1_uB 16.671
=========================================================================================
Path: #3982
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[11] O OBUF FB1_uD 2.804
WRITEDATAWB[11] - Net - -
FB1.uA/WRITEDATAWB_ibuf[11] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[11] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[11] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[11] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[11] D FDC FB1_uB 16.671
=========================================================================================
Path: #3983
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[23] O OBUF FB1_uD 2.804
WRITEDATAWB[23] - Net - -
FB1.uA/WRITEDATAWB_ibuf[23] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[23] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[23] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[23] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[23] D FDC FB1_uB 16.671
=========================================================================================
Path: #3984
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[3] O OBUF FB1_uD 2.804
WRITEDATAWB[3] - Net - -
FB1.uA/WRITEDATAWB_ibuf[3] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[3] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[3] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[3] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[3] D FDC FB1_uB 16.671
========================================================================================
Path: #3985
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[9] O OBUF FB1_uD 2.804
WRITEDATAWB[9] - Net - -
FB1.uA/WRITEDATAWB_ibuf[9] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[9] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[9] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[9] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[9] D FDC FB1_uB 16.671
========================================================================================
Path: #3986
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[15] O OBUF FB1_uD 2.804
WRITEDATAWB[15] - Net - -
FB1.uA/WRITEDATAWB_ibuf[15] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[15] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[15] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[15] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[15] D FDC FB1_uB 16.671
=========================================================================================
Path: #3987
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[12] O OBUF FB1_uD 2.804
WRITEDATAWB[12] - Net - -
FB1.uA/WRITEDATAWB_ibuf[12] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[12] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[12] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[12] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[12] D FDC FB1_uB 16.671
=========================================================================================
Path: #3988
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[10] O OBUF FB1_uD 2.804
WRITEDATAWB[10] - Net - -
FB1.uA/WRITEDATAWB_ibuf[10] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[10] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[10] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[10] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[10] D FDC FB1_uB 16.671
=========================================================================================
Path: #3989
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[36] O OBUF FB1_uD 2.804
WRITEDATAWB[36] - Net - -
FB1.uA/WRITEDATAWB_ibuf[36] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[36] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[36] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[36] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[36] D FDC FB1_uB 16.671
=========================================================================================
Path: #3990
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[31] O OBUF FB1_uD 2.804
WRITEDATAWB[31] - Net - -
FB1.uA/WRITEDATAWB_ibuf[31] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[31] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[31] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[31] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[31] D FDC FB1_uB 16.671
=========================================================================================
Path: #3991
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[4] O OBUF FB1_uD 2.804
WRITEDATAWB[4] - Net - -
FB1.uA/WRITEDATAWB_ibuf[4] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[4] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[4] D FDC FB1_uB 16.671
========================================================================================
Path: #3992
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[29] O OBUF FB1_uD 2.804
WRITEDATAWB[29] - Net - -
FB1.uA/WRITEDATAWB_ibuf[29] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[29] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[29] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[29] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[29] D FDC FB1_uB 16.671
=========================================================================================
Path: #3993
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[5] O OBUF FB1_uD 2.804
WRITEDATAWB[5] - Net - -
FB1.uA/WRITEDATAWB_ibuf[5] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[5] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[5] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[5] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[5] D FDC FB1_uB 16.671
========================================================================================
Path: #3994
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[33] O OBUF FB1_uD 2.804
WRITEDATAWB[33] - Net - -
FB1.uA/WRITEDATAWB_ibuf[33] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[33] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[33] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[33] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[33] D FDC FB1_uB 16.671
=========================================================================================
Path: #3995
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[32] O OBUF FB1_uD 2.804
WRITEDATAWB[32] - Net - -
FB1.uA/WRITEDATAWB_ibuf[32] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[32] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[32] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[32] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[32] D FDC FB1_uB 16.671
=========================================================================================
Path: #3996
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[35] O OBUF FB1_uD 2.804
WRITEDATAWB[35] - Net - -
FB1.uA/WRITEDATAWB_ibuf[35] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[35] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[35] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[35] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[35] D FDC FB1_uB 16.671
=========================================================================================
Path: #3997
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[24] O OBUF FB1_uD 2.804
WRITEDATAWB[24] - Net - -
FB1.uA/WRITEDATAWB_ibuf[24] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[24] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[24] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[24] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[24] D FDC FB1_uB 16.671
=========================================================================================
Path: #3998
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[28] O OBUF FB1_uD 2.804
WRITEDATAWB[28] - Net - -
FB1.uA/WRITEDATAWB_ibuf[28] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[28] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[28] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[28] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[28] D FDC FB1_uB 16.671
=========================================================================================
Path: #3999
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[20] O OBUF FB1_uD 2.804
WRITEDATAWB[20] - Net - -
FB1.uA/WRITEDATAWB_ibuf[20] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[20] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[20] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[20] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[20] D FDC FB1_uB 16.671
=========================================================================================
Path: #4000
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[17] O OBUF FB1_uD 2.804
WRITEDATAWB[17] - Net - -
FB1.uA/WRITEDATAWB_ibuf[17] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[17] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[17] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[17] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[17] D FDC FB1_uB 16.671
=========================================================================================
Path: #4001
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[26] O OBUF FB1_uD 2.804
WRITEDATAWB[26] - Net - -
FB1.uA/WRITEDATAWB_ibuf[26] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[26] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[26] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[26] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[26] D FDC FB1_uB 16.671
=========================================================================================
Path: #4002
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[25] O OBUF FB1_uD 2.804
WRITEDATAWB[25] - Net - -
FB1.uA/WRITEDATAWB_ibuf[25] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[25] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[25] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[25] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[25] D FDC FB1_uB 16.671
=========================================================================================
Path: #4003
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[27] O OBUF FB1_uD 2.804
WRITEDATAWB[27] - Net - -
FB1.uA/WRITEDATAWB_ibuf[27] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[27] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[27] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[27] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[27] D FDC FB1_uB 16.671
=========================================================================================
Path: #4004
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[16] O OBUF FB1_uD 2.804
WRITEDATAWB[16] - Net - -
FB1.uA/WRITEDATAWB_ibuf[16] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[16] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[16] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[16] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[16] D FDC FB1_uB 16.671
=========================================================================================
Path: #4005
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[8] O OBUF FB1_uD 2.804
WRITEDATAWB[8] - Net - -
FB1.uA/WRITEDATAWB_ibuf[8] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[8] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[8] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[8] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[8] D FDC FB1_uB 16.671
========================================================================================
Path: #4006
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.671
Required time 500.785
Slack: 484.113
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[18] O OBUF FB1_uD 2.804
WRITEDATAWB[18] - Net - -
FB1.uA/WRITEDATAWB_ibuf[18] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[18] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[18] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[18] I IBUF FB1_uB 15.087
FB1.uB/dut_inst.idex1.readdata2_out[18] D FDC FB1_uB 16.671
=========================================================================================
Path: #4007
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.115
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4008
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.568
Required time 500.803
Slack: 484.115
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[60] O OBUF FB1_uB 31.793
ADDOUTID[60] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[60] I IBUF FB1_uA 37.458
FB1.uA/dut_inst.pc1.PC[60] D FDCE FB1_uA 38.568
=======================================================================================
Path: #4009
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.567
Required time 500.803
Slack: 484.116
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[59] O OBUF FB1_uB 31.831
ADDOUTID[59] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[59] I IBUF FB1_uA 37.457
FB1.uA/dut_inst.pc1.PC[59] D FDCE FB1_uA 38.567
=======================================================================================
Path: #4010
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.118
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4011
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.119
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4012
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.122
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4013
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.123
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #4014
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 484.131
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #4015
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.135
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4016
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 484.138
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #4017
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 484.138
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #4018
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.140
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4019
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.141
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4020
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.143
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4021
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.143
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4022
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.146
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4023
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.208
Required time 500.803
Slack: 484.148
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[2] O OBUF FB1_uB 31.850
ADDOUTID[2] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[2] I IBUF FB1_uA 37.098
FB1.uA/dut_inst.pc1.PC[2] D FDCE FB1_uA 38.208
=======================================================================================
Path: #4024
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.148
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4025
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.151
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4026
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 484.151
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #4027
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.151
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #4028
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.153
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4029
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.156
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #4030
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.156
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #4031
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.156
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4032
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 484.159
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #4033
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 484.159
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #4034
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.164
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4035
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 484.165
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #4036
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.517
Required time 500.803
Slack: 484.166
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[46] O OBUF FB1_uB 31.791
ADDOUTID[46] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[46] I IBUF FB1_uA 37.407
FB1.uA/dut_inst.pc1.PC[46] D FDCE FB1_uA 38.517
=======================================================================================
Path: #4037
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 484.168
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #4038
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.171
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4039
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 484.172
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #4040
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 484.172
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #4041
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 484.176
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #4042
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 484.176
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #4043
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.176
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4044
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.177
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #4045
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.179
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4046
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.184
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4047
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 484.185
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #4048
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.497
Required time 500.803
Slack: 484.186
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[45] O OBUF FB1_uB 31.791
ADDOUTID[45] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[45] I IBUF FB1_uA 37.387
FB1.uA/dut_inst.pc1.PC[45] D FDCE FB1_uA 38.497
=======================================================================================
Path: #4049
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 484.190
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #4050
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.192
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4051
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 484.193
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #4052
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 484.193
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #4053
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.194
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4054
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.196
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4055
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.197
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
=======================================================================================
Path: #4056
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.197
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
=======================================================================================
Path: #4057
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 484.197
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #4058
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 484.197
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #4059
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.484
Required time 500.803
Slack: 484.200
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[62] O OBUF FB1_uB 31.791
ADDOUTID[62] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[62] I IBUF FB1_uA 37.374
FB1.uA/dut_inst.pc1.PC[62] D FDCE FB1_uA 38.484
=======================================================================================
Path: #4060
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 484.201
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #4061
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 484.201
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #4062
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.480
Required time 500.803
Slack: 484.203
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[63] O OBUF FB1_uB 31.791
ADDOUTID[63] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[63] I IBUF FB1_uA 37.370
FB1.uA/dut_inst.pc1.PC[63] D FDCE FB1_uA 38.480
=======================================================================================
Path: #4063
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 484.204
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #4064
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 484.204
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #4065
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 484.205
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #4066
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.206
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4067
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 484.208
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #4068
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 484.208
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #4069
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 484.208
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #4070
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 484.209
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #4071
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 484.209
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #4072
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 484.211
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #4073
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 484.211
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #4074
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 484.212
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #4075
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 484.212
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #4076
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 484.212
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #4077
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 484.212
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #4078
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 484.215
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #4079
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 484.215
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #4080
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.218
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4081
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.463
Required time 500.803
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[61] O OBUF FB1_uB 31.791
ADDOUTID[61] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[61] I IBUF FB1_uA 37.353
FB1.uA/dut_inst.pc1.PC[61] D FDCE FB1_uA 38.463
=======================================================================================
Path: #4082
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[55] O OBUF FB1_uD 2.804
WRITEDATAWB[55] - Net - -
FB1.uA/WRITEDATAWB_ibuf[55] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[55] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[55] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[55] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[55] D FDC FB1_uB 16.564
=========================================================================================
Path: #4083
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[62] O OBUF FB1_uD 2.804
WRITEDATAWB[62] - Net - -
FB1.uA/WRITEDATAWB_ibuf[62] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[62] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[62] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[62] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[62] D FDC FB1_uB 16.564
=========================================================================================
Path: #4084
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[42] O OBUF FB1_uD 2.804
WRITEDATAWB[42] - Net - -
FB1.uA/WRITEDATAWB_ibuf[42] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[42] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[42] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[42] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[42] D FDC FB1_uB 16.564
=========================================================================================
Path: #4085
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[46]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[46] O OBUF FB1_uD 2.804
WRITEDATAWB[46] - Net - -
FB1.uA/WRITEDATAWB_ibuf[46] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[46] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[46] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[46] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[46] D FDC FB1_uB 16.564
=========================================================================================
Path: #4086
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[44] O OBUF FB1_uD 2.804
WRITEDATAWB[44] - Net - -
FB1.uA/WRITEDATAWB_ibuf[44] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[44] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[44] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[44] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[44] D FDC FB1_uB 16.564
=========================================================================================
Path: #4087
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[54] O OBUF FB1_uD 2.804
WRITEDATAWB[54] - Net - -
FB1.uA/WRITEDATAWB_ibuf[54] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[54] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[54] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[54] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[54] D FDC FB1_uB 16.564
=========================================================================================
Path: #4088
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[58] O OBUF FB1_uD 2.804
WRITEDATAWB[58] - Net - -
FB1.uA/WRITEDATAWB_ibuf[58] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[58] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[58] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[58] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[58] D FDC FB1_uB 16.564
=========================================================================================
Path: #4089
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[56] O OBUF FB1_uD 2.804
WRITEDATAWB[56] - Net - -
FB1.uA/WRITEDATAWB_ibuf[56] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[56] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[56] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[56] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[56] D FDC FB1_uB 16.564
=========================================================================================
Path: #4090
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[57] O OBUF FB1_uD 2.804
WRITEDATAWB[57] - Net - -
FB1.uA/WRITEDATAWB_ibuf[57] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[57] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[57] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[57] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[57] D FDC FB1_uB 16.564
=========================================================================================
Path: #4091
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[59]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[59] O OBUF FB1_uD 2.804
WRITEDATAWB[59] - Net - -
FB1.uA/WRITEDATAWB_ibuf[59] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[59] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[59] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[59] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[59] D FDC FB1_uB 16.564
=========================================================================================
Path: #4092
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[51] O OBUF FB1_uD 2.804
WRITEDATAWB[51] - Net - -
FB1.uA/WRITEDATAWB_ibuf[51] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[51] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[51] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[51] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[51] D FDC FB1_uB 16.564
=========================================================================================
Path: #4093
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[50] O OBUF FB1_uD 2.804
WRITEDATAWB[50] - Net - -
FB1.uA/WRITEDATAWB_ibuf[50] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[50] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[50] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[50] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[50] D FDC FB1_uB 16.564
=========================================================================================
Path: #4094
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[48] O OBUF FB1_uD 2.804
WRITEDATAWB[48] - Net - -
FB1.uA/WRITEDATAWB_ibuf[48] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[48] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[48] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[48] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[48] D FDC FB1_uB 16.564
=========================================================================================
Path: #4095
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[60] O OBUF FB1_uD 2.804
WRITEDATAWB[60] - Net - -
FB1.uA/WRITEDATAWB_ibuf[60] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[60] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[60] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[60] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[60] D FDC FB1_uB 16.564
=========================================================================================
Path: #4096
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[45]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[45] O OBUF FB1_uD 2.804
WRITEDATAWB[45] - Net - -
FB1.uA/WRITEDATAWB_ibuf[45] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[45] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[45] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[45] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[45] D FDC FB1_uB 16.564
=========================================================================================
Path: #4097
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[61] O OBUF FB1_uD 2.804
WRITEDATAWB[61] - Net - -
FB1.uA/WRITEDATAWB_ibuf[61] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[61] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[61] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[61] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[61] D FDC FB1_uB 16.564
=========================================================================================
Path: #4098
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[39] O OBUF FB1_uD 2.804
WRITEDATAWB[39] - Net - -
FB1.uA/WRITEDATAWB_ibuf[39] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[39] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[39] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[39] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[39] D FDC FB1_uB 16.564
=========================================================================================
Path: #4099
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[49] O OBUF FB1_uD 2.804
WRITEDATAWB[49] - Net - -
FB1.uA/WRITEDATAWB_ibuf[49] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[49] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[49] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[49] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[49] D FDC FB1_uB 16.564
=========================================================================================
Path: #4100
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[37] O OBUF FB1_uD 2.804
WRITEDATAWB[37] - Net - -
FB1.uA/WRITEDATAWB_ibuf[37] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[37] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[37] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[37] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[37] D FDC FB1_uB 16.564
=========================================================================================
Path: #4101
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[41] O OBUF FB1_uD 2.804
WRITEDATAWB[41] - Net - -
FB1.uA/WRITEDATAWB_ibuf[41] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[41] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[41] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[41] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[41] D FDC FB1_uB 16.564
=========================================================================================
Path: #4102
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[52] O OBUF FB1_uD 2.804
WRITEDATAWB[52] - Net - -
FB1.uA/WRITEDATAWB_ibuf[52] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[52] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[52] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[52] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[52] D FDC FB1_uB 16.564
=========================================================================================
Path: #4103
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[38] O OBUF FB1_uD 2.804
WRITEDATAWB[38] - Net - -
FB1.uA/WRITEDATAWB_ibuf[38] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[38] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[38] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[38] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[38] D FDC FB1_uB 16.564
=========================================================================================
Path: #4104
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[43] O OBUF FB1_uD 2.804
WRITEDATAWB[43] - Net - -
FB1.uA/WRITEDATAWB_ibuf[43] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[43] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[43] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[43] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[43] D FDC FB1_uB 16.564
=========================================================================================
Path: #4105
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[53] O OBUF FB1_uD 2.804
WRITEDATAWB[53] - Net - -
FB1.uA/WRITEDATAWB_ibuf[53] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[53] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[53] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[53] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[53] D FDC FB1_uB 16.564
=========================================================================================
Path: #4106
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[40] O OBUF FB1_uD 2.804
WRITEDATAWB[40] - Net - -
FB1.uA/WRITEDATAWB_ibuf[40] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[40] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[40] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[40] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[40] D FDC FB1_uB 16.564
=========================================================================================
Path: #4107
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[47] O OBUF FB1_uD 2.804
WRITEDATAWB[47] - Net - -
FB1.uA/WRITEDATAWB_ibuf[47] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[47] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[47] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[47] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[47] D FDC FB1_uB 16.564
=========================================================================================
Path: #4108
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.564
Required time 500.785
Slack: 484.220
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[63] O OBUF FB1_uD 2.804
WRITEDATAWB[63] - Net - -
FB1.uA/WRITEDATAWB_ibuf[63] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[63] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[63] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[63] I IBUF FB1_uB 14.980
FB1.uB/dut_inst.idex1.readdata2_out[63] D FDC FB1_uB 16.564
=========================================================================================
Path: #4109
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 484.222
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #4110
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.224
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4111
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.225
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4112
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[58]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.458
Required time 500.803
Slack: 484.225
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[58] O OBUF FB1_uB 31.791
ADDOUTID[58] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[58] I IBUF FB1_uA 37.348
FB1.uA/dut_inst.pc1.PC[58] D FDCE FB1_uA 38.458
=======================================================================================
Path: #4113
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 484.227
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #4114
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 484.229
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #4115
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 484.229
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #4116
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.231
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4117
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.232
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4118
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.232
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4119
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.232
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4120
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.232
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4121
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.233
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
======================================================================================
Path: #4122
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 484.234
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #4123
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 484.234
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #4124
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.235
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4125
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[56]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.448
Required time 500.803
Slack: 484.236
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[56] O OBUF FB1_uB 31.792
ADDOUTID[56] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[56] I IBUF FB1_uA 37.338
FB1.uA/dut_inst.pc1.PC[56] D FDCE FB1_uA 38.448
=======================================================================================
Path: #4126
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[54]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.447
Required time 500.803
Slack: 484.236
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[54] O OBUF FB1_uB 31.791
ADDOUTID[54] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[54] I IBUF FB1_uA 37.337
FB1.uA/dut_inst.pc1.PC[54] D FDCE FB1_uA 38.447
=======================================================================================
Path: #4127
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.237
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
======================================================================================
Path: #4128
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 484.237
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #4129
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[32]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.445
Required time 500.803
Slack: 484.238
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[32] O OBUF FB1_uB 31.792
ADDOUTID[32] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[32] I IBUF FB1_uA 37.335
FB1.uA/dut_inst.pc1.PC[32] D FDCE FB1_uA 38.445
=======================================================================================
Path: #4130
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[57]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.444
Required time 500.803
Slack: 484.239
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[57] O OBUF FB1_uB 31.791
ADDOUTID[57] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[57] I IBUF FB1_uA 37.334
FB1.uA/dut_inst.pc1.PC[57] D FDCE FB1_uA 38.444
=======================================================================================
Path: #4131
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[55]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.443
Required time 500.803
Slack: 484.240
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[55] O OBUF FB1_uB 31.791
ADDOUTID[55] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[55] I IBUF FB1_uA 37.333
FB1.uA/dut_inst.pc1.PC[55] D FDCE FB1_uA 38.443
=======================================================================================
Path: #4132
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.241
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4133
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.242
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4134
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[31]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.441
Required time 500.803
Slack: 484.243
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[31] O OBUF FB1_uB 31.791
ADDOUTID[31] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[31] I IBUF FB1_uA 37.331
FB1.uA/dut_inst.pc1.PC[31] D FDCE FB1_uA 38.441
=======================================================================================
Path: #4135
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 484.245
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #4136
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 484.245
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #4137
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.248
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4138
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.248
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4139
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.249
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4140
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.249
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4141
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.253
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
======================================================================================
Path: #4142
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.256
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
======================================================================================
Path: #4143
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.256
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
======================================================================================
Path: #4144
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[53]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.427
Required time 500.803
Slack: 484.257
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[53] O OBUF FB1_uB 31.791
ADDOUTID[53] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[53] I IBUF FB1_uA 37.317
FB1.uA/dut_inst.pc1.PC[53] D FDCE FB1_uA 38.427
=======================================================================================
Path: #4145
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.258
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
======================================================================================
Path: #4146
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.259
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[52] O OBUF FB1_uB 31.793
ADDOUTID[52] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[52] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[52] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4147
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[51]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.424
Required time 500.803
Slack: 484.260
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[51] O OBUF FB1_uB 31.831
ADDOUTID[51] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[51] I IBUF FB1_uA 37.314
FB1.uA/dut_inst.pc1.PC[51] D FDCE FB1_uA 38.424
=======================================================================================
Path: #4148
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 484.261
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #4149
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 484.261
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #4150
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[50]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.422
Required time 500.803
Slack: 484.261
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[50] O OBUF FB1_uB 31.791
ADDOUTID[50] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[50] I IBUF FB1_uA 37.312
FB1.uA/dut_inst.pc1.PC[50] D FDCE FB1_uA 38.422
=======================================================================================
Path: #4151
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 484.263
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #4152
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 484.268
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #4153
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 484.268
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #4154
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 484.269
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #4155
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 484.269
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #4156
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 484.271
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #4157
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 484.271
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #4158
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[48]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.411
Required time 500.803
Slack: 484.272
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[48] O OBUF FB1_uB 31.792
ADDOUTID[48] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[48] I IBUF FB1_uA 37.301
FB1.uA/dut_inst.pc1.PC[48] D FDCE FB1_uA 38.411
=======================================================================================
Path: #4159
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.274
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4160
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.275
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4161
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.276
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[49] O OBUF FB1_uB 31.791
ADDOUTID[49] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[49] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[49] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4162
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.407
Required time 500.803
Slack: 484.276
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[47] O OBUF FB1_uB 31.791
ADDOUTID[47] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[47] I IBUF FB1_uA 37.297
FB1.uA/dut_inst.pc1.PC[47] D FDCE FB1_uA 38.407
=======================================================================================
Path: #4163
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 484.278
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #4164
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 484.278
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #4165
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.281
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4166
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.281
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4167
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.282
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4168
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.282
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4169
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 484.285
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #4170
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 484.285
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #4171
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 484.286
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #4172
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 484.286
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #4173
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.286
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4174
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.290
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4175
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 484.295
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #4176
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[44]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.388
Required time 500.803
Slack: 484.296
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[44] O OBUF FB1_uB 31.793
ADDOUTID[44] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[44] I IBUF FB1_uA 37.278
FB1.uA/dut_inst.pc1.PC[44] D FDCE FB1_uA 38.388
=======================================================================================
Path: #4177
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[43]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.387
Required time 500.803
Slack: 484.296
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[43] O OBUF FB1_uB 31.831
ADDOUTID[43] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[43] I IBUF FB1_uA 37.277
FB1.uA/dut_inst.pc1.PC[43] D FDCE FB1_uA 38.387
=======================================================================================
Path: #4178
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 484.297
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #4179
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 484.298
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #4180
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[42]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.385
Required time 500.803
Slack: 484.298
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[42] O OBUF FB1_uB 31.791
ADDOUTID[42] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[42] I IBUF FB1_uA 37.275
FB1.uA/dut_inst.pc1.PC[42] D FDCE FB1_uA 38.385
=======================================================================================
Path: #4181
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 484.300
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #4182
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.301
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
======================================================================================
Path: #4183
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.302
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
======================================================================================
Path: #4184
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 484.302
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #4185
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 484.302
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #4186
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 484.305
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #4187
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 484.305
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #4188
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 484.305
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #4189
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 484.305
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #4190
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
======================================================================================
Path: #4191
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.307
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4192
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 484.307
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #4193
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 484.307
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #4194
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.309
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[40] O OBUF FB1_uB 31.792
ADDOUTID[40] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[40] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[40] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4195
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.309
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4196
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[38]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.374
Required time 500.803
Slack: 484.309
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[38] O OBUF FB1_uB 31.791
ADDOUTID[38] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[38] I IBUF FB1_uA 37.264
FB1.uA/dut_inst.pc1.PC[38] D FDCE FB1_uA 38.374
=======================================================================================
Path: #4197
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.310
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4198
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 484.311
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #4199
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.311
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #4200
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[41]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.371
Required time 500.803
Slack: 484.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[41] O OBUF FB1_uB 31.791
ADDOUTID[41] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[41] I IBUF FB1_uA 37.261
FB1.uA/dut_inst.pc1.PC[41] D FDCE FB1_uA 38.371
=======================================================================================
Path: #4201
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[39]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.370
Required time 500.803
Slack: 484.313
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[39] O OBUF FB1_uB 31.791
ADDOUTID[39] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[39] I IBUF FB1_uA 37.260
FB1.uA/dut_inst.pc1.PC[39] D FDCE FB1_uA 38.370
=======================================================================================
Path: #4202
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 484.314
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #4203
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 484.317
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #4204
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 484.319
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #4205
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 484.319
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #4206
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 484.322
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #4207
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 484.322
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #4208
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.324
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
======================================================================================
Path: #4209
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[37]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.353
Required time 500.803
Slack: 484.330
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[37] O OBUF FB1_uB 31.791
ADDOUTID[37] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[37] I IBUF FB1_uA 37.243
FB1.uA/dut_inst.pc1.PC[37] D FDCE FB1_uA 38.353
=======================================================================================
Path: #4210
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 484.332
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #4211
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[36]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.351
Required time 500.803
Slack: 484.332
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[36] O OBUF FB1_uB 31.793
ADDOUTID[36] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[36] I IBUF FB1_uA 37.241
FB1.uA/dut_inst.pc1.PC[36] D FDCE FB1_uA 38.351
=======================================================================================
Path: #4212
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.350
Required time 500.803
Slack: 484.333
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[35] O OBUF FB1_uB 31.831
ADDOUTID[35] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[35] I IBUF FB1_uA 37.240
FB1.uA/dut_inst.pc1.PC[35] D FDCE FB1_uA 38.350
=======================================================================================
Path: #4213
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.334
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4214
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.335
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4215
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[34]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.349
Required time 500.803
Slack: 484.335
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[34] O OBUF FB1_uB 31.791
ADDOUTID[34] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[34] I IBUF FB1_uA 37.239
FB1.uA/dut_inst.pc1.PC[34] D FDCE FB1_uA 38.349
=======================================================================================
Path: #4216
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 484.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #4217
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 484.336
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #4218
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 484.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #4219
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 484.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #4220
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.341
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4221
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.341
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4222
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.342
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4223
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.342
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4224
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 484.344
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #4225
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 484.344
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #4226
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[30]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.337
Required time 500.803
Slack: 484.346
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[30] O OBUF FB1_uB 31.791
ADDOUTID[30] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[30] I IBUF FB1_uA 37.227
FB1.uA/dut_inst.pc1.PC[30] D FDCE FB1_uA 38.337
=======================================================================================
Path: #4227
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 484.347
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #4228
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[33]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.334
Required time 500.803
Slack: 484.349
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[33] O OBUF FB1_uB 31.791
ADDOUTID[33] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[33] I IBUF FB1_uA 37.224
FB1.uA/dut_inst.pc1.PC[33] D FDCE FB1_uA 38.334
=======================================================================================
Path: #4229
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 484.351
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #4230
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 484.355
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #4231
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 484.355
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #4232
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 484.358
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #4233
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 484.358
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #4234
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[29]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.317
Required time 500.803
Slack: 484.366
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[29] O OBUF FB1_uB 31.791
ADDOUTID[29] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[29] I IBUF FB1_uA 37.207
FB1.uA/dut_inst.pc1.PC[29] D FDCE FB1_uA 38.317
=======================================================================================
Path: #4235
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.367
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
======================================================================================
Path: #4236
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[28]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.369
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[28] O OBUF FB1_uB 31.793
ADDOUTID[28] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[28] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[28] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4237
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.314
Required time 500.803
Slack: 484.369
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[27] O OBUF FB1_uB 31.831
ADDOUTID[27] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[27] I IBUF FB1_uA 37.204
FB1.uA/dut_inst.pc1.PC[27] D FDCE FB1_uA 38.314
=======================================================================================
Path: #4238
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.312
Required time 500.803
Slack: 484.371
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[26] O OBUF FB1_uB 31.791
ADDOUTID[26] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[26] I IBUF FB1_uA 37.202
FB1.uA/dut_inst.pc1.PC[26] D FDCE FB1_uA 38.312
=======================================================================================
Path: #4239
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.372
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
======================================================================================
Path: #4240
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.381
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4241
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[24]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.301
Required time 500.803
Slack: 484.382
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[24] O OBUF FB1_uB 31.792
ADDOUTID[24] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[24] I IBUF FB1_uA 37.191
FB1.uA/dut_inst.pc1.PC[24] D FDCE FB1_uA 38.301
=======================================================================================
Path: #4242
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.385
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4243
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.298
Required time 500.803
Slack: 484.386
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[25] O OBUF FB1_uB 31.791
ADDOUTID[25] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[25] I IBUF FB1_uA 37.188
FB1.uA/dut_inst.pc1.PC[25] D FDCE FB1_uA 38.298
=======================================================================================
Path: #4244
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.390
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4245
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.390
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4246
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.394
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4247
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.394
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4248
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.400
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4249
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.401
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4250
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4251
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4252
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.403
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4253
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.404
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4254
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.404
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4255
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.406
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4256
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.406
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #4257
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.407
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4258
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.407
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4259
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.407
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4260
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.410
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4261
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.410
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4262
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.413
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4263
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.413
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4264
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.413
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4265
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.413
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4266
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.415
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4267
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.415
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4268
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.424
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4269
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.424
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4270
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.424
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4271
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.426
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4272
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.426
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4273
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.426
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4274
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.426
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4275
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.426
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4276
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.427
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4277
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.427
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4278
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.427
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4279
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.428
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4280
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.428
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4281
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.428
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4282
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.428
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4283
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.430
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4284
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.430
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4285
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 38.331
Required time 500.803
Slack: 484.437
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[9] O OBUF FB1_uB 30.853
ADDOUTID[9] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[9] I IBUF FB1_uA 37.221
FB1.uA/dut_inst.pc1.PC[9] D FDCE FB1_uA 38.331
=======================================================================================
Path: #4286
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.439
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4287
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.439
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4288
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.439
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4289
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4290
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4291
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.443
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4292
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.443
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
=======================================================================================
Path: #4293
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.449
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4294
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.450
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4295
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.453
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4296
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.454
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4297
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.884
Required time 500.803
Slack: 484.472
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[5] O OBUF FB1_uB 31.850
ADDOUTID[5] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[5] I IBUF FB1_uA 36.774
FB1.uA/dut_inst.pc1.PC[5] D FDCE FB1_uA 37.884
=======================================================================================
Path: #4298
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.482
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4299
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[52]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 16.284
Required time 500.785
Slack: 484.501
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRWB_obuf[4] O OBUF FB1_uD 2.161
WRWB[4] - Net - -
FB1.uA/WRWB_ibuf[4] I IBUF FB1_uA 7.209
FB1.uA/WRWB_aptn_ft_obuf[4] O OBUF FB1_uA 9.298
WRWB_aptn_ft[4] - Net - -
FB1.uB/dut_inst.WRWB_ibuf[4] I IBUF FB1_uB 14.444
FB1.uB/dut_inst.idex1.readdata2_out[52] D FDC FB1_uB 16.284
=============================================================================================
Path: #4300
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.841
Required time 500.803
Slack: 484.515
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[4] O OBUF FB1_uB 31.851
ADDOUTID[4] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[4] I IBUF FB1_uA 36.731
FB1.uA/dut_inst.pc1.PC[4] D FDCE FB1_uA 37.841
=======================================================================================
Path: #4301
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.836
Required time 500.803
Slack: 484.520
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[3] O OBUF FB1_uB 31.890
ADDOUTID[3] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[3] I IBUF FB1_uA 36.726
FB1.uA/dut_inst.pc1.PC[3] D FDCE FB1_uA 37.836
=======================================================================================
Path: #4302
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.531
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4303
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.535
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4304
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.551
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4305
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.554
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4306
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.554
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4307
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.556
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4308
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.567
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4309
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.571
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4310
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.615
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4311
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.619
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4312
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.636
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4313
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.638
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4314
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.639
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4315
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.641
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4316
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 484.651
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4317
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 484.655
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4318
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.673
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4319
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.677
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4320
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.692
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4321
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4322
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.696
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4323
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.696
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4324
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.697
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4325
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.699
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #4326
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.713
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4327
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.713
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4328
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.715
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4329
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.716
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4330
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.717
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4331
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.717
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #4332
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[14]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.975
Required time 500.803
Slack: 484.722
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[14] O OBUF FB1_uB 30.505
ADDOUTID[14] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[14] I IBUF FB1_uA 36.865
FB1.uA/dut_inst.pc1.PC[14] D FDCE FB1_uA 37.975
=======================================================================================
Path: #4333
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.971
Required time 500.803
Slack: 484.725
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[15] O OBUF FB1_uB 30.505
ADDOUTID[15] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[15] I IBUF FB1_uA 36.861
FB1.uA/dut_inst.pc1.PC[15] D FDCE FB1_uA 37.971
=======================================================================================
Path: #4334
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.735
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4335
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[13]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.955
Required time 500.803
Slack: 484.745
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[13] O OBUF FB1_uB 30.807
ADDOUTID[13] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[13] I IBUF FB1_uA 36.845
FB1.uA/dut_inst.pc1.PC[13] D FDCE FB1_uA 37.955
=======================================================================================
Path: #4336
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.779
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4337
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.783
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[11] O OBUF FB1_uB 30.911
ADDOUTID[11] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[11] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[11] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4338
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.788
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4339
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[7]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.902
Required time 500.803
Slack: 484.793
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[7] O OBUF FB1_uB 31.868
ADDOUTID[7] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[7] I IBUF FB1_uA 36.792
FB1.uA/dut_inst.pc1.PC[7] D FDCE FB1_uA 37.902
=======================================================================================
Path: #4340
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[10]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.950
Required time 500.803
Slack: 484.807
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[10] O OBUF FB1_uB 30.870
ADDOUTID[10] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[10] I IBUF FB1_uA 36.840
FB1.uA/dut_inst.pc1.PC[10] D FDCE FB1_uA 37.950
=======================================================================================
Path: #4341
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.907
Required time 500.803
Slack: 484.833
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[8] O OBUF FB1_uB 30.872
ADDOUTID[8] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[8] I IBUF FB1_uA 36.797
FB1.uA/dut_inst.pc1.PC[8] D FDCE FB1_uA 37.907
=======================================================================================
Path: #4342
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.906
Required time 500.803
Slack: 484.841
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[6] O OBUF FB1_uB 31.850
ADDOUTID[6] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[6] I IBUF FB1_uA 36.796
FB1.uA/dut_inst.pc1.PC[6] D FDCE FB1_uA 37.906
=======================================================================================
Path: #4343
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.952
Required time 500.803
Slack: 484.889
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[12] O OBUF FB1_uB 30.809
ADDOUTID[12] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[12] I IBUF FB1_uA 36.842
FB1.uA/dut_inst.pc1.PC[12] D FDCE FB1_uA 37.952
=======================================================================================
Path: #4344
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.969
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4345
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.973
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4346
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.988
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4347
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.988
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4348
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 484.989
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4349
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 484.989
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4350
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.992
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4351
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4352
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 484.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4353
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 484.992
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4354
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 484.993
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4355
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 484.994
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4356
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.005
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4357
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.009
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4358
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.009
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4359
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.009
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4360
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.010
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4361
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.010
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4362
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.011
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4363
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.011
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4364
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.012
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4365
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.012
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4366
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.012
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4367
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.013
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4368
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.013
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4369
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.013
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4370
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.014
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4371
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.015
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4372
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.024
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4373
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.024
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4374
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.025
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4375
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.025
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4376
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.028
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4377
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.028
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4378
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.029
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4379
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.029
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4380
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.029
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4381
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.029
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4382
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.031
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4383
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.033
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4384
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.033
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4385
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.033
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4386
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.034
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4387
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4388
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.045
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4389
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.046
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4390
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.048
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4391
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.048
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4392
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.050
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4393
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.050
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4394
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.050
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4395
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.050
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4396
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.052
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4397
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.052
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4398
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.053
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4399
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.053
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4400
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.055
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4401
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.055
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4402
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.061
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4403
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.065
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4404
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.065
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4405
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.065
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4406
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.069
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4407
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.069
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4408
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.120
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4409
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.143
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4410
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.143
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4411
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.143
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4412
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.162
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4413
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.162
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4414
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.193
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
======================================================================================
Path: #4415
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.197
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
======================================================================================
Path: #4416
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.214
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
======================================================================================
Path: #4417
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.216
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
======================================================================================
Path: #4418
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.217
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
======================================================================================
Path: #4419
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.219
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
======================================================================================
Path: #4420
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.229
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
======================================================================================
Path: #4421
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.233
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
======================================================================================
Path: #4422
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.247
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4423
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.250
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4424
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.267
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4425
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.269
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4426
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.270
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4427
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.272
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4428
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.283
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4429
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.286
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4430
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.341
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4431
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.345
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4432
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.362
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4433
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.364
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4434
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.365
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4435
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.367
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4436
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.377
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4437
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.381
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4438
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.490
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4439
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 15.287
Required time 500.785
Slack: 485.498
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[2] O OBUF FB1_uD 2.804
WRITEDATAWB[2] - Net - -
FB1.uA/WRITEDATAWB_ibuf[2] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[2] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[2] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[2] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.idex1.readdata2_out[2] D FDC FB1_uB 15.287
========================================================================================
Path: #4440
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 15.287
Required time 500.785
Slack: 485.498
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[1] O OBUF FB1_uD 2.804
WRITEDATAWB[1] - Net - -
FB1.uA/WRITEDATAWB_ibuf[1] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[1] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[1] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[1] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.idex1.readdata2_out[1] D FDC FB1_uB 15.287
========================================================================================
Path: #4441
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 15.287
Required time 500.785
Slack: 485.498
Instance / Net name Pin name Type FPGA Arrival time
----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.WRITEDATAWB_obuf[0] O OBUF FB1_uD 2.804
WRITEDATAWB[0] - Net - -
FB1.uA/WRITEDATAWB_ibuf[0] I IBUF FB1_uA 7.852
FB1.uA/WRITEDATAWB_aptn_ft_obuf[0] O OBUF FB1_uA 9.941
WRITEDATAWB_aptn_ft[0] - Net - -
FB1.uB/dut_inst.WRITEDATAWB_ibuf[0] I IBUF FB1_uB 13.694
FB1.uB/dut_inst.idex1.readdata2_out[0] D FDC FB1_uB 15.287
========================================================================================
Path: #4442
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.475
Required time 500.000
Slack: 485.525
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.475
=================================================================================================
Path: #4443
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.475
Required time 500.000
Slack: 485.525
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.475
=================================================================================================
Path: #4444
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.475
Required time 500.000
Slack: 485.525
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.475
=================================================================================================
Path: #4445
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.475
Required time 500.000
Slack: 485.525
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.475
=================================================================================================
Path: #4446
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.475
Required time 500.000
Slack: 485.525
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.475
=================================================================================================
Path: #4447
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.634
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4448
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.637
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4449
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.641
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4450
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.641
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4451
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.645
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4452
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.645
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4453
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.654
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4454
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.657
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4455
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.657
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4456
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.659
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4457
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.662
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4458
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.662
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4459
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.664
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4460
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.664
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4461
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.665
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4462
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.665
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4463
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.666
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4464
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.666
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4465
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.015
Required time 500.803
Slack: 485.669
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[22] O OBUF FB1_uB 31.791
ADDOUTID[22] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[22] I IBUF FB1_uA 35.905
FB1.uA/dut_inst.pc1.PC[22] D FDCE FB1_uA 37.015
=======================================================================================
Path: #4466
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.670
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4467
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[23]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 37.011
Required time 500.803
Slack: 485.672
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[23] O OBUF FB1_uB 31.791
ADDOUTID[23] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[23] I IBUF FB1_uA 35.901
FB1.uA/dut_inst.pc1.PC[23] D FDCE FB1_uA 37.011
=======================================================================================
Path: #4468
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.673
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4469
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.681
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4470
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.681
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4471
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.689
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4472
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[21]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.994
Required time 500.803
Slack: 485.689
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[21] O OBUF FB1_uB 31.791
ADDOUTID[21] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[21] I IBUF FB1_uA 35.884
FB1.uA/dut_inst.pc1.PC[21] D FDCE FB1_uA 36.994
=======================================================================================
Path: #4473
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[20]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.992
Required time 500.803
Slack: 485.691
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[20] O OBUF FB1_uB 31.793
ADDOUTID[20] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[20] I IBUF FB1_uA 35.882
FB1.uA/dut_inst.pc1.PC[20] D FDCE FB1_uA 36.992
=======================================================================================
Path: #4474
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[19]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.991
Required time 500.803
Slack: 485.692
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[19] O OBUF FB1_uB 31.831
ADDOUTID[19] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[19] I IBUF FB1_uA 35.881
FB1.uA/dut_inst.pc1.PC[19] D FDCE FB1_uA 36.991
=======================================================================================
Path: #4475
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[18]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.989
Required time 500.803
Slack: 485.694
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[18] O OBUF FB1_uB 31.791
ADDOUTID[18] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[18] I IBUF FB1_uA 35.879
FB1.uA/dut_inst.pc1.PC[18] D FDCE FB1_uA 36.989
=======================================================================================
Path: #4476
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[17]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.975
Required time 500.803
Slack: 485.708
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[17] O OBUF FB1_uB 31.791
ADDOUTID[17] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[17] I IBUF FB1_uA 35.865
FB1.uA/dut_inst.pc1.PC[17] D FDCE FB1_uA 36.975
=======================================================================================
Path: #4477
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.710
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4478
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[16]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.979
Required time 500.803
Slack: 485.717
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[16] O OBUF FB1_uB 31.792
ADDOUTID[16] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[16] I IBUF FB1_uA 35.869
FB1.uA/dut_inst.pc1.PC[16] D FDCE FB1_uA 36.979
=======================================================================================
Path: #4479
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.783
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4480
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.798
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
======================================================================================
Path: #4481
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 14.199
Required time 500.000
Slack: 485.801
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
ALUOUTEX[63:0] ALUOUTEX[62] Port top 14.199
=========================================================================================
Path: #4482
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uA/dut_inst.pc1.PC[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 36.425
Required time 500.803
Slack: 485.931
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.ADDOUTID_obuf[1] O OBUF FB1_uB 31.562
ADDOUTID[1] - Net - -
FB1.uA/dut_inst.ADDOUTID_ibuf[1] I IBUF FB1_uA 35.315
FB1.uA/dut_inst.pc1.PC[1] D FDCE FB1_uA 36.425
=======================================================================================
Path: #4483
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.865
Required time 500.000
Slack: 486.135
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[41] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[41] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[41] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.865
==========================================================================================
Path: #4484
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.846
Required time 500.000
Slack: 486.154
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[43] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[43] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[43] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.846
==========================================================================================
Path: #4485
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.846
Required time 500.000
Slack: 486.154
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[42] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[42] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[42] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.846
==========================================================================================
Path: #4486
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.846
Required time 500.000
Slack: 486.154
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[45] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[45] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[45] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.846
==========================================================================================
Path: #4487
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.845
Required time 500.000
Slack: 486.155
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[44] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[44] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[44] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.845
==========================================================================================
Path: #4488
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.820
Required time 500.000
Slack: 486.180
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[46] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[46] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[46] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.820
==========================================================================================
Path: #4489
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.820
Required time 500.000
Slack: 486.180
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[47] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[47] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[47] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.820
==========================================================================================
Path: #4490
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.798
Required time 500.000
Slack: 486.202
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[48] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[48] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[48] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.798
==========================================================================================
Path: #4491
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.796
Required time 500.000
Slack: 486.204
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[49] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[49] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[49] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.796
==========================================================================================
Path: #4492
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.777
Required time 500.000
Slack: 486.224
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[53] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[53] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[53] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.777
==========================================================================================
Path: #4493
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.777
Required time 500.000
Slack: 486.224
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[51] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[51] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[51] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.777
==========================================================================================
Path: #4494
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.777
Required time 500.000
Slack: 486.224
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[50] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[50] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[50] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.777
==========================================================================================
Path: #4495
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.775
Required time 500.000
Slack: 486.225
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[52] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[52] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[52] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.775
==========================================================================================
Path: #4496
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.762
Required time 500.000
Slack: 486.238
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[0] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[0] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.762
=========================================================================================
Path: #4497
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.759
Required time 500.000
Slack: 486.241
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[1] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[1] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.759
=========================================================================================
Path: #4498
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.750
Required time 500.000
Slack: 486.250
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[55] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[55] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[55] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.750
==========================================================================================
Path: #4499
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.750
Required time 500.000
Slack: 486.250
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[54] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[54] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[54] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.750
==========================================================================================
Path: #4500
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.740
Required time 500.000
Slack: 486.260
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[5] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[5] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[5] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.740
=========================================================================================
Path: #4501
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.740
Required time 500.000
Slack: 486.260
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[3] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[3] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.740
=========================================================================================
Path: #4502
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.740
Required time 500.000
Slack: 486.260
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[2] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[2] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.740
=========================================================================================
Path: #4503
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.739
Required time 500.000
Slack: 486.261
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[4] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[4] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.739
=========================================================================================
Path: #4504
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.725
Required time 500.000
Slack: 486.275
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[8] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[8] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[8] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.725
=========================================================================================
Path: #4505
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.723
Required time 500.000
Slack: 486.277
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[9] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[9] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[9] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.723
=========================================================================================
Path: #4506
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.714
Required time 500.000
Slack: 486.286
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[7] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[7] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[7] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.714
=========================================================================================
Path: #4507
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.714
Required time 500.000
Slack: 486.286
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[6] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[6] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[6] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.714
=========================================================================================
Path: #4508
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: FB1.uB/dut_inst.registers1.Registers_1[69]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 14.493
Required time 500.785
Slack: 486.292
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/dut_inst.REGWRITEWB_obuf O OBUF FB1_uD 2.192
REGWRITEWB - Net - -
FB1.uA/REGWRITEWB_0_ibuf I IBUF FB1_uA 7.240
FB1.uA/REGWRITEWB_aptn_ft_obuf O OBUF FB1_uA 9.329
REGWRITEWB_aptn_ft - Net - -
FB1.uB/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uB 13.082
FB1.uB/dut_inst.registers1.Registers_1[69] D FD FB1_uB 14.493
============================================================================================
Path: #4509
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.704
Required time 500.000
Slack: 486.297
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[13] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[13] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[13] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.704
==========================================================================================
Path: #4510
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.704
Required time 500.000
Slack: 486.297
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[10] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[10] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[10] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.704
==========================================================================================
Path: #4511
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.704
Required time 500.000
Slack: 486.297
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[11] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[11] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[11] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.704
==========================================================================================
Path: #4512
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.702
Required time 500.000
Slack: 486.298
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[12] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[12] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[12] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.702
==========================================================================================
Path: #4513
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.693
Required time 500.000
Slack: 486.308
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[56] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[56] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[56] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.693
==========================================================================================
Path: #4514
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.690
Required time 500.000
Slack: 486.310
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[57] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[57] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[57] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.690
==========================================================================================
Path: #4515
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.667
Required time 500.000
Slack: 486.333
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[21] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[21] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[21] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.667
==========================================================================================
Path: #4516
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.667
Required time 500.000
Slack: 486.333
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[18] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[18] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[18] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.667
==========================================================================================
Path: #4517
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.667
Required time 500.000
Slack: 486.333
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[19] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[19] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[19] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.667
==========================================================================================
Path: #4518
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.666
Required time 500.000
Slack: 486.334
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[58] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[58] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[58] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.666
==========================================================================================
Path: #4519
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.666
Required time 500.000
Slack: 486.334
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[20] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[20] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[20] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.666
==========================================================================================
Path: #4520
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.654
Required time 500.000
Slack: 486.346
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[59] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[59] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[59] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.654
==========================================================================================
Path: #4521
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.652
Required time 500.000
Slack: 486.348
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[24] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[24] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[24] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.652
==========================================================================================
Path: #4522
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.641
Required time 500.000
Slack: 486.360
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[22] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[22] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[22] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.641
==========================================================================================
Path: #4523
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.641
Required time 500.000
Slack: 486.360
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[23] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[23] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[23] I IBUF FB1_uC 7.554
ALUOUTEX[63:0] ALUOUTEX[62] Port top 13.641
==========================================================================================
Path: #4524
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.616
Required time 500.000
Slack: 486.384
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[61] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[61] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[61] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.616
==========================================================================================
Path: #4525
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.615
Required time 500.000
Slack: 486.386
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[60] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[60] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[60] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.615
==========================================================================================
Path: #4526
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.568
Required time 500.000
Slack: 486.432
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[62] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[62] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[62] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.568
==========================================================================================
Path: #4527
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4528
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4529
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4530
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4531
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[16]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[16] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[16] O OBUF FB1_uA 2.116
INSTRUCID[16] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[16] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4532
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[18]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[18] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[18] O OBUF FB1_uA 2.116
INSTRUCID[18] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[18] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4533
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[17]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[17] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[17] O OBUF FB1_uA 2.116
INSTRUCID[17] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[17] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4534
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[15]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.298
Required time 500.000
Slack: 486.702
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[15] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[15] O OBUF FB1_uA 2.116
INSTRUCID[15] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[15] I IBUF FB1_uB 7.155
equal equal Port top 13.298
=======================================================================================
Path: #4535
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.057
Required time 500.000
Slack: 486.943
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 13.057
==========================================================================================
Path: #4536
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.057
Required time 500.000
Slack: 486.943
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 13.057
==========================================================================================
Path: #4537
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[63]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.050
Required time 500.000
Slack: 486.950
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[63] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[63] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[63] I IBUF FB1_uC 7.843
ALUOUTEX[63:0] ALUOUTEX[63] Port top 13.050
==========================================================================================
Path: #4538
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.044
Required time 500.000
Slack: 486.956
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 13.044
==========================================================================================
Path: #4539
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.044
Required time 500.000
Slack: 486.956
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 13.044
==========================================================================================
Path: #4540
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 13.044
Required time 500.000
Slack: 486.956
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 13.044
==========================================================================================
Path: #4541
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.916
Required time 500.000
Slack: 487.084
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.916
==========================================================================================
Path: #4542
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.860
Required time 500.000
Slack: 487.140
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
equal equal Port top 12.860
=======================================================================================
Path: #4543
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[19]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.860
Required time 500.000
Slack: 487.140
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[19] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[19] O OBUF FB1_uA 2.116
INSTRUCID[19] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[19] I IBUF FB1_uB 7.155
equal equal Port top 12.860
=======================================================================================
Path: #4544
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.831
Required time 500.000
Slack: 487.169
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.831
==========================================================================================
Path: #4545
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.692
Required time 500.000
Slack: 487.309
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[16] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[16] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[16] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.692
==========================================================================================
Path: #4546
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.689
Required time 500.000
Slack: 487.311
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[17] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[17] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[17] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.689
==========================================================================================
Path: #4547
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.680
Required time 500.000
Slack: 487.320
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[14] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[14] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[14] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.680
==========================================================================================
Path: #4548
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.680
Required time 500.000
Slack: 487.320
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[15] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[15] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[15] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.680
==========================================================================================
Path: #4549
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.652
Required time 500.000
Slack: 487.348
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[25] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[25] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[25] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.652
==========================================================================================
Path: #4550
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.633
Required time 500.000
Slack: 487.367
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[29] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[29] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[29] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.633
==========================================================================================
Path: #4551
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.633
Required time 500.000
Slack: 487.367
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[26] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[26] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[26] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.633
==========================================================================================
Path: #4552
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.633
Required time 500.000
Slack: 487.367
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[27] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[27] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[27] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.633
==========================================================================================
Path: #4553
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.632
Required time 500.000
Slack: 487.368
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[28] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[28] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[28] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.632
==========================================================================================
Path: #4554
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.618
Required time 500.000
Slack: 487.382
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[32] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[32] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[32] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.618
==========================================================================================
Path: #4555
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.616
Required time 500.000
Slack: 487.384
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[33] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[33] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[33] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.616
==========================================================================================
Path: #4556
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.607
Required time 500.000
Slack: 487.393
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[31] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[31] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[31] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.607
==========================================================================================
Path: #4557
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.607
Required time 500.000
Slack: 487.393
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[30] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[30] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[30] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.607
==========================================================================================
Path: #4558
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.597
Required time 500.000
Slack: 487.403
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[35] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[35] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[35] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.597
==========================================================================================
Path: #4559
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.597
Required time 500.000
Slack: 487.403
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[37] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[37] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[37] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.597
==========================================================================================
Path: #4560
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.597
Required time 500.000
Slack: 487.403
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[34] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[34] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[34] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.597
==========================================================================================
Path: #4561
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.596
Required time 500.000
Slack: 487.405
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[36] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[36] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[36] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.596
==========================================================================================
Path: #4562
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.582
Required time 500.000
Slack: 487.418
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[40] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[40] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[40] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.582
==========================================================================================
Path: #4563
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.570
Required time 500.000
Slack: 487.430
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[38] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[38] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[38] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.570
==========================================================================================
Path: #4564
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: ALUOUTEX[63:0]/ALUOUTEX[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.570
Required time 500.000
Slack: 487.430
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[39] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[39] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[39] I IBUF FB1_uC 6.557
ALUOUTEX[63:0] ALUOUTEX[62] Port top 12.570
==========================================================================================
Path: #4565
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.478
Required time 500.000
Slack: 487.522
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.478
==========================================================================================
Path: #4566
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.459
Required time 500.000
Slack: 487.541
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.459
===========================================================================================
Path: #4567
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.459
Required time 500.000
Slack: 487.541
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.459
==========================================================================================
Path: #4568
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.457
Required time 500.000
Slack: 487.543
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.457
===========================================================================================
Path: #4569
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.253
Required time 500.000
Slack: 487.747
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.253
==========================================================================================
Path: #4570
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.200
Required time 500.000
Slack: 487.800
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 12.200
===========================================================================================
Path: #4571
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[17]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.119
Required time 500.000
Slack: 487.881
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[17] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[17] O OBUF FB1_uC 2.222
ALUOUTMEM[17] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[17] I IBUF FB1_uB 7.368
equal equal Port top 12.119
=======================================================================================
Path: #4572
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[15]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.119
Required time 500.000
Slack: 487.881
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[15] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[15] O OBUF FB1_uC 2.222
ALUOUTMEM[15] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[15] I IBUF FB1_uB 7.368
equal equal Port top 12.119
=======================================================================================
Path: #4573
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[16]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.119
Required time 500.000
Slack: 487.881
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[16] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[16] O OBUF FB1_uC 2.222
ALUOUTMEM[16] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[16] I IBUF FB1_uB 7.368
equal equal Port top 12.119
=======================================================================================
Path: #4574
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[13]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.118
Required time 500.000
Slack: 487.882
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[13] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[13] O OBUF FB1_uC 2.222
ALUOUTMEM[13] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[13] I IBUF FB1_uB 7.368
equal equal Port top 12.118
=======================================================================================
Path: #4575
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[14]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.118
Required time 500.000
Slack: 487.882
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[14] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[14] O OBUF FB1_uC 2.222
ALUOUTMEM[14] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[14] I IBUF FB1_uB 7.368
equal equal Port top 12.118
=======================================================================================
Path: #4576
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[24]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.104
Required time 500.000
Slack: 487.896
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[24] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[24] O OBUF FB1_uC 2.222
ALUOUTMEM[24] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[24] I IBUF FB1_uB 7.368
equal equal Port top 12.104
=======================================================================================
Path: #4577
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[26]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.104
Required time 500.000
Slack: 487.896
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[26] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[26] O OBUF FB1_uC 2.222
ALUOUTMEM[26] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[26] I IBUF FB1_uB 7.368
equal equal Port top 12.104
=======================================================================================
Path: #4578
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[25]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.104
Required time 500.000
Slack: 487.896
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[25] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[25] O OBUF FB1_uC 2.222
ALUOUTMEM[25] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[25] I IBUF FB1_uB 7.368
equal equal Port top 12.104
=======================================================================================
Path: #4579
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[27]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.101
Required time 500.000
Slack: 487.899
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[27] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[27] O OBUF FB1_uC 2.222
ALUOUTMEM[27] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[27] I IBUF FB1_uB 7.368
equal equal Port top 12.101
=======================================================================================
Path: #4580
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[29]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.101
Required time 500.000
Slack: 487.899
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[29] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[29] O OBUF FB1_uC 2.222
ALUOUTMEM[29] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[29] I IBUF FB1_uB 7.368
equal equal Port top 12.101
=======================================================================================
Path: #4581
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[28]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.101
Required time 500.000
Slack: 487.899
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[28] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[28] O OBUF FB1_uC 2.222
ALUOUTMEM[28] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[28] I IBUF FB1_uB 7.368
equal equal Port top 12.101
=======================================================================================
Path: #4582
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[20]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[20] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[20] O OBUF FB1_uC 2.222
ALUOUTMEM[20] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[20] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4583
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[23]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[23] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[23] O OBUF FB1_uC 2.222
ALUOUTMEM[23] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[23] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4584
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[21]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[21] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[21] O OBUF FB1_uC 2.222
ALUOUTMEM[21] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[21] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4585
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[19]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[19] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[19] O OBUF FB1_uC 2.222
ALUOUTMEM[19] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[19] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4586
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[22]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[22] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[22] O OBUF FB1_uC 2.222
ALUOUTMEM[22] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[22] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4587
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[18]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.093
Required time 500.000
Slack: 487.908
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[18] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[18] O OBUF FB1_uC 2.222
ALUOUTMEM[18] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[18] I IBUF FB1_uB 7.368
equal equal Port top 12.093
=======================================================================================
Path: #4588
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[32]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[32] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[32] O OBUF FB1_uC 2.222
ALUOUTMEM[32] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[32] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4589
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[35]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[35] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[35] O OBUF FB1_uC 2.222
ALUOUTMEM[35] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[35] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4590
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[39]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[39] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[39] O OBUF FB1_uC 2.222
ALUOUTMEM[39] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[39] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4591
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[34]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[34] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[34] O OBUF FB1_uC 2.222
ALUOUTMEM[34] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[34] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4592
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[41]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[41] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[41] O OBUF FB1_uC 2.222
ALUOUTMEM[41] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[41] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4593
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[30]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[30] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[30] O OBUF FB1_uC 2.222
ALUOUTMEM[30] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[30] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4594
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[40]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[40] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[40] O OBUF FB1_uC 2.222
ALUOUTMEM[40] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[40] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4595
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[31]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[31] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[31] O OBUF FB1_uC 2.222
ALUOUTMEM[31] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[31] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4596
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[33]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.082
Required time 500.000
Slack: 487.918
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[33] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[33] O OBUF FB1_uC 2.222
ALUOUTMEM[33] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[33] I IBUF FB1_uB 7.368
equal equal Port top 12.082
=======================================================================================
Path: #4597
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[37]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.081
Required time 500.000
Slack: 487.919
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[37] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[37] O OBUF FB1_uC 2.222
ALUOUTMEM[37] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[37] I IBUF FB1_uB 7.368
equal equal Port top 12.081
=======================================================================================
Path: #4598
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[36]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.081
Required time 500.000
Slack: 487.919
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[36] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[36] O OBUF FB1_uC 2.222
ALUOUTMEM[36] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[36] I IBUF FB1_uB 7.368
equal equal Port top 12.081
=======================================================================================
Path: #4599
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[38]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.081
Required time 500.000
Slack: 487.919
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[38] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[38] O OBUF FB1_uC 2.222
ALUOUTMEM[38] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[38] I IBUF FB1_uB 7.368
equal equal Port top 12.081
=======================================================================================
Path: #4600
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[46]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[46] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[46] O OBUF FB1_uC 2.222
ALUOUTMEM[46] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[46] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4601
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[44]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[44] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[44] O OBUF FB1_uC 2.222
ALUOUTMEM[44] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[44] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4602
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[43]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[43] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[43] O OBUF FB1_uC 2.222
ALUOUTMEM[43] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[43] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4603
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[42]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[42] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[42] O OBUF FB1_uC 2.222
ALUOUTMEM[42] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[42] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4604
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[45]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[45] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[45] O OBUF FB1_uC 2.222
ALUOUTMEM[45] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[45] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4605
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[47]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.056
Required time 500.000
Slack: 487.944
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[47] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[47] O OBUF FB1_uC 2.222
ALUOUTMEM[47] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[47] I IBUF FB1_uB 7.368
equal equal Port top 12.056
=======================================================================================
Path: #4606
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[48]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.035
Required time 500.000
Slack: 487.965
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[48] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[48] O OBUF FB1_uC 2.222
ALUOUTMEM[48] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[48] I IBUF FB1_uB 7.368
equal equal Port top 12.035
=======================================================================================
Path: #4607
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[50]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.035
Required time 500.000
Slack: 487.965
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[50] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[50] O OBUF FB1_uC 2.222
ALUOUTMEM[50] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[50] I IBUF FB1_uB 7.368
equal equal Port top 12.035
=======================================================================================
Path: #4608
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[49]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.035
Required time 500.000
Slack: 487.965
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[49] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[49] O OBUF FB1_uC 2.222
ALUOUTMEM[49] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[49] I IBUF FB1_uB 7.368
equal equal Port top 12.035
=======================================================================================
Path: #4609
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[52]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.033
Required time 500.000
Slack: 487.967
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[52] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[52] O OBUF FB1_uC 2.222
ALUOUTMEM[52] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[52] I IBUF FB1_uB 7.368
equal equal Port top 12.033
=======================================================================================
Path: #4610
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[53]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.033
Required time 500.000
Slack: 487.967
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[53] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[53] O OBUF FB1_uC 2.222
ALUOUTMEM[53] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[53] I IBUF FB1_uB 7.368
equal equal Port top 12.033
=======================================================================================
Path: #4611
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[51]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.033
Required time 500.000
Slack: 487.967
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[51] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[51] O OBUF FB1_uC 2.222
ALUOUTMEM[51] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[51] I IBUF FB1_uB 7.368
equal equal Port top 12.033
=======================================================================================
Path: #4612
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[11]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.012
Required time 500.000
Slack: 487.988
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[11] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[11] O OBUF FB1_uC 2.222
ALUOUTMEM[11] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[11] I IBUF FB1_uB 7.261
equal equal Port top 12.012
=======================================================================================
Path: #4613
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[12]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.011
Required time 500.000
Slack: 487.989
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[12] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[12] O OBUF FB1_uC 2.222
ALUOUTMEM[12] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[12] I IBUF FB1_uB 7.261
equal equal Port top 12.011
=======================================================================================
Path: #4614
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[55]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.009
Required time 500.000
Slack: 487.991
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[55] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[55] O OBUF FB1_uC 2.222
ALUOUTMEM[55] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[55] I IBUF FB1_uB 7.368
equal equal Port top 12.009
=======================================================================================
Path: #4615
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[54]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.009
Required time 500.000
Slack: 487.991
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[54] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[54] O OBUF FB1_uC 2.222
ALUOUTMEM[54] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[54] I IBUF FB1_uB 7.368
equal equal Port top 12.009
=======================================================================================
Path: #4616
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[56]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 12.009
Required time 500.000
Slack: 487.991
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[56] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[56] O OBUF FB1_uC 2.222
ALUOUTMEM[56] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[56] I IBUF FB1_uB 7.368
equal equal Port top 12.009
=======================================================================================
Path: #4617
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[57]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.999
Required time 500.000
Slack: 488.001
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[57] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[57] O OBUF FB1_uC 2.222
ALUOUTMEM[57] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[57] I IBUF FB1_uB 7.368
equal equal Port top 11.999
=======================================================================================
Path: #4618
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[59]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.999
Required time 500.000
Slack: 488.001
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[59] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[59] O OBUF FB1_uC 2.222
ALUOUTMEM[59] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[59] I IBUF FB1_uB 7.368
equal equal Port top 11.999
=======================================================================================
Path: #4619
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[58]/Q
Ending point: equal/equal
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.999
Required time 500.000
Slack: 488.001
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[58] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[58] O OBUF FB1_uC 2.222
ALUOUTMEM[58] - Net - -
FB1.uB/dut_inst.ALUOUTMEM_ibuf[58] I IBUF FB1_uB 7.368
equal equal Port top 11.999
=======================================================================================
Path: #4620
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.813
Required time 500.000
Slack: 488.187
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 11.813
===========================================================================================
Path: #4621
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.806
Required time 500.000
Slack: 488.194
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 11.806
===========================================================================================
Path: #4622
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.806
Required time 500.000
Slack: 488.194
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 11.806
===========================================================================================
Path: #4623
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: ADDOUTID[63:0]/ADDOUTID[62]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.778
Required time 500.000
Slack: 488.222
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
ADDOUTID[63:0] ADDOUTID[62] Port top 11.778
===========================================================================================
Path: #4624
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 11.363
Required time 500.000
Slack: 488.637
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
DMout[63:0] DMout[1] Port top 11.363
====================================================================================
Path: #4625
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 12.125
Required time 500.785
Slack: 488.660
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[3] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[3] O OBUF FB1_uD 2.161
WRWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[3] I IBUF FB1_uC 7.200
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 12.125
=============================================================================================
Path: #4626
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 12.125
Required time 500.785
Slack: 488.660
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[1] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[1] O OBUF FB1_uD 2.161
WRWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[1] I IBUF FB1_uC 7.200
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 12.125
=============================================================================================
Path: #4627
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 12.125
Required time 500.785
Slack: 488.660
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[0] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[0] O OBUF FB1_uD 2.161
WRWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[0] I IBUF FB1_uC 7.200
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 12.125
=============================================================================================
Path: #4628
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 12.125
Required time 500.785
Slack: 488.660
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[2] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[2] O OBUF FB1_uD 2.161
WRWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[2] I IBUF FB1_uC 7.200
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 12.125
=============================================================================================
Path: #4629
Starting point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 12.125
Required time 500.785
Slack: 488.660
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.writeregister_out[4] Q FDC FB1_uD 0.817
FB1.uD/WRWB_aptn_s_obuf[4] O OBUF FB1_uD 2.161
WRWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRWB_ibuf[4] I IBUF FB1_uC 7.200
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 12.125
=============================================================================================
Path: #4630
Starting point: FB1.uD/dut_inst.memwb1.regwrite_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.849
Required time 500.785
Slack: 488.935
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.regwrite_out Q FDC FB1_uD 0.817
FB1.uD/REGWRITEWB_aptn_s_obuf O OBUF FB1_uD 2.192
REGWRITEWB_aptn_s - Net - -
FB1.uC/dut_inst.REGWRITEWB_ibuf I IBUF FB1_uC 7.338
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.849
=======================================================================================
Path: #4631
Starting point: FB1.uB/dut_inst.registers1.Registers_1[0]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 71.568
Required time 500.737
Slack: 489.191
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------------
FB1.uB/dut_inst.registers1.Registers_1[0] Q FD FB1_uB 0.817
FB1.uB/dut_inst.PCSRCID_obuf O OBUF FB1_uB 64.445
PCSRCID - Net - -
FB1.uA/dut_inst.PCSRCID_ibuf I IBUF FB1_uA 69.484
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 71.568
===========================================================================================
Path: #4632
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.515
Required time 500.785
Slack: 489.270
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[41] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[41] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[41] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.515
=======================================================================================
Path: #4633
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.496
Required time 500.785
Slack: 489.289
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[45] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[45] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[45] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.496
=======================================================================================
Path: #4634
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.496
Required time 500.785
Slack: 489.289
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[43] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[43] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[43] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.496
=======================================================================================
Path: #4635
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.496
Required time 500.785
Slack: 489.289
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[42] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[42] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[42] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.496
=======================================================================================
Path: #4636
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.495
Required time 500.785
Slack: 489.290
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[44] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[44] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[44] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.495
=======================================================================================
Path: #4637
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[3]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[3] O OBUF FB1_uC 2.192
ALUOUTMEM[3] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4638
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[1]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[1] O OBUF FB1_uC 2.192
ALUOUTMEM[1] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4639
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[4]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[4] O OBUF FB1_uC 2.192
ALUOUTMEM[4] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4640
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[2]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[2] O OBUF FB1_uC 2.192
ALUOUTMEM[2] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4641
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[0]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[0] O OBUF FB1_uC 2.192
ALUOUTMEM[0] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4642
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[5]/Q
Ending point: DMout[63:0]/DMout[1]
The start point is clocked by clk [rising]
The end point is clocked by System [rising]
Arrival time 10.694
Required time 500.000
Slack: 489.306
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[5] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[5] O OBUF FB1_uC 2.192
ALUOUTMEM[5] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uD 5.945
DMout[63:0] DMout[1] Port top 10.694
======================================================================================
Path: #4643
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.470
Required time 500.785
Slack: 489.315
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[46] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[46] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[46] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.470
=======================================================================================
Path: #4644
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.470
Required time 500.785
Slack: 489.315
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[47] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[47] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[47] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.470
=======================================================================================
Path: #4645
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.448
Required time 500.785
Slack: 489.337
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[48] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[48] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[48] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.448
=======================================================================================
Path: #4646
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.446
Required time 500.785
Slack: 489.339
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[49] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[49] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[49] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.446
=======================================================================================
Path: #4647
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.427
Required time 500.785
Slack: 489.358
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[51] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[51] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[51] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.427
=======================================================================================
Path: #4648
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.427
Required time 500.785
Slack: 489.358
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[50] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[50] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[50] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.427
=======================================================================================
Path: #4649
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.427
Required time 500.785
Slack: 489.358
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[53] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[53] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[53] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.427
=======================================================================================
Path: #4650
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.425
Required time 500.785
Slack: 489.360
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[52] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[52] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[52] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.425
=======================================================================================
Path: #4651
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.412
Required time 500.785
Slack: 489.373
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[0] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[0] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[0] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.412
=======================================================================================
Path: #4652
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.409
Required time 500.785
Slack: 489.376
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[1] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[1] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[1] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.409
=======================================================================================
Path: #4653
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.400
Required time 500.785
Slack: 489.385
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[55] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[55] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[55] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.400
=======================================================================================
Path: #4654
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.400
Required time 500.785
Slack: 489.385
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[54] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[54] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[54] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.400
=======================================================================================
Path: #4655
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.390
Required time 500.785
Slack: 489.395
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[3] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[3] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[3] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.390
=======================================================================================
Path: #4656
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.390
Required time 500.785
Slack: 489.395
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[5] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[5] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[5] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.390
=======================================================================================
Path: #4657
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.390
Required time 500.785
Slack: 489.395
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[2] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[2] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[2] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.390
=======================================================================================
Path: #4658
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.389
Required time 500.785
Slack: 489.396
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[4] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[4] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[4] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.389
=======================================================================================
Path: #4659
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.375
Required time 500.785
Slack: 489.410
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[8] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[8] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[8] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.375
=======================================================================================
Path: #4660
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.373
Required time 500.785
Slack: 489.412
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[9] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[9] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[9] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.373
=======================================================================================
Path: #4661
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.364
Required time 500.785
Slack: 489.421
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[7] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[7] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[7] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.364
=======================================================================================
Path: #4662
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.364
Required time 500.785
Slack: 489.421
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[6] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[6] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[6] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.364
=======================================================================================
Path: #4663
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.354
Required time 500.785
Slack: 489.431
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[11] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[11] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[11] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.354
=======================================================================================
Path: #4664
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.354
Required time 500.785
Slack: 489.431
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[10] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[10] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[10] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.354
=======================================================================================
Path: #4665
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.354
Required time 500.785
Slack: 489.431
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[13] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[13] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[13] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.354
=======================================================================================
Path: #4666
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.352
Required time 500.785
Slack: 489.433
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[12] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[12] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[12] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.352
=======================================================================================
Path: #4667
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.343
Required time 500.785
Slack: 489.442
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[56] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[56] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[56] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.343
=======================================================================================
Path: #4668
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.340
Required time 500.785
Slack: 489.445
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[57] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[57] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[57] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.340
=======================================================================================
Path: #4669
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.317
Required time 500.785
Slack: 489.468
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[21] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[21] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[21] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.317
=======================================================================================
Path: #4670
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.317
Required time 500.785
Slack: 489.468
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[18] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[18] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[18] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.317
=======================================================================================
Path: #4671
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.317
Required time 500.785
Slack: 489.468
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[19] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[19] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[19] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.317
=======================================================================================
Path: #4672
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.316
Required time 500.785
Slack: 489.469
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[58] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[58] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[58] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.316
=======================================================================================
Path: #4673
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.316
Required time 500.785
Slack: 489.469
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[20] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[20] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[20] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.316
=======================================================================================
Path: #4674
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.304
Required time 500.785
Slack: 489.481
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[59] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[59] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[59] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.304
=======================================================================================
Path: #4675
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.302
Required time 500.785
Slack: 489.483
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[24] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[24] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[24] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.302
=======================================================================================
Path: #4676
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.290
Required time 500.785
Slack: 489.494
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[22] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[22] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[22] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.290
=======================================================================================
Path: #4677
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.290
Required time 500.785
Slack: 489.494
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[23] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[23] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[23] I IBUF FB1_uC 7.554
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 11.290
=======================================================================================
Path: #4678
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.266
Required time 500.785
Slack: 489.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[61] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[61] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[61] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.266
=======================================================================================
Path: #4679
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.264
Required time 500.785
Slack: 489.520
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[60] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[60] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[60] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.264
=======================================================================================
Path: #4680
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 11.218
Required time 500.785
Slack: 489.567
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[62] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[62] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[62] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 11.218
=======================================================================================
Path: #4681
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.700
Required time 500.785
Slack: 490.085
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[63] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[63] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[63] I IBUF FB1_uC 7.843
FB1.uC/dut_inst.exmem1.aluout_out[63] D FDC FB1_uC 10.700
=======================================================================================
Path: #4682
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.341
Required time 500.785
Slack: 490.443
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[16] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[16] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[16] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.341
=======================================================================================
Path: #4683
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.339
Required time 500.785
Slack: 490.446
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[17] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[17] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[17] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.339
=======================================================================================
Path: #4684
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.330
Required time 500.785
Slack: 490.455
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[15] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[15] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[15] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.330
=======================================================================================
Path: #4685
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.330
Required time 500.785
Slack: 490.455
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[14] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[14] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[14] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.330
=======================================================================================
Path: #4686
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.303
Required time 500.785
Slack: 490.482
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[25] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[25] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[25] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.303
=======================================================================================
Path: #4687
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.283
Required time 500.785
Slack: 490.502
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[27] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[27] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[27] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.283
=======================================================================================
Path: #4688
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.283
Required time 500.785
Slack: 490.502
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[26] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[26] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[26] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.283
=======================================================================================
Path: #4689
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.283
Required time 500.785
Slack: 490.502
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[29] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[29] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[29] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.283
=======================================================================================
Path: #4690
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.282
Required time 500.785
Slack: 490.503
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[28] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[28] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[28] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.282
=======================================================================================
Path: #4691
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.268
Required time 500.785
Slack: 490.517
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[32] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[32] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[32] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.268
=======================================================================================
Path: #4692
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.266
Required time 500.785
Slack: 490.519
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[33] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[33] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[33] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.266
=======================================================================================
Path: #4693
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.257
Required time 500.785
Slack: 490.528
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[31] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[31] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[31] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.257
=======================================================================================
Path: #4694
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.257
Required time 500.785
Slack: 490.528
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[30] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[30] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[30] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.257
=======================================================================================
Path: #4695
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.247
Required time 500.785
Slack: 490.538
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[34] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[34] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[34] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.247
=======================================================================================
Path: #4696
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.247
Required time 500.785
Slack: 490.538
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[37] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[37] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[37] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.247
=======================================================================================
Path: #4697
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.247
Required time 500.785
Slack: 490.538
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[35] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[35] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[35] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.247
=======================================================================================
Path: #4698
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.245
Required time 500.785
Slack: 490.539
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[36] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[36] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[36] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.245
=======================================================================================
Path: #4699
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.232
Required time 500.785
Slack: 490.553
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[40] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[40] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[40] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.232
=======================================================================================
Path: #4700
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.220
Required time 500.785
Slack: 490.565
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[39] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[39] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[39] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.220
=======================================================================================
Path: #4701
Starting point: FB1.uD/dut_inst.memwb1.memtoreg_out/Q
Ending point: FB1.uC/dut_inst.exmem1.aluout_out[62]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 10.220
Required time 500.785
Slack: 490.565
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uD/dut_inst.memwb1.memtoreg_out Q FDC FB1_uD 0.817
FB1.uD/WRITEDATAWB_aptn_s_obuf[38] O OBUF FB1_uD 2.804
WRITEDATAWB_aptn_s[38] - Net - -
FB1.uC/dut_inst.WRITEDATAWB_ibuf[38] I IBUF FB1_uC 6.557
FB1.uC/dut_inst.exmem1.aluout_out[62] D FDC FB1_uC 10.220
=======================================================================================
Path: #4702
Starting point: FB1.uB/dut_inst.idex1.writeregister_out[2]/Q
Ending point: FB1.uA/dut_inst.ifid1.out_instruc[0]/CE
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 31.593
Required time 500.737
Slack: 490.700
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------------
FB1.uB/dut_inst.idex1.writeregister_out[2] Q FDC FB1_uB 0.817
FB1.uB/dut_inst.stall_obuf O OBUF FB1_uB 24.602
stall - Net - -
FB1.uA/dut_inst.stall_ibuf I IBUF FB1_uA 29.804
FB1.uA/dut_inst.ifid1.out_instruc[0] CE FDCE FB1_uA 31.593
============================================================================================
Path: #4703
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[6]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.745
Required time 500.785
Slack: 491.039
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[6] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[6] O OBUF FB1_uA 2.116
INSTRUCID[6] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[6] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.745
======================================================================================
Path: #4704
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[3]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.723
Required time 500.785
Slack: 491.062
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[3] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[3] O OBUF FB1_uA 2.116
INSTRUCID[3] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[3] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.723
======================================================================================
Path: #4705
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[2]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.723
Required time 500.785
Slack: 491.062
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[2] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[2] O OBUF FB1_uA 2.116
INSTRUCID[2] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[2] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.723
======================================================================================
Path: #4706
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[5]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.723
Required time 500.785
Slack: 491.062
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[5] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[5] O OBUF FB1_uA 2.116
INSTRUCID[5] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[5] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.723
======================================================================================
Path: #4707
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[0]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.704
Required time 500.785
Slack: 491.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[0] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[0] O OBUF FB1_uA 2.116
INSTRUCID[0] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[0] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.704
======================================================================================
Path: #4708
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[1]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.704
Required time 500.785
Slack: 491.081
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[1] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[1] O OBUF FB1_uA 2.116
INSTRUCID[1] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[1] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.704
======================================================================================
Path: #4709
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[20]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[20] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[20] O OBUF FB1_uA 2.116
INSTRUCID[20] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[20] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 9.654
=========================================================================================
Path: #4710
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[21]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[21] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[21] O OBUF FB1_uA 2.116
INSTRUCID[21] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[21] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 9.654
=========================================================================================
Path: #4711
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[23]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[23] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[23] O OBUF FB1_uA 2.116
INSTRUCID[23] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[23] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 9.654
=========================================================================================
Path: #4712
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[22]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata2_out[22]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[22] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[22] O OBUF FB1_uA 2.116
INSTRUCID[22] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[22] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata2_out[22] D FDC FB1_uB 9.654
=========================================================================================
Path: #4713
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[16]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata1_out[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[16] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[16] O OBUF FB1_uA 2.116
INSTRUCID[16] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[16] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata1_out[26] D FDC FB1_uB 9.654
=========================================================================================
Path: #4714
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[18]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata1_out[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[18] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[18] O OBUF FB1_uA 2.116
INSTRUCID[18] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[18] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata1_out[26] D FDC FB1_uB 9.654
=========================================================================================
Path: #4715
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[15]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata1_out[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[15] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[15] O OBUF FB1_uA 2.116
INSTRUCID[15] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[15] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata1_out[26] D FDC FB1_uB 9.654
=========================================================================================
Path: #4716
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[17]/Q
Ending point: FB1.uB/dut_inst.idex1.readdata1_out[26]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.654
Required time 500.785
Slack: 491.131
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[17] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[17] O OBUF FB1_uA 2.116
INSTRUCID[17] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[17] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.readdata1_out[26] D FDC FB1_uB 9.654
=========================================================================================
Path: #4717
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[4]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[9]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.443
Required time 500.785
Slack: 491.342
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[4] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[4] O OBUF FB1_uA 2.116
INSTRUCID[4] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[4] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[9] D FDC FB1_uB 9.443
======================================================================================
Path: #4718
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[24]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.311
Required time 500.803
Slack: 491.492
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[24] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[24] O OBUF FB1_uA 2.116
INSTRUCID[24] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[24] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 9.311
=======================================================================================
Path: #4719
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[19]/Q
Ending point: FB1.uB/dut_inst.idex1.alusrc_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.311
Required time 500.803
Slack: 491.492
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[19] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[19] O OBUF FB1_uA 2.116
INSTRUCID[19] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[19] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.alusrc_out D FDC FB1_uB 9.311
=======================================================================================
Path: #4720
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[7]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.083
Required time 500.785
Slack: 491.702
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[7] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[7] O OBUF FB1_uA 2.116
INSTRUCID[7] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[7] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.083
======================================================================================
Path: #4721
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[8]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.068
Required time 500.785
Slack: 491.717
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[8] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[8] O OBUF FB1_uA 2.116
INSTRUCID[8] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[8] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[0] D FDC FB1_uB 9.068
======================================================================================
Path: #4722
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[11]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.038
Required time 500.785
Slack: 491.747
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[11] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[11] O OBUF FB1_uA 2.116
INSTRUCID[11] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[11] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[4] D FDC FB1_uB 9.038
=======================================================================================
Path: #4723
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[9]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.038
Required time 500.785
Slack: 491.747
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[9] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[9] O OBUF FB1_uA 2.116
INSTRUCID[9] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[9] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[2] D FDC FB1_uB 9.038
======================================================================================
Path: #4724
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[10]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.038
Required time 500.785
Slack: 491.747
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[10] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[10] O OBUF FB1_uA 2.116
INSTRUCID[10] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[10] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[3] D FDC FB1_uB 9.038
=======================================================================================
Path: #4725
Starting point: FB1.uC/dut_inst.exmem1.memread_out/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.013
Required time 500.785
Slack: 491.772
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memread_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMREADMEM_obuf O OBUF FB1_uC 2.116
MEMREADMEM - Net - -
FB1.uD/dut_inst.MEMREADMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 9.013
======================================================================================
Path: #4726
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[53]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[53] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[53] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[53] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[53] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4727
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[21]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[21] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[21] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[21] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[21] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4728
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[50]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[50] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[50] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[50] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[50] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4729
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[52]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[52] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[52] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[52] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[52] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4730
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[20]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[20] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[20] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[20] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[20] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4731
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[18]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 9.002
Required time 500.803
Slack: 491.801
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[18] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[18] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[18] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[18] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 9.002
=======================================================================================
Path: #4732
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[36]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.992
Required time 500.803
Slack: 491.810
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[36] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[36] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[36] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[36] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.992
=======================================================================================
Path: #4733
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[35]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.992
Required time 500.803
Slack: 491.810
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[35] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[35] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[35] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[35] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.992
=======================================================================================
Path: #4734
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[32]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.877
Required time 500.803
Slack: 491.926
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[32] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[32] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[32] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[32] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.877
=======================================================================================
Path: #4735
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[30]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.877
Required time 500.803
Slack: 491.926
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[30] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[30] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[30] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[30] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.877
=======================================================================================
Path: #4736
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[33]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.877
Required time 500.803
Slack: 491.926
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[33] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[33] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[33] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[33] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.877
=======================================================================================
Path: #4737
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[10]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[10] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[10] O OBUF FB1_uC 2.192
ALUOUTMEM[10] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[10] I IBUF FB1_uD 7.338
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4738
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[13]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[13] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[13] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[13] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[13] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4739
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[42]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[42] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[42] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[42] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[42] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4740
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[12]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[12] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[12] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[12] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[12] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4741
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[45]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[45] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[45] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[45] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[45] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4742
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[44]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.876
Required time 500.803
Slack: 491.927
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[44] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[44] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[44] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[44] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.876
=======================================================================================
Path: #4743
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[28]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.866
Required time 500.803
Slack: 491.937
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[28] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[28] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[28] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[28] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.866
=======================================================================================
Path: #4744
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[27]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.866
Required time 500.803
Slack: 491.937
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[27] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[27] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[27] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[27] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.866
=======================================================================================
Path: #4745
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[48]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.858
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[48] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[48] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[48] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[48] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.858
=======================================================================================
Path: #4746
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[47]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.858
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[47] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[47] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[47] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[47] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.858
=======================================================================================
Path: #4747
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[16]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.858
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[16] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[16] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[16] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[16] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.858
=======================================================================================
Path: #4748
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[15]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.858
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[15] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[15] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[15] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[15] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.858
=======================================================================================
Path: #4749
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[60]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.857
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[60] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[60] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[60] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[60] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.857
=======================================================================================
Path: #4750
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[59]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.857
Required time 500.803
Slack: 491.945
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[59] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[59] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[59] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[59] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.857
=======================================================================================
Path: #4751
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[25]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.781
Required time 500.785
Slack: 492.004
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[25] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[25] O OBUF FB1_uA 2.116
INSTRUCID[25] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[25] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[4] D FDC FB1_uB 8.781
=======================================================================================
Path: #4752
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[62]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.769
Required time 500.803
Slack: 492.034
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[62] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[62] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[62] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[62] I IBUF FB1_uD 7.261
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.769
=======================================================================================
Path: #4753
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[63]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.769
Required time 500.803
Slack: 492.034
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[63] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[63] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[63] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[63] I IBUF FB1_uD 7.261
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.769
=======================================================================================
Path: #4754
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[31]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[11]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.750
Required time 500.785
Slack: 492.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[31] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[31] O OBUF FB1_uA 2.116
INSTRUCID[31] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[31] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[11] D FDC FB1_uB 8.750
=======================================================================================
Path: #4755
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[26]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[6]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.750
Required time 500.785
Slack: 492.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[26] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[26] O OBUF FB1_uA 2.116
INSTRUCID[26] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[26] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[6] D FDC FB1_uB 8.750
=======================================================================================
Path: #4756
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[29]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.750
Required time 500.785
Slack: 492.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[29] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[29] O OBUF FB1_uA 2.116
INSTRUCID[29] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[29] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[8] D FDC FB1_uB 8.750
=======================================================================================
Path: #4757
Starting point: FB1.uA/dut_inst.ifid1.out_instruc[28]/Q
Ending point: FB1.uB/dut_inst.idex1.imm_out[8]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.750
Required time 500.785
Slack: 492.035
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uA/dut_inst.ifid1.out_instruc[28] Q FDCE FB1_uA 0.817
FB1.uA/dut_inst.INSTRUCID_obuf[28] O OBUF FB1_uA 2.116
INSTRUCID[28] - Net - -
FB1.uB/dut_inst.INSTRUCID_ibuf[28] I IBUF FB1_uB 7.155
FB1.uB/dut_inst.idex1.imm_out[8] D FDC FB1_uB 8.750
=======================================================================================
Path: #4758
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[7]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.756
Required time 500.803
Slack: 492.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[7] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[7] O OBUF FB1_uC 2.192
ALUOUTMEM[7] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[7] I IBUF FB1_uD 7.338
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.756
======================================================================================
Path: #4759
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[8]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.756
Required time 500.803
Slack: 492.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[8] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[8] O OBUF FB1_uC 2.192
ALUOUTMEM[8] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[8] I IBUF FB1_uD 7.338
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.756
======================================================================================
Path: #4760
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[6]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.756
Required time 500.803
Slack: 492.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[6] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[6] O OBUF FB1_uC 2.192
ALUOUTMEM[6] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[6] I IBUF FB1_uD 7.338
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.756
======================================================================================
Path: #4761
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[9]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.756
Required time 500.803
Slack: 492.047
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[9] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[9] O OBUF FB1_uC 2.192
ALUOUTMEM[9] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[9] I IBUF FB1_uD 7.338
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.756
======================================================================================
Path: #4762
Starting point: FB1.uC/dut_inst.exmem1.memwrite_out/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.744
Required time 500.803
Slack: 492.059
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.memwrite_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.MEMWRITEMEM_obuf O OBUF FB1_uC 2.116
MEMWRITEMEM - Net - -
FB1.uD/dut_inst.MEMWRITEMEM_ibuf I IBUF FB1_uD 7.262
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.744
=====================================================================================
Path: #4763
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[55]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.742
Required time 500.803
Slack: 492.061
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[55] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[55] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[55] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[55] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.742
=======================================================================================
Path: #4764
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[56]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.742
Required time 500.803
Slack: 492.061
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[56] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[56] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[56] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[56] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.742
=======================================================================================
Path: #4765
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[24]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.733
Required time 500.803
Slack: 492.070
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[24] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[24] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[24] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[24] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.733
=======================================================================================
Path: #4766
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[25]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.733
Required time 500.803
Slack: 492.070
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[25] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[25] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[25] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[25] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.733
=======================================================================================
Path: #4767
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[38]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.723
Required time 500.803
Slack: 492.079
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[38] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[38] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[38] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[38] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.723
=======================================================================================
Path: #4768
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[40]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.723
Required time 500.803
Slack: 492.079
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[40] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[40] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[40] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[40] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.723
=======================================================================================
Path: #4769
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[37]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.625
Required time 500.803
Slack: 492.178
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[37] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[37] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[37] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[37] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.625
=======================================================================================
Path: #4770
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[34]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.625
Required time 500.803
Slack: 492.178
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[34] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[34] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[34] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[34] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.625
=======================================================================================
Path: #4771
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[19]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.615
Required time 500.803
Slack: 492.188
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[19] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[19] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[19] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[19] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.615
=======================================================================================
Path: #4772
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[29]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.499
Required time 500.803
Slack: 492.304
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[29] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[29] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[29] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[29] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.499
=======================================================================================
Path: #4773
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[26]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.499
Required time 500.803
Slack: 492.304
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[26] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[26] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[26] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[26] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.499
=======================================================================================
Path: #4774
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[31]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.498
Required time 500.803
Slack: 492.305
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[31] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[31] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[31] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[31] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.498
=======================================================================================
Path: #4775
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[1]/Q
Ending point: FB1.uD/dut_inst.memwb1.writeregister_out[1]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.476
Required time 500.785
Slack: 492.308
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[1] O OBUF FB1_uC 2.222
WRMEM[1] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[1] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.memwb1.writeregister_out[1] D FDC FB1_uD 8.476
=============================================================================================
Path: #4776
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[0]/Q
Ending point: FB1.uD/dut_inst.memwb1.writeregister_out[0]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.476
Required time 500.785
Slack: 492.308
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[0] O OBUF FB1_uC 2.222
WRMEM[0] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[0] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.memwb1.writeregister_out[0] D FDC FB1_uD 8.476
=============================================================================================
Path: #4777
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[2]/Q
Ending point: FB1.uD/dut_inst.memwb1.writeregister_out[2]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.476
Required time 500.785
Slack: 492.308
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[2] O OBUF FB1_uC 2.222
WRMEM[2] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[2] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.memwb1.writeregister_out[2] D FDC FB1_uD 8.476
=============================================================================================
Path: #4778
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[4]/Q
Ending point: FB1.uD/dut_inst.memwb1.writeregister_out[4]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.476
Required time 500.785
Slack: 492.308
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[4] O OBUF FB1_uC 2.222
WRMEM[4] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[4] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.memwb1.writeregister_out[4] D FDC FB1_uD 8.476
=============================================================================================
Path: #4779
Starting point: FB1.uC/dut_inst.exmem1.writeregister_out[3]/Q
Ending point: FB1.uD/dut_inst.memwb1.writeregister_out[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.476
Required time 500.785
Slack: 492.308
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.writeregister_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.WRMEM_obuf[3] O OBUF FB1_uC 2.222
WRMEM[3] - Net - -
FB1.uD/dut_inst.WRMEM_ibuf[3] I IBUF FB1_uD 7.368
FB1.uD/dut_inst.memwb1.writeregister_out[3] D FDC FB1_uD 8.476
=============================================================================================
Path: #4780
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[11]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.489
Required time 500.803
Slack: 492.314
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[11] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[11] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[11] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[11] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.489
=======================================================================================
Path: #4781
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[14]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.471
Required time 500.803
Slack: 492.332
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[14] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[14] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[14] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[14] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.471
=======================================================================================
Path: #4782
Starting point: FB1.uC/dut_inst.exmem1.regwrite_out/Q
Ending point: FB1.uD/dut_inst.memwb1.regwrite_out/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.401
Required time 500.785
Slack: 492.384
Instance / Net name Pin name Type FPGA Arrival time
-------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.regwrite_out Q FDC FB1_uC 0.817
FB1.uC/dut_inst.REGWRITEMEM_obuf O OBUF FB1_uC 2.192
REGWRITEMEM - Net - -
FB1.uD/dut_inst.REGWRITEMEM_ibuf I IBUF FB1_uD 7.338
FB1.uD/dut_inst.memwb1.regwrite_out D FDC FB1_uD 8.401
=====================================================================================
Path: #4783
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[23]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.370
Required time 500.803
Slack: 492.433
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[23] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[23] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[23] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[23] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.370
=======================================================================================
Path: #4784
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[22]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.370
Required time 500.803
Slack: 492.433
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[22] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[22] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[22] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[22] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.370
=======================================================================================
Path: #4785
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[3]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[3] O OBUF FB1_uC 2.192
ALUOUTMEM[3] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[3] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4786
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[2]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[2] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[2] O OBUF FB1_uC 2.192
ALUOUTMEM[2] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[2] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4787
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[4]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[4] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[4] O OBUF FB1_uC 2.192
ALUOUTMEM[4] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[4] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4788
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[5]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[5] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[5] O OBUF FB1_uC 2.192
ALUOUTMEM[5] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[5] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4789
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[0]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[0] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[0] O OBUF FB1_uC 2.192
ALUOUTMEM[0] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[0] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4790
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[1]/Q
Ending point: FB1.uD/dut_inst.memwb1.dmout_out[61]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.785
Slack: 492.441
Instance / Net name Pin name Type FPGA Arrival time
--------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[1] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.ALUOUTMEM_obuf[1] O OBUF FB1_uC 2.192
ALUOUTMEM[1] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[1] I IBUF FB1_uD 5.945
FB1.uD/dut_inst.memwb1.dmout_out[61] D FDC FB1_uD 8.344
======================================================================================
Path: #4791
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[39]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.344
Required time 500.803
Slack: 492.458
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[39] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[39] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[39] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[39] I IBUF FB1_uD 6.972
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 8.344
=======================================================================================
Path: #4792
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[25]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[25]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[25] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[25] O OBUF FB1_uC 2.116
RD2MEM[25] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[25] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[25] D FD FB1_uD 8.218
==========================================================================================
Path: #4793
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[15]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[15]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[15] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[15] O OBUF FB1_uC 2.116
RD2MEM[15] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[15] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[15] D FD FB1_uD 8.218
==========================================================================================
Path: #4794
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[12]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[12]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[12] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[12] O OBUF FB1_uC 2.116
RD2MEM[12] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[12] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[12] D FD FB1_uD 8.218
==========================================================================================
Path: #4795
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[47]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[47]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[47] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[47] O OBUF FB1_uC 2.116
RD2MEM[47] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[47] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[47] D FD FB1_uD 8.218
==========================================================================================
Path: #4796
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[60]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[60]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[60] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[60] O OBUF FB1_uC 2.116
RD2MEM[60] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[60] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[60] D FD FB1_uD 8.218
==========================================================================================
Path: #4797
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[49]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[49]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[49] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[49] O OBUF FB1_uC 2.116
RD2MEM[49] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[49] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[49] D FD FB1_uD 8.218
==========================================================================================
Path: #4798
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[5]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[5]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[5] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[5] O OBUF FB1_uC 2.116
RD2MEM[5] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[5] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[5] D FD FB1_uD 8.218
=========================================================================================
Path: #4799
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[63]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[63]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[63] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[63] O OBUF FB1_uC 2.116
RD2MEM[63] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[63] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[63] D FD FB1_uD 8.218
==========================================================================================
Path: #4800
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[3]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[3]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[3] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[3] O OBUF FB1_uC 2.116
RD2MEM[3] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[3] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[3] D FD FB1_uD 8.218
=========================================================================================
Path: #4801
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[27]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[27]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[27] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[27] O OBUF FB1_uC 2.116
RD2MEM[27] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[27] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[27] D FD FB1_uD 8.218
==========================================================================================
Path: #4802
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[35]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[35]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[35] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[35] O OBUF FB1_uC 2.116
RD2MEM[35] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[35] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[35] D FD FB1_uD 8.218
==========================================================================================
Path: #4803
Starting point: FB1.uC/dut_inst.exmem1.readdata2_out[40]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[40]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 8.218
Required time 500.785
Slack: 492.567
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.readdata2_out[40] Q FDC FB1_uC 0.817
FB1.uC/dut_inst.RD2MEM_obuf[40] O OBUF FB1_uC 2.116
RD2MEM[40] - Net - -
FB1.uD/dut_inst.RD2MEM_ibuf[40] I IBUF FB1_uD 7.155
FB1.uD/dut_inst.dm1.memory[40] D FD FB1_uD 8.218
==========================================================================================
Path: #4804
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[51]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.618
Required time 500.803
Slack: 493.185
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[51] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[51] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[51] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[51] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.618
=======================================================================================
Path: #4805
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[58]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.493
Required time 500.803
Slack: 493.310
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[58] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[58] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[58] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[58] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.493
=======================================================================================
Path: #4806
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[61]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.493
Required time 500.803
Slack: 493.310
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[61] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[61] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[61] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[61] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.493
=======================================================================================
Path: #4807
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[43]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.492
Required time 500.803
Slack: 493.311
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[43] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[43] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[43] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[43] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.492
=======================================================================================
Path: #4808
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[17]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.491
Required time 500.803
Slack: 493.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[17] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[17] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[17] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[17] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.491
=======================================================================================
Path: #4809
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[49]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.491
Required time 500.803
Slack: 493.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[49] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[49] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[49] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[49] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.491
=======================================================================================
Path: #4810
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[46]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.491
Required time 500.803
Slack: 493.312
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[46] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[46] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[46] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[46] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.491
=======================================================================================
Path: #4811
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[57]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.381
Required time 500.803
Slack: 493.421
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[57] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[57] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[57] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[57] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.381
=======================================================================================
Path: #4812
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[54]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.381
Required time 500.803
Slack: 493.421
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[54] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[54] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[54] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[54] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.381
=======================================================================================
Path: #4813
Starting point: FB1.uC/dut_inst.exmem1.aluout_out[41]/Q
Ending point: FB1.uD/dut_inst.dm1.memory[70]/D
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 7.363
Required time 500.803
Slack: 493.440
Instance / Net name Pin name Type FPGA Arrival time
---------------------------------------------------------------------------------------
FB1.uC/dut_inst.exmem1.aluout_out[41] Q FDC FB1_uC 0.817
FB1.uC/ALUOUTMEM_aptn_s_obuf[41] O OBUF FB1_uC 2.222
ALUOUTMEM_aptn_s[41] - Net - -
FB1.uD/dut_inst.ALUOUTMEM_ibuf[41] I IBUF FB1_uD 5.975
FB1.uD/dut_inst.dm1.memory[70] D FD FB1_uD 7.363
=======================================================================================
Path: #4814
Starting point: FB1.uB/dut_inst.aptn_reset_sync_rst_n_6/Q[0]
Ending point: FB1.uC/dut_inst.aptn_reset_sync_rst_n_2/D[0]
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 5.283
Required time 499.998
Slack: 494.715
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uB/dut_inst.aptn_reset_sync_rst_n_6 Q[0] dff FB1_uB 0.137
FB1.uB/dut_inst.aptn_reset_sync_rst_n_6 Q[0] dff FB1_uB 0.137
rst_n_aptn_ft - Net - -
FB1.uC/dut_inst.aptn_reset_sync_rst_n_2 D[0] dff FB1_uC 5.283
FB1.uC/dut_inst.aptn_reset_sync_rst_n_2 D[0] dff FB1_uC 5.283
=========================================================================================
Path: #4815
Starting point: FB1.uA/dut_inst.aptn_reset_sync_rst_n_10/Q[0]
Ending point: FB1.uD/dut_inst.aptn_reset_sync_rst_n_5/D[0]
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 5.185
Required time 499.998
Slack: 494.813
Instance / Net name Pin name Type FPGA Arrival time
------------------------------------------------------------------------------------------
FB1.uA/dut_inst.aptn_reset_sync_rst_n_10 Q[0] dff FB1_uA 0.137
FB1.uA/dut_inst.aptn_reset_sync_rst_n_10 Q[0] dff FB1_uA 0.137
rst_n_aptn_s - Net - -
FB1.uD/dut_inst.aptn_reset_sync_rst_n_5 D[0] dff FB1_uD 5.185
FB1.uD/dut_inst.aptn_reset_sync_rst_n_5 D[0] dff FB1_uD 5.185
==========================================================================================
Path: #4816
Starting point: FB1.uA/dut_inst.aptn_reset_sync_rst_n_9/Q[0]
Ending point: FB1.uB/dut_inst.aptn_reset_sync_rst_n_5/D[0]
The start point is clocked by clk [rising]
The end point is clocked by clk [rising]
Arrival time 3.890
Required time 499.998
Slack: 496.108
Instance / Net name Pin name Type FPGA Arrival time
-----------------------------------------------------------------------------------------
FB1.uA/dut_inst.aptn_reset_sync_rst_n_9 Q[0] dff FB1_uA 0.137
FB1.uA/dut_inst.aptn_reset_sync_rst_n_9 Q[0] dff FB1_uA 0.137
rst_n - Net - -
FB1.uB/dut_inst.aptn_reset_sync_rst_n_5 D[0] dff FB1_uB 3.890
FB1.uB/dut_inst.aptn_reset_sync_rst_n_5 D[0] dff FB1_uB 3.890
=========================================================================================